include/configs/ls1046a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2016 Freescale Semiconductor
   4  * Copyright 2019-2021 NXP
   5  */
   6
   7 #ifndef __LS1046A_COMMON_H
   8 #define __LS1046A_COMMON_H
   9
  10 /* SPL build */
  11 #ifdef CONFIG_SPL_BUILD
  12 #define SPL_NO_QBMAN
  13 #define SPL_NO_FMAN
  14 #define SPL_NO_ENV
  15 #define SPL_NO_MISC
  16 #define SPL_NO_QSPI
  17 #define SPL_NO_USB
  18 #define SPL_NO_SATA
  19 #endif
  20 #if defined(CONFIG_SPL_BUILD) && \
  21         (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
  22 #define SPL_NO_MMC
  23 #endif
  24 #if defined(CONFIG_SPL_BUILD)           && \
  25         !defined(CONFIG_SPL_FSL_LS_PPA)
  26 #define SPL_NO_IFC
  27 #endif
  28
  29 #include <asm/arch/config.h>
  30 #include <asm/arch/stream_id_lsch2.h>
  31
  32 /* Link Definitions */
  33 #ifdef CONFIG_TFABOOT
  34 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  35 #else
  36 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  37 #endif
  38
  39 #define CONFIG_VERY_BIG_RAM
  40 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  41 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  42 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  43 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  44
  45 #define CPU_RELEASE_ADDR               secondary_boot_addr
  46
  47 /* Serial Port */
  48 #define CONFIG_SYS_NS16550_SERIAL
  49 #define CONFIG_SYS_NS16550_REG_SIZE     1
  50 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  51
  52 /* SD boot SPL */
  53 #ifdef CONFIG_SD_BOOT
  54 #define CONFIG_SPL_STACK                0x10020000
  55 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  56 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  57 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  58                                         CONFIG_SPL_BSS_MAX_SIZE)
  59 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  60
  61 #ifdef CONFIG_NXP_ESBC
  62 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  63 /*
  64  * HDR would be appended at end of image and copied to DDR along
  65  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  66  * size increases then increase this size in case of secure boot as
  67  * it uses raw u-boot image instead of fit image.
  68  */
  69 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  70 #else
  71 #define CONFIG_SYS_MONITOR_LEN          0x100000
  72 #endif /* ifdef CONFIG_NXP_ESBC */
  73 #endif
  74
  75 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
  76 #define CONFIG_SPL_TARGET               "spl/u-boot-spl.pbl"
  77 #define CONFIG_SPL_STACK                0x10020000
  78 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  79 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  80 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  81                                         CONFIG_SPL_BSS_MAX_SIZE)
  82 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  83 #define CONFIG_SYS_MONITOR_LEN          0x100000
  84 #endif
  85
  86 /* NAND SPL */
  87 #ifdef CONFIG_NAND_BOOT
  88 #define CONFIG_SPL_STACK                0x1001f000
  89 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
  90 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
  91
  92 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  93 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  94 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  95                                         CONFIG_SPL_BSS_MAX_SIZE)
  96 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  97 #define CONFIG_SYS_MONITOR_LEN          0xa0000
  98 #endif
  99
 100 /* GPIO */
 101
 102 /* I2C */
 103
 104 /* PCIe */
 105 #define CONFIG_PCIE1            /* PCIE controller 1 */
 106 #define CONFIG_PCIE2            /* PCIE controller 2 */
 107 #define CONFIG_PCIE3            /* PCIE controller 3 */
 108
 109 #ifdef CONFIG_PCI
 110 #define CONFIG_PCI_SCAN_SHOW
 111 #endif
 112
 113 /* SATA */
 114 #ifndef SPL_NO_SATA
 115 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
 116 #endif
 117
 118 /* FMan ucode */
 119 #ifndef SPL_NO_FMAN
 120 #define CONFIG_SYS_DPAA_FMAN
 121 #ifdef CONFIG_SYS_DPAA_FMAN
 122 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 123 #endif
 124 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 125 #endif
 126
 127 /* Miscellaneous configurable options */
 128
 129 #define CONFIG_HWCONFIG
 130 #define HWCONFIG_BUFFER_SIZE            128
 131
 132 #ifndef CONFIG_SPL_BUILD
 133 #define BOOT_TARGET_DEVICES(func) \
 134         func(SCSI, scsi, 0) \
 135         func(MMC, mmc, 0) \
 136         func(USB, usb, 0) \
 137         func(DHCP, dhcp, na)
 138 #include <config_distro_bootcmd.h>
 139 #endif
 140
 141 #if defined(CONFIG_TARGET_LS1046AFRWY)
 142 #define LS1046A_BOOT_SRC_AND_HDR\
 143         "boot_scripts=ls1046afrwy_boot.scr\0"   \
 144         "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
 145 #elif defined(CONFIG_TARGET_LS1046AQDS)
 146 #define LS1046A_BOOT_SRC_AND_HDR\
 147         "boot_scripts=ls1046aqds_boot.scr\0"    \
 148         "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
 149 #else
 150 #define LS1046A_BOOT_SRC_AND_HDR\
 151         "boot_scripts=ls1046ardb_boot.scr\0"    \
 152         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
 153 #endif
 154 #ifndef SPL_NO_MISC
 155 /* Initial environment variables */
 156 #define CONFIG_EXTRA_ENV_SETTINGS               \
 157         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 158         "ramdisk_addr=0x800000\0"               \
 159         "ramdisk_size=0x2000000\0"              \
 160         "bootm_size=0x10000000\0"               \
 161         "kernel_addr=0x61000000\0"              \
 162         "scriptaddr=0x80000000\0"               \
 163         "scripthdraddr=0x80080000\0"            \
 164         "fdtheader_addr_r=0x80100000\0"         \
 165         "kernelheader_addr_r=0x80200000\0"      \
 166         "load_addr=0xa0000000\0"            \
 167         "kernel_addr_r=0x81000000\0"            \
 168         "fdt_addr_r=0x90000000\0"               \
 169         "ramdisk_addr_r=0xa0000000\0"           \
 170         "kernel_start=0x1000000\0"              \
 171         "kernelheader_start=0x600000\0"         \
 172         "kernel_load=0xa0000000\0"              \
 173         "kernel_size=0x2800000\0"               \
 174         "kernelheader_size=0x40000\0"           \
 175         "kernel_addr_sd=0x8000\0"               \
 176         "kernel_size_sd=0x14000\0"              \
 177         "kernelhdr_addr_sd=0x3000\0"            \
 178         "kernelhdr_size_sd=0x10\0"              \
 179         "console=ttyS0,115200\0"                \
 180          CONFIG_MTDPARTS_DEFAULT "\0"           \
 181         BOOTENV                                 \
 182         LS1046A_BOOT_SRC_AND_HDR                \
 183         "scan_dev_for_boot_part="               \
 184                 "part list ${devtype} ${devnum} devplist; "   \
 185                 "env exists devplist || setenv devplist 1; "  \
 186                 "for distro_bootpart in ${devplist}; do "     \
 187                   "if fstype ${devtype} "                  \
 188                         "${devnum}:${distro_bootpart} "      \
 189                         "bootfstype; then "                  \
 190                         "run scan_dev_for_boot; "            \
 191                   "fi; "                                   \
 192                 "done\0"                                   \
 193         "boot_a_script="                                  \
 194                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
 195                         "${scriptaddr} ${prefix}${script}; "    \
 196                 "env exists secureboot && load ${devtype} "     \
 197                         "${devnum}:${distro_bootpart} "         \
 198                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
 199                         "env exists secureboot "        \
 200                         "&& esbc_validate ${scripthdraddr};"    \
 201                 "source ${scriptaddr}\0"          \
 202         "qspi_bootcmd=echo Trying load from qspi..;"      \
 203                 "sf probe && sf read $load_addr "         \
 204                 "$kernel_start $kernel_size; env exists secureboot "    \
 205                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 206                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 207                 "bootm $load_addr#$board\0"             \
 208         "nand_bootcmd=echo Trying load from nand..;"      \
 209                 "nand info; nand read $load_addr "         \
 210                 "$kernel_start $kernel_size; env exists secureboot "    \
 211                 "&& nand read $kernelheader_addr_r $kernelheader_start " \
 212                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 213                 "bootm $load_addr#$board\0"             \
 214         "nor_bootcmd=echo Trying load from nor..;"      \
 215                 "cp.b $kernel_addr $load_addr "         \
 216                 "$kernel_size; env exists secureboot "  \
 217                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 218                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 219                 "bootm $load_addr#$board\0"     \
 220         "sd_bootcmd=echo Trying load from SD ..;"       \
 221                 "mmcinfo; mmc read $load_addr "         \
 222                 "$kernel_addr_sd $kernel_size_sd && "   \
 223                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 224                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 225                 " && esbc_validate ${kernelheader_addr_r};"     \
 226                 "bootm $load_addr#$board\0"
 227
 228 #endif
 229
 230 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 231
 232 #include <asm/arch/soc.h>
 233
 234 #endif /* __LS1046A_COMMON_H */