include/configs/ls1046a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2016 Freescale Semiconductor
   4  * Copyright 2019-2021 NXP
   5  */
   6
   7 #ifndef __LS1046A_COMMON_H
   8 #define __LS1046A_COMMON_H
   9
  10 /* SPL build */
  11 #ifdef CONFIG_SPL_BUILD
  12 #define SPL_NO_QBMAN
  13 #define SPL_NO_FMAN
  14 #define SPL_NO_ENV
  15 #define SPL_NO_MISC
  16 #define SPL_NO_QSPI
  17 #define SPL_NO_USB
  18 #define SPL_NO_SATA
  19 #endif
  20 #if defined(CONFIG_SPL_BUILD) && \
  21         (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
  22 #define SPL_NO_MMC
  23 #endif
  24 #if defined(CONFIG_SPL_BUILD)           && \
  25         !defined(CONFIG_SPL_FSL_LS_PPA)
  26 #define SPL_NO_IFC
  27 #endif
  28
  29 #define CONFIG_REMAKE_ELF
  30
  31 #include <asm/arch/config.h>
  32 #include <asm/arch/stream_id_lsch2.h>
  33
  34 /* Link Definitions */
  35 #ifdef CONFIG_TFABOOT
  36 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  37 #else
  38 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  39 #endif
  40
  41 #define CONFIG_VERY_BIG_RAM
  42 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  43 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  44 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  45 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  46
  47 #define CPU_RELEASE_ADDR               secondary_boot_addr
  48
  49 /* Generic Timer Definitions */
  50 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
  51
  52 /* Serial Port */
  53 #define CONFIG_SYS_NS16550_SERIAL
  54 #define CONFIG_SYS_NS16550_REG_SIZE     1
  55 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  56
  57 /* SD boot SPL */
  58 #ifdef CONFIG_SD_BOOT
  59 #define CONFIG_SPL_MAX_SIZE             0x1f000         /* 124 KiB */
  60 #define CONFIG_SPL_STACK                0x10020000
  61 #define CONFIG_SPL_PAD_TO               0x21000         /* 132 KiB */
  62 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  63 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  64 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  65                                         CONFIG_SPL_BSS_MAX_SIZE)
  66 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  67
  68 #ifdef CONFIG_NXP_ESBC
  69 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  70 /*
  71  * HDR would be appended at end of image and copied to DDR along
  72  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  73  * size increases then increase this size in case of secure boot as
  74  * it uses raw u-boot image instead of fit image.
  75  */
  76 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  77 #else
  78 #define CONFIG_SYS_MONITOR_LEN          0x100000
  79 #endif /* ifdef CONFIG_NXP_ESBC */
  80 #endif
  81
  82 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
  83 #define CONFIG_SPL_TARGET               "spl/u-boot-spl.pbl"
  84 #define CONFIG_SPL_MAX_SIZE             0x1f000
  85 #define CONFIG_SPL_STACK                0x10020000
  86 #define CONFIG_SPL_PAD_TO               0x20000
  87 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  88 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  89 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  90                                         CONFIG_SPL_BSS_MAX_SIZE)
  91 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  92 #define CONFIG_SYS_MONITOR_LEN          0x100000
  93 #endif
  94
  95 /* NAND SPL */
  96 #ifdef CONFIG_NAND_BOOT
  97 #define CONFIG_SPL_PBL_PAD
  98
  99 #define CONFIG_SPL_MAX_SIZE             0x17000         /* 90 KiB */
 100 #define CONFIG_SPL_STACK                0x1001f000
 101 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 102 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 103
 104 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
 105 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 106 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
 107                                         CONFIG_SPL_BSS_MAX_SIZE)
 108 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 109 #define CONFIG_SYS_MONITOR_LEN          0xa0000
 110 #endif
 111
 112 /* GPIO */
 113 #ifdef CONFIG_DM_GPIO
 114 #ifndef CONFIG_MPC8XXX_GPIO
 115 #define CONFIG_MPC8XXX_GPIO
 116 #endif
 117 #endif
 118
 119 /* I2C */
 120
 121 /* PCIe */
 122 #define CONFIG_PCIE1            /* PCIE controller 1 */
 123 #define CONFIG_PCIE2            /* PCIE controller 2 */
 124 #define CONFIG_PCIE3            /* PCIE controller 3 */
 125
 126 #ifdef CONFIG_PCI
 127 #define CONFIG_PCI_SCAN_SHOW
 128 #endif
 129
 130 /* SATA */
 131 #ifndef SPL_NO_SATA
 132 #define CONFIG_SCSI_AHCI_PLAT
 133
 134 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
 135
 136 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
 137 #define CONFIG_SYS_SCSI_MAX_LUN                 1
 138 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 139                                                 CONFIG_SYS_SCSI_MAX_LUN)
 140 #endif
 141
 142 /* FMan ucode */
 143 #ifndef SPL_NO_FMAN
 144 #define CONFIG_SYS_DPAA_FMAN
 145 #ifdef CONFIG_SYS_DPAA_FMAN
 146 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 147 #endif
 148 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 149 #endif
 150
 151 /* Miscellaneous configurable options */
 152
 153 #define CONFIG_HWCONFIG
 154 #define HWCONFIG_BUFFER_SIZE            128
 155
 156 #ifndef CONFIG_SPL_BUILD
 157 #define BOOT_TARGET_DEVICES(func) \
 158         func(SCSI, scsi, 0) \
 159         func(MMC, mmc, 0) \
 160         func(USB, usb, 0) \
 161         func(DHCP, dhcp, na)
 162 #include <config_distro_bootcmd.h>
 163 #endif
 164
 165 #if defined(CONFIG_TARGET_LS1046AFRWY)
 166 #define LS1046A_BOOT_SRC_AND_HDR\
 167         "boot_scripts=ls1046afrwy_boot.scr\0"   \
 168         "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
 169 #elif defined(CONFIG_TARGET_LS1046AQDS)
 170 #define LS1046A_BOOT_SRC_AND_HDR\
 171         "boot_scripts=ls1046aqds_boot.scr\0"    \
 172         "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
 173 #else
 174 #define LS1046A_BOOT_SRC_AND_HDR\
 175         "boot_scripts=ls1046ardb_boot.scr\0"    \
 176         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
 177 #endif
 178 #ifndef SPL_NO_MISC
 179 /* Initial environment variables */
 180 #define CONFIG_EXTRA_ENV_SETTINGS               \
 181         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 182         "ramdisk_addr=0x800000\0"               \
 183         "ramdisk_size=0x2000000\0"              \
 184         "bootm_size=0x10000000\0"               \
 185         "fdt_addr=0x64f00000\0"                 \
 186         "kernel_addr=0x61000000\0"              \
 187         "scriptaddr=0x80000000\0"               \
 188         "scripthdraddr=0x80080000\0"            \
 189         "fdtheader_addr_r=0x80100000\0"         \
 190         "kernelheader_addr_r=0x80200000\0"      \
 191         "load_addr=0xa0000000\0"            \
 192         "kernel_addr_r=0x81000000\0"            \
 193         "fdt_addr_r=0x90000000\0"               \
 194         "ramdisk_addr_r=0xa0000000\0"           \
 195         "kernel_start=0x1000000\0"              \
 196         "kernelheader_start=0x600000\0"         \
 197         "kernel_load=0xa0000000\0"              \
 198         "kernel_size=0x2800000\0"               \
 199         "kernelheader_size=0x40000\0"           \
 200         "kernel_addr_sd=0x8000\0"               \
 201         "kernel_size_sd=0x14000\0"              \
 202         "kernelhdr_addr_sd=0x3000\0"            \
 203         "kernelhdr_size_sd=0x10\0"              \
 204         "console=ttyS0,115200\0"                \
 205          CONFIG_MTDPARTS_DEFAULT "\0"           \
 206         BOOTENV                                 \
 207         LS1046A_BOOT_SRC_AND_HDR                \
 208         "scan_dev_for_boot_part="               \
 209                 "part list ${devtype} ${devnum} devplist; "   \
 210                 "env exists devplist || setenv devplist 1; "  \
 211                 "for distro_bootpart in ${devplist}; do "     \
 212                   "if fstype ${devtype} "                  \
 213                         "${devnum}:${distro_bootpart} "      \
 214                         "bootfstype; then "                  \
 215                         "run scan_dev_for_boot; "            \
 216                   "fi; "                                   \
 217                 "done\0"                                   \
 218         "boot_a_script="                                  \
 219                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
 220                         "${scriptaddr} ${prefix}${script}; "    \
 221                 "env exists secureboot && load ${devtype} "     \
 222                         "${devnum}:${distro_bootpart} "         \
 223                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
 224                         "env exists secureboot "        \
 225                         "&& esbc_validate ${scripthdraddr};"    \
 226                 "source ${scriptaddr}\0"          \
 227         "qspi_bootcmd=echo Trying load from qspi..;"      \
 228                 "sf probe && sf read $load_addr "         \
 229                 "$kernel_start $kernel_size; env exists secureboot "    \
 230                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 231                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 232                 "bootm $load_addr#$board\0"             \
 233         "nand_bootcmd=echo Trying load from nand..;"      \
 234                 "nand info; nand read $load_addr "         \
 235                 "$kernel_start $kernel_size; env exists secureboot "    \
 236                 "&& nand read $kernelheader_addr_r $kernelheader_start " \
 237                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 238                 "bootm $load_addr#$board\0"             \
 239         "nor_bootcmd=echo Trying load from nor..;"      \
 240                 "cp.b $kernel_addr $load_addr "         \
 241                 "$kernel_size; env exists secureboot "  \
 242                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 243                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 244                 "bootm $load_addr#$board\0"     \
 245         "sd_bootcmd=echo Trying load from SD ..;"       \
 246                 "mmcinfo; mmc read $load_addr "         \
 247                 "$kernel_addr_sd $kernel_size_sd && "   \
 248                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 249                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 250                 " && esbc_validate ${kernelheader_addr_r};"     \
 251                 "bootm $load_addr#$board\0"
 252
 253 #endif
 254
 255 /* Monitor Command Prompt */
 256 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 257
 258 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 259
 260 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 261
 262 #include <asm/arch/soc.h>
 263
 264 #endif /* __LS1046A_COMMON_H */