include/configs/ls1046a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2016 Freescale Semiconductor
   4  * Copyright 2019-2021 NXP
   5  */
   6
   7 #ifndef __LS1046A_COMMON_H
   8 #define __LS1046A_COMMON_H
   9
  10 /* SPL build */
  11 #ifdef CONFIG_SPL_BUILD
  12 #define SPL_NO_QBMAN
  13 #define SPL_NO_FMAN
  14 #define SPL_NO_ENV
  15 #define SPL_NO_MISC
  16 #define SPL_NO_QSPI
  17 #define SPL_NO_USB
  18 #define SPL_NO_SATA
  19 #endif
  20 #if defined(CONFIG_SPL_BUILD) && \
  21         (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
  22 #define SPL_NO_MMC
  23 #endif
  24 #if defined(CONFIG_SPL_BUILD)           && \
  25         !defined(CONFIG_SPL_FSL_LS_PPA)
  26 #define SPL_NO_IFC
  27 #endif
  28
  29 #define CONFIG_REMAKE_ELF
  30
  31 #include <asm/arch/config.h>
  32 #include <asm/arch/stream_id_lsch2.h>
  33
  34 /* Link Definitions */
  35 #ifdef CONFIG_TFABOOT
  36 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  37 #else
  38 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  39 #endif
  40
  41 #define CONFIG_SKIP_LOWLEVEL_INIT
  42
  43 #define CONFIG_VERY_BIG_RAM
  44 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  45 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  46 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  47 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  48
  49 #define CPU_RELEASE_ADDR               secondary_boot_addr
  50
  51 /* Generic Timer Definitions */
  52 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
  53
  54 /* Size of malloc() pool */
  55 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  56
  57 /* Serial Port */
  58 #define CONFIG_SYS_NS16550_SERIAL
  59 #define CONFIG_SYS_NS16550_REG_SIZE     1
  60 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  61
  62 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  63
  64 /* SD boot SPL */
  65 #ifdef CONFIG_SD_BOOT
  66 #define CONFIG_SPL_MAX_SIZE             0x1f000         /* 124 KiB */
  67 #define CONFIG_SPL_STACK                0x10020000
  68 #define CONFIG_SPL_PAD_TO               0x21000         /* 132 KiB */
  69 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  70 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  71 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  72                                         CONFIG_SPL_BSS_MAX_SIZE)
  73 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  74
  75 #ifdef CONFIG_NXP_ESBC
  76 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  77 /*
  78  * HDR would be appended at end of image and copied to DDR along
  79  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  80  * size increases then increase this size in case of secure boot as
  81  * it uses raw u-boot image instead of fit image.
  82  */
  83 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  84 #else
  85 #define CONFIG_SYS_MONITOR_LEN          0x100000
  86 #endif /* ifdef CONFIG_NXP_ESBC */
  87 #endif
  88
  89 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
  90 #define CONFIG_SPL_TARGET               "spl/u-boot-spl.pbl"
  91 #define CONFIG_SPL_MAX_SIZE             0x1f000
  92 #define CONFIG_SPL_STACK                0x10020000
  93 #define CONFIG_SPL_PAD_TO               0x20000
  94 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  95 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  96 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  97                                         CONFIG_SPL_BSS_MAX_SIZE)
  98 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  99 #define CONFIG_SYS_MONITOR_LEN          0x100000
 100 #endif
 101
 102 /* NAND SPL */
 103 #ifdef CONFIG_NAND_BOOT
 104 #define CONFIG_SPL_PBL_PAD
 105 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 106 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 107 #define CONFIG_SPL_ENV_SUPPORT
 108 #define CONFIG_SPL_WATCHDOG
 109 #define CONFIG_SPL_I2C
 110
 111 #define CONFIG_SPL_NAND_SUPPORT
 112 #define CONFIG_SPL_DRIVERS_MISC
 113 #define CONFIG_SPL_MAX_SIZE             0x17000         /* 90 KiB */
 114 #define CONFIG_SPL_STACK                0x1001f000
 115 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 116 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 117
 118 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
 119 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 120 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
 121                                         CONFIG_SPL_BSS_MAX_SIZE)
 122 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 123 #define CONFIG_SYS_MONITOR_LEN          0xa0000
 124 #endif
 125
 126 /* GPIO */
 127 #ifdef CONFIG_DM_GPIO
 128 #ifndef CONFIG_MPC8XXX_GPIO
 129 #define CONFIG_MPC8XXX_GPIO
 130 #endif
 131 #endif
 132
 133 /* I2C */
 134
 135 /* PCIe */
 136 #define CONFIG_PCIE1            /* PCIE controller 1 */
 137 #define CONFIG_PCIE2            /* PCIE controller 2 */
 138 #define CONFIG_PCIE3            /* PCIE controller 3 */
 139
 140 #ifdef CONFIG_PCI
 141 #define CONFIG_PCI_SCAN_SHOW
 142 #endif
 143
 144 /* SATA */
 145 #ifndef SPL_NO_SATA
 146 #define CONFIG_SCSI_AHCI_PLAT
 147
 148 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
 149
 150 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
 151 #define CONFIG_SYS_SCSI_MAX_LUN                 1
 152 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 153                                                 CONFIG_SYS_SCSI_MAX_LUN)
 154 #endif
 155
 156 /* FMan ucode */
 157 #ifndef SPL_NO_FMAN
 158 #define CONFIG_SYS_DPAA_FMAN
 159 #ifdef CONFIG_SYS_DPAA_FMAN
 160 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 161 #endif
 162
 163 #ifdef CONFIG_TFABOOT
 164 #define CONFIG_SYS_FMAN_FW_ADDR         0x900000
 165 #else
 166 #ifdef CONFIG_SD_BOOT
 167 /*
 168  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
 169  * about 1MB (2048 blocks), Env is stored after the image, and the env size is
 170  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
 171  */
 172 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
 173 #elif defined(CONFIG_QSPI_BOOT)
 174 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
 175 #elif defined(CONFIG_NAND_BOOT)
 176 #define CONFIG_SYS_FMAN_FW_ADDR         (36 * CONFIG_SYS_NAND_BLOCK_SIZE)
 177 #else
 178 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
 179 #endif
 180 #endif
 181 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
 182 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 183 #endif
 184
 185 /* Miscellaneous configurable options */
 186
 187 #define CONFIG_HWCONFIG
 188 #define HWCONFIG_BUFFER_SIZE            128
 189
 190 #ifndef CONFIG_SPL_BUILD
 191 #define BOOT_TARGET_DEVICES(func) \
 192         func(SCSI, scsi, 0) \
 193         func(MMC, mmc, 0) \
 194         func(USB, usb, 0) \
 195         func(DHCP, dhcp, na)
 196 #include <config_distro_bootcmd.h>
 197 #endif
 198
 199 #if defined(CONFIG_TARGET_LS1046AFRWY)
 200 #define LS1046A_BOOT_SRC_AND_HDR\
 201         "boot_scripts=ls1046afrwy_boot.scr\0"   \
 202         "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
 203 #elif defined(CONFIG_TARGET_LS1046AQDS)
 204 #define LS1046A_BOOT_SRC_AND_HDR\
 205         "boot_scripts=ls1046aqds_boot.scr\0"    \
 206         "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
 207 #else
 208 #define LS1046A_BOOT_SRC_AND_HDR\
 209         "boot_scripts=ls1046ardb_boot.scr\0"    \
 210         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
 211 #endif
 212 #ifndef SPL_NO_MISC
 213 /* Initial environment variables */
 214 #define CONFIG_EXTRA_ENV_SETTINGS               \
 215         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 216         "ramdisk_addr=0x800000\0"               \
 217         "ramdisk_size=0x2000000\0"              \
 218         "bootm_size=0x10000000\0"               \
 219         "fdt_addr=0x64f00000\0"                 \
 220         "kernel_addr=0x61000000\0"              \
 221         "scriptaddr=0x80000000\0"               \
 222         "scripthdraddr=0x80080000\0"            \
 223         "fdtheader_addr_r=0x80100000\0"         \
 224         "kernelheader_addr_r=0x80200000\0"      \
 225         "load_addr=0xa0000000\0"            \
 226         "kernel_addr_r=0x81000000\0"            \
 227         "fdt_addr_r=0x90000000\0"               \
 228         "ramdisk_addr_r=0xa0000000\0"           \
 229         "kernel_start=0x1000000\0"              \
 230         "kernelheader_start=0x600000\0"         \
 231         "kernel_load=0xa0000000\0"              \
 232         "kernel_size=0x2800000\0"               \
 233         "kernelheader_size=0x40000\0"           \
 234         "kernel_addr_sd=0x8000\0"               \
 235         "kernel_size_sd=0x14000\0"              \
 236         "kernelhdr_addr_sd=0x3000\0"            \
 237         "kernelhdr_size_sd=0x10\0"              \
 238         "console=ttyS0,115200\0"                \
 239          CONFIG_MTDPARTS_DEFAULT "\0"           \
 240         BOOTENV                                 \
 241         LS1046A_BOOT_SRC_AND_HDR                \
 242         "scan_dev_for_boot_part="               \
 243                 "part list ${devtype} ${devnum} devplist; "   \
 244                 "env exists devplist || setenv devplist 1; "  \
 245                 "for distro_bootpart in ${devplist}; do "     \
 246                   "if fstype ${devtype} "                  \
 247                         "${devnum}:${distro_bootpart} "      \
 248                         "bootfstype; then "                  \
 249                         "run scan_dev_for_boot; "            \
 250                   "fi; "                                   \
 251                 "done\0"                                   \
 252         "boot_a_script="                                  \
 253                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
 254                         "${scriptaddr} ${prefix}${script}; "    \
 255                 "env exists secureboot && load ${devtype} "     \
 256                         "${devnum}:${distro_bootpart} "         \
 257                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
 258                         "env exists secureboot "        \
 259                         "&& esbc_validate ${scripthdraddr};"    \
 260                 "source ${scriptaddr}\0"          \
 261         "qspi_bootcmd=echo Trying load from qspi..;"      \
 262                 "sf probe && sf read $load_addr "         \
 263                 "$kernel_start $kernel_size; env exists secureboot "    \
 264                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 265                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 266                 "bootm $load_addr#$board\0"             \
 267         "nand_bootcmd=echo Trying load from nand..;"      \
 268                 "nand info; nand read $load_addr "         \
 269                 "$kernel_start $kernel_size; env exists secureboot "    \
 270                 "&& nand read $kernelheader_addr_r $kernelheader_start " \
 271                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 272                 "bootm $load_addr#$board\0"             \
 273         "nor_bootcmd=echo Trying load from nor..;"      \
 274                 "cp.b $kernel_addr $load_addr "         \
 275                 "$kernel_size; env exists secureboot "  \
 276                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 277                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 278                 "bootm $load_addr#$board\0"     \
 279         "sd_bootcmd=echo Trying load from SD ..;"       \
 280                 "mmcinfo; mmc read $load_addr "         \
 281                 "$kernel_addr_sd $kernel_size_sd && "   \
 282                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 283                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 284                 " && esbc_validate ${kernelheader_addr_r};"     \
 285                 "bootm $load_addr#$board\0"
 286
 287 #endif
 288
 289 /* Monitor Command Prompt */
 290 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 291
 292 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 293
 294 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 295
 296 #include <asm/arch/soc.h>
 297
 298 #endif /* __LS1046A_COMMON_H */