include/configs/ls1043a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2015 Freescale Semiconductor
   4  * Copyright 2019-2021 NXP
   5  */
   6
   7 #ifndef __LS1043A_COMMON_H
   8 #define __LS1043A_COMMON_H
   9
  10 /* SPL build */
  11 #ifdef CONFIG_SPL_BUILD
  12 #define SPL_NO_FMAN
  13 #define SPL_NO_DSPI
  14 #define SPL_NO_PCIE
  15 #define SPL_NO_ENV
  16 #define SPL_NO_MISC
  17 #define SPL_NO_USB
  18 #define SPL_NO_SATA
  19 #define SPL_NO_QE
  20 #define SPL_NO_EEPROM
  21 #endif
  22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
  23 #define SPL_NO_MMC
  24 #endif
  25 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
  26 #define SPL_NO_IFC
  27 #endif
  28
  29 #define CONFIG_REMAKE_ELF
  30
  31 #include <asm/arch/stream_id_lsch2.h>
  32 #include <asm/arch/config.h>
  33
  34 /* Link Definitions */
  35 #ifdef CONFIG_TFABOOT
  36 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  37 #else
  38 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  39 #endif
  40
  41 #define CONFIG_SKIP_LOWLEVEL_INIT
  42
  43 #define CONFIG_VERY_BIG_RAM
  44 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  45 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  46 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  47 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  48
  49 #define CPU_RELEASE_ADDR               secondary_boot_addr
  50
  51 /* Generic Timer Definitions */
  52 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
  53
  54 /* Size of malloc() pool */
  55 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  56
  57 /* Serial Port */
  58 #define CONFIG_SYS_NS16550_SERIAL
  59 #define CONFIG_SYS_NS16550_REG_SIZE     1
  60 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  61
  62 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  63
  64 /* SD boot SPL */
  65 #ifdef CONFIG_SD_BOOT
  66
  67 #define CONFIG_SPL_MAX_SIZE             0x17000
  68 #define CONFIG_SPL_STACK                0x1001e000
  69 #define CONFIG_SPL_PAD_TO               0x1d000
  70
  71 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  72                                         CONFIG_SPL_BSS_MAX_SIZE)
  73 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  74 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  75 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  76
  77 #ifdef CONFIG_NXP_ESBC
  78 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  79 /*
  80  * HDR would be appended at end of image and copied to DDR along
  81  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  82  * size increases then increase this size in case of secure boot as
  83  * it uses raw u-boot image instead of fit image.
  84  */
  85 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  86 #else
  87 #define CONFIG_SYS_MONITOR_LEN          0x100000
  88 #endif /* ifdef CONFIG_NXP_ESBC */
  89 #endif
  90
  91 /* NAND SPL */
  92 #ifdef CONFIG_NAND_BOOT
  93 #define CONFIG_SPL_PBL_PAD
  94 #define CONFIG_SPL_MAX_SIZE             0x1a000
  95 #define CONFIG_SPL_STACK                0x1001d000
  96 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
  97 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
  98 #define CONFIG_SYS_SPL_MALLOC_START     0x80200000
  99 #define CONFIG_SPL_BSS_START_ADDR       0x80100000
 100 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 101 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 102
 103 #ifdef CONFIG_NXP_ESBC
 104 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
 105 #endif /* ifdef CONFIG_NXP_ESBC */
 106
 107 #ifdef CONFIG_U_BOOT_HDR_SIZE
 108 /*
 109  * HDR would be appended at end of image and copied to DDR along
 110  * with U-Boot image. Here u-boot max. size is 512K. So if binary
 111  * size increases then increase this size in case of secure boot as
 112  * it uses raw u-boot image instead of fit image.
 113  */
 114 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
 115 #else
 116 #define CONFIG_SYS_MONITOR_LEN          0x100000
 117 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
 118
 119 #endif
 120
 121 /* GPIO */
 122 #ifdef CONFIG_DM_GPIO
 123 #ifndef CONFIG_MPC8XXX_GPIO
 124 #define CONFIG_MPC8XXX_GPIO
 125 #endif
 126 #endif
 127
 128 /* IFC */
 129 #ifndef SPL_NO_IFC
 130 #if defined(CONFIG_TFABOOT) || \
 131         (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
 132 #define CONFIG_FSL_IFC
 133 /*
 134  * CONFIG_SYS_FLASH_BASE has the final address (core view)
 135  * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
 136  * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
 137  * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
 138  */
 139 #define CONFIG_SYS_FLASH_BASE                   0x60000000
 140 #define CONFIG_SYS_FLASH_BASE_PHYS              CONFIG_SYS_FLASH_BASE
 141 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY        0x00000000
 142
 143 #ifdef CONFIG_MTD_NOR_FLASH
 144 #define CONFIG_SYS_FLASH_QUIET_TEST
 145 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 146 #endif
 147 #endif
 148 #endif
 149
 150 /* I2C */
 151
 152 /* PCIe */
 153 #ifndef SPL_NO_PCIE
 154 #define CONFIG_PCIE1            /* PCIE controller 1 */
 155 #define CONFIG_PCIE2            /* PCIE controller 2 */
 156 #define CONFIG_PCIE3            /* PCIE controller 3 */
 157
 158 #ifdef CONFIG_PCI
 159 #define CONFIG_PCI_SCAN_SHOW
 160 #endif
 161 #endif
 162
 163 /*  DSPI  */
 164 #ifndef SPL_NO_DSPI
 165 #ifdef CONFIG_FSL_DSPI
 166 #define CONFIG_SPI_FLASH_STMICRO        /* cs0 */
 167 #define CONFIG_SPI_FLASH_SST            /* cs1 */
 168 #define CONFIG_SPI_FLASH_EON            /* cs2 */
 169 #endif
 170 #endif
 171
 172 /* FMan ucode */
 173 #ifndef SPL_NO_FMAN
 174 #define CONFIG_SYS_DPAA_FMAN
 175 #ifdef CONFIG_SYS_DPAA_FMAN
 176 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 177
 178 #ifdef CONFIG_TFABOOT
 179 #define CONFIG_SYS_FMAN_FW_ADDR         0x900000
 180 #define CONFIG_SYS_QE_FW_ADDR           0x940000
 181
 182
 183 #else
 184 #ifdef CONFIG_NAND_BOOT
 185 /* Store Fman ucode at offeset 0x900000(72 blocks). */
 186 #define CONFIG_SYS_FMAN_FW_ADDR         (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
 187 #elif defined(CONFIG_SD_BOOT)
 188 /*
 189  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
 190  * about 1MB (2040 blocks), Env is stored after the image, and the env size is
 191  * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800).
 192  */
 193 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
 194 #define CONFIG_SYS_QE_FW_ADDR           (512 * 0x4A00)
 195 #elif defined(CONFIG_QSPI_BOOT)
 196 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
 197 #else
 198 /* FMan fireware Pre-load address */
 199 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
 200 #define CONFIG_SYS_QE_FW_ADDR           0x60940000
 201 #endif
 202 #endif
 203 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
 204 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 205 #endif
 206 #endif
 207
 208 /* Miscellaneous configurable options */
 209
 210 #define CONFIG_HWCONFIG
 211 #define HWCONFIG_BUFFER_SIZE            128
 212
 213 #ifndef SPL_NO_MISC
 214 #ifndef CONFIG_SPL_BUILD
 215 #define BOOT_TARGET_DEVICES(func) \
 216         func(MMC, mmc, 0) \
 217         func(USB, usb, 0) \
 218         func(DHCP, dhcp, na)
 219 #include <config_distro_bootcmd.h>
 220 #endif
 221
 222 /* Initial environment variables */
 223 #define CONFIG_EXTRA_ENV_SETTINGS               \
 224         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 225         "fdt_high=0xffffffffffffffff\0"         \
 226         "initrd_high=0xffffffffffffffff\0"      \
 227         "fdt_addr=0x64f00000\0"                 \
 228         "kernel_addr=0x61000000\0"              \
 229         "scriptaddr=0x80000000\0"               \
 230         "scripthdraddr=0x80080000\0"            \
 231         "fdtheader_addr_r=0x80100000\0"         \
 232         "kernelheader_addr_r=0x80200000\0"      \
 233         "kernel_addr_r=0x81000000\0"            \
 234         "kernel_start=0x1000000\0"              \
 235         "kernelheader_start=0x800000\0"         \
 236         "fdt_addr_r=0x90000000\0"               \
 237         "load_addr=0xa0000000\0"                \
 238         "kernelheader_addr=0x60600000\0"        \
 239         "kernel_size=0x2800000\0"               \
 240         "kernelheader_size=0x40000\0"           \
 241         "kernel_addr_sd=0x8000\0"               \
 242         "kernel_size_sd=0x14000\0"              \
 243         "kernelhdr_addr_sd=0x3000\0"            \
 244         "kernelhdr_size_sd=0x10\0"              \
 245         "console=ttyS0,115200\0"                \
 246         "boot_os=y\0"                           \
 247         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"        \
 248         BOOTENV                                 \
 249         "boot_scripts=ls1043ardb_boot.scr\0"    \
 250         "boot_script_hdr=hdr_ls1043ardb_bs.out\0"       \
 251         "scan_dev_for_boot_part="               \
 252                 "part list ${devtype} ${devnum} devplist; "     \
 253                 "env exists devplist || setenv devplist 1; "    \
 254                 "for distro_bootpart in ${devplist}; do "       \
 255                         "if fstype ${devtype} "                 \
 256                                 "${devnum}:${distro_bootpart} " \
 257                                 "bootfstype; then "             \
 258                                 "run scan_dev_for_boot; "       \
 259                         "fi; "                                  \
 260                 "done\0"                        \
 261         "boot_a_script="                                        \
 262                 "load ${devtype} ${devnum}:${distro_bootpart} " \
 263                         "${scriptaddr} ${prefix}${script}; "    \
 264                 "env exists secureboot && load ${devtype} "     \
 265                         "${devnum}:${distro_bootpart} "         \
 266                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
 267                         "env exists secureboot "        \
 268                         "&& esbc_validate ${scripthdraddr};"    \
 269                 "source ${scriptaddr}\0"                        \
 270         "qspi_bootcmd=echo Trying load from qspi..;"    \
 271                 "sf probe && sf read $load_addr "       \
 272                 "$kernel_start $kernel_size; env exists secureboot "    \
 273                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 274                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 275                 "bootm $load_addr#$board\0"     \
 276         "nor_bootcmd=echo Trying load from nor..;"      \
 277                 "cp.b $kernel_addr $load_addr " \
 278                 "$kernel_size; env exists secureboot "  \
 279                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 280                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 281                 "bootm $load_addr#$board\0"         \
 282         "nand_bootcmd=echo Trying load from NAND..;"    \
 283                 "nand info; nand read $load_addr "      \
 284                 "$kernel_start $kernel_size; env exists secureboot "    \
 285                 "&& nand read $kernelheader_addr_r $kernelheader_start "        \
 286                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 287                 "bootm $load_addr#$board\0"     \
 288         "sd_bootcmd=echo Trying load from SD ..;"       \
 289                 "mmcinfo; mmc read $load_addr "         \
 290                 "$kernel_addr_sd $kernel_size_sd && "     \
 291                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 292                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 293                 " && esbc_validate ${kernelheader_addr_r};"     \
 294                 "bootm $load_addr#$board\0"
 295
 296
 297 #undef CONFIG_BOOTCOMMAND
 298 #ifdef CONFIG_TFABOOT
 299 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "   \
 300                            "env exists secureboot && esbc_halt;"
 301 #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
 302                            "env exists secureboot && esbc_halt;"
 303 #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "     \
 304                            "env exists secureboot && esbc_halt;"
 305 #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; "   \
 306                            "env exists secureboot && esbc_halt;"
 307 #else
 308 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 309 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "     \
 310                            "env exists secureboot && esbc_halt;"
 311 #elif defined(CONFIG_SD_BOOT)
 312 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
 313                            "env exists secureboot && esbc_halt;"
 314 #else
 315 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "      \
 316                            "env exists secureboot && esbc_halt;"
 317 #endif
 318 #endif
 319 #endif
 320
 321 /* Monitor Command Prompt */
 322 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 323
 324 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 325
 326 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 327
 328 #include <asm/arch/soc.h>
 329
 330 #endif /* __LS1043A_COMMON_H */