1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor
4 * Copyright 2019-2021 NXP
7 #ifndef __LS1043A_COMMON_H
8 #define __LS1043A_COMMON_H
11 #ifdef CONFIG_SPL_BUILD
22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
25 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
29 #include <asm/arch/stream_id_lsch2.h>
30 #include <asm/arch/config.h>
32 /* Link Definitions */
34 #define CONFIG_VERY_BIG_RAM
35 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
36 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
37 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
38 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
40 #define CPU_RELEASE_ADDR secondary_boot_addr
43 #define CONFIG_SYS_NS16550_SERIAL
44 #define CONFIG_SYS_NS16550_REG_SIZE 1
45 #define CONFIG_SYS_NS16550_CLK (get_serial_clock())
49 #ifdef CONFIG_NXP_ESBC
50 #define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
52 * HDR would be appended at end of image and copied to DDR along
53 * with U-Boot image. Here u-boot max. size is 512K. So if binary
54 * size increases then increase this size in case of secure boot as
55 * it uses raw u-boot image instead of fit image.
57 #endif /* ifdef CONFIG_NXP_ESBC */
61 #ifdef CONFIG_NAND_BOOT
62 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
63 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
65 #ifdef CONFIG_NXP_ESBC
66 #define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
67 #endif /* ifdef CONFIG_NXP_ESBC */
69 #ifdef CONFIG_U_BOOT_HDR_SIZE
71 * HDR would be appended at end of image and copied to DDR along
72 * with U-Boot image. Here u-boot max. size is 512K. So if binary
73 * size increases then increase this size in case of secure boot as
74 * it uses raw u-boot image instead of fit image.
76 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
84 #if defined(CONFIG_TFABOOT) || \
85 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
87 * CONFIG_SYS_FLASH_BASE has the final address (core view)
88 * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
89 * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
90 * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
92 #define CONFIG_SYS_FLASH_BASE 0x60000000
93 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
94 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
96 #ifdef CONFIG_MTD_NOR_FLASH
97 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
108 #define CONFIG_SYS_DPAA_FMAN
109 #ifdef CONFIG_SYS_DPAA_FMAN
110 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000
114 /* Miscellaneous configurable options */
116 #define CONFIG_HWCONFIG
117 #define HWCONFIG_BUFFER_SIZE 128
120 #define BOOT_TARGET_DEVICES(func) \
124 #include <config_distro_bootcmd.h>
126 /* Initial environment variables */
127 #define CONFIG_EXTRA_ENV_SETTINGS \
128 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
129 "fdt_high=0xffffffffffffffff\0" \
130 "initrd_high=0xffffffffffffffff\0" \
131 "kernel_addr=0x61000000\0" \
132 "scriptaddr=0x80000000\0" \
133 "scripthdraddr=0x80080000\0" \
134 "fdtheader_addr_r=0x80100000\0" \
135 "kernelheader_addr_r=0x80200000\0" \
136 "kernel_addr_r=0x81000000\0" \
137 "kernel_start=0x1000000\0" \
138 "kernelheader_start=0x800000\0" \
139 "fdt_addr_r=0x90000000\0" \
140 "load_addr=0xa0000000\0" \
141 "kernelheader_addr=0x60600000\0" \
142 "kernel_size=0x2800000\0" \
143 "kernelheader_size=0x40000\0" \
144 "kernel_addr_sd=0x8000\0" \
145 "kernel_size_sd=0x14000\0" \
146 "kernelhdr_addr_sd=0x3000\0" \
147 "kernelhdr_size_sd=0x10\0" \
148 "console=ttyS0,115200\0" \
151 "boot_scripts=ls1043ardb_boot.scr\0" \
152 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
153 "scan_dev_for_boot_part=" \
154 "part list ${devtype} ${devnum} devplist; " \
155 "env exists devplist || setenv devplist 1; " \
156 "for distro_bootpart in ${devplist}; do " \
157 "if fstype ${devtype} " \
158 "${devnum}:${distro_bootpart} " \
159 "bootfstype; then " \
160 "run scan_dev_for_boot; " \
164 "load ${devtype} ${devnum}:${distro_bootpart} " \
165 "${scriptaddr} ${prefix}${script}; " \
166 "env exists secureboot && load ${devtype} " \
167 "${devnum}:${distro_bootpart} " \
168 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
169 "env exists secureboot " \
170 "&& esbc_validate ${scripthdraddr};" \
171 "source ${scriptaddr}\0" \
172 "qspi_bootcmd=echo Trying load from qspi..;" \
173 "sf probe && sf read $load_addr " \
174 "$kernel_start $kernel_size; env exists secureboot " \
175 "&& sf read $kernelheader_addr_r $kernelheader_start " \
176 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
177 "bootm $load_addr#$board\0" \
178 "nor_bootcmd=echo Trying load from nor..;" \
179 "cp.b $kernel_addr $load_addr " \
180 "$kernel_size; env exists secureboot " \
181 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
182 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
183 "bootm $load_addr#$board\0" \
184 "nand_bootcmd=echo Trying load from NAND..;" \
185 "nand info; nand read $load_addr " \
186 "$kernel_start $kernel_size; env exists secureboot " \
187 "&& nand read $kernelheader_addr_r $kernelheader_start " \
188 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
189 "bootm $load_addr#$board\0" \
190 "sd_bootcmd=echo Trying load from SD ..;" \
191 "mmcinfo; mmc read $load_addr " \
192 "$kernel_addr_sd $kernel_size_sd && " \
193 "env exists secureboot && mmc read $kernelheader_addr_r " \
194 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
195 " && esbc_validate ${kernelheader_addr_r};" \
196 "bootm $load_addr#$board\0"
199 #ifdef CONFIG_TFABOOT
200 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
201 "env exists secureboot && esbc_halt;"
202 #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
203 "env exists secureboot && esbc_halt;"
204 #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
205 "env exists secureboot && esbc_halt;"
206 #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
207 "env exists secureboot && esbc_halt;"
211 #include <asm/arch/soc.h>
213 #endif /* __LS1043A_COMMON_H */