include/configs/ls1043a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2015 Freescale Semiconductor
   4  * Copyright 2019-2021 NXP
   5  */
   6
   7 #ifndef __LS1043A_COMMON_H
   8 #define __LS1043A_COMMON_H
   9
  10 /* SPL build */
  11 #ifdef CONFIG_SPL_BUILD
  12 #define SPL_NO_FMAN
  13 #define SPL_NO_DSPI
  14 #define SPL_NO_PCIE
  15 #define SPL_NO_ENV
  16 #define SPL_NO_MISC
  17 #define SPL_NO_USB
  18 #define SPL_NO_SATA
  19 #define SPL_NO_QE
  20 #define SPL_NO_EEPROM
  21 #endif
  22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
  23 #define SPL_NO_MMC
  24 #endif
  25 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
  26 #define SPL_NO_IFC
  27 #endif
  28
  29 #define CONFIG_REMAKE_ELF
  30
  31 #include <asm/arch/stream_id_lsch2.h>
  32 #include <asm/arch/config.h>
  33
  34 /* Link Definitions */
  35 #ifdef CONFIG_TFABOOT
  36 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  37 #else
  38 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  39 #endif
  40
  41 #define CONFIG_VERY_BIG_RAM
  42 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  43 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  44 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  45 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  46
  47 #define CPU_RELEASE_ADDR               secondary_boot_addr
  48
  49 /* Generic Timer Definitions */
  50 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
  51
  52 /* Size of malloc() pool */
  53 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  54
  55 /* Serial Port */
  56 #define CONFIG_SYS_NS16550_SERIAL
  57 #define CONFIG_SYS_NS16550_REG_SIZE     1
  58 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  59
  60 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  61
  62 /* SD boot SPL */
  63 #ifdef CONFIG_SD_BOOT
  64
  65 #define CONFIG_SPL_MAX_SIZE             0x17000
  66 #define CONFIG_SPL_STACK                0x1001e000
  67 #define CONFIG_SPL_PAD_TO               0x1d000
  68
  69 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  70                                         CONFIG_SPL_BSS_MAX_SIZE)
  71 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  72 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  73 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  74
  75 #ifdef CONFIG_NXP_ESBC
  76 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  77 /*
  78  * HDR would be appended at end of image and copied to DDR along
  79  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  80  * size increases then increase this size in case of secure boot as
  81  * it uses raw u-boot image instead of fit image.
  82  */
  83 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  84 #else
  85 #define CONFIG_SYS_MONITOR_LEN          0x100000
  86 #endif /* ifdef CONFIG_NXP_ESBC */
  87 #endif
  88
  89 /* NAND SPL */
  90 #ifdef CONFIG_NAND_BOOT
  91 #define CONFIG_SPL_PBL_PAD
  92 #define CONFIG_SPL_MAX_SIZE             0x1a000
  93 #define CONFIG_SPL_STACK                0x1001d000
  94 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
  95 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
  96 #define CONFIG_SYS_SPL_MALLOC_START     0x80200000
  97 #define CONFIG_SPL_BSS_START_ADDR       0x80100000
  98 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  99 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 100
 101 #ifdef CONFIG_NXP_ESBC
 102 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
 103 #endif /* ifdef CONFIG_NXP_ESBC */
 104
 105 #ifdef CONFIG_U_BOOT_HDR_SIZE
 106 /*
 107  * HDR would be appended at end of image and copied to DDR along
 108  * with U-Boot image. Here u-boot max. size is 512K. So if binary
 109  * size increases then increase this size in case of secure boot as
 110  * it uses raw u-boot image instead of fit image.
 111  */
 112 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
 113 #else
 114 #define CONFIG_SYS_MONITOR_LEN          0x100000
 115 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
 116
 117 #endif
 118
 119 /* GPIO */
 120 #ifdef CONFIG_DM_GPIO
 121 #ifndef CONFIG_MPC8XXX_GPIO
 122 #define CONFIG_MPC8XXX_GPIO
 123 #endif
 124 #endif
 125
 126 /* IFC */
 127 #ifndef SPL_NO_IFC
 128 #if defined(CONFIG_TFABOOT) || \
 129         (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
 130 #define CONFIG_FSL_IFC
 131 /*
 132  * CONFIG_SYS_FLASH_BASE has the final address (core view)
 133  * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
 134  * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
 135  * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
 136  */
 137 #define CONFIG_SYS_FLASH_BASE                   0x60000000
 138 #define CONFIG_SYS_FLASH_BASE_PHYS              CONFIG_SYS_FLASH_BASE
 139 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY        0x00000000
 140
 141 #ifdef CONFIG_MTD_NOR_FLASH
 142 #define CONFIG_SYS_FLASH_QUIET_TEST
 143 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 144 #endif
 145 #endif
 146 #endif
 147
 148 /* I2C */
 149
 150 /* PCIe */
 151 #ifndef SPL_NO_PCIE
 152 #define CONFIG_PCIE1            /* PCIE controller 1 */
 153 #define CONFIG_PCIE2            /* PCIE controller 2 */
 154 #define CONFIG_PCIE3            /* PCIE controller 3 */
 155
 156 #ifdef CONFIG_PCI
 157 #define CONFIG_PCI_SCAN_SHOW
 158 #endif
 159 #endif
 160
 161 /*  DSPI  */
 162 #ifndef SPL_NO_DSPI
 163 #ifdef CONFIG_FSL_DSPI
 164 #define CONFIG_SPI_FLASH_STMICRO        /* cs0 */
 165 #define CONFIG_SPI_FLASH_SST            /* cs1 */
 166 #define CONFIG_SPI_FLASH_EON            /* cs2 */
 167 #endif
 168 #endif
 169
 170 /* FMan ucode */
 171 #ifndef SPL_NO_FMAN
 172 #define CONFIG_SYS_DPAA_FMAN
 173 #ifdef CONFIG_SYS_DPAA_FMAN
 174 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 175
 176 #ifdef CONFIG_TFABOOT
 177 #define CONFIG_SYS_FMAN_FW_ADDR         0x900000
 178 #define CONFIG_SYS_QE_FW_ADDR           0x940000
 179
 180
 181 #else
 182 #ifdef CONFIG_NAND_BOOT
 183 /* Store Fman ucode at offeset 0x900000(72 blocks). */
 184 #define CONFIG_SYS_FMAN_FW_ADDR         (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
 185 #elif defined(CONFIG_SD_BOOT)
 186 /*
 187  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
 188  * about 1MB (2040 blocks), Env is stored after the image, and the env size is
 189  * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800).
 190  */
 191 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
 192 #define CONFIG_SYS_QE_FW_ADDR           (512 * 0x4A00)
 193 #elif defined(CONFIG_QSPI_BOOT)
 194 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
 195 #else
 196 /* FMan fireware Pre-load address */
 197 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
 198 #define CONFIG_SYS_QE_FW_ADDR           0x60940000
 199 #endif
 200 #endif
 201 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
 202 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 203 #endif
 204 #endif
 205
 206 /* Miscellaneous configurable options */
 207
 208 #define CONFIG_HWCONFIG
 209 #define HWCONFIG_BUFFER_SIZE            128
 210
 211 #ifndef SPL_NO_MISC
 212 #ifndef CONFIG_SPL_BUILD
 213 #define BOOT_TARGET_DEVICES(func) \
 214         func(MMC, mmc, 0) \
 215         func(USB, usb, 0) \
 216         func(DHCP, dhcp, na)
 217 #include <config_distro_bootcmd.h>
 218 #endif
 219
 220 /* Initial environment variables */
 221 #define CONFIG_EXTRA_ENV_SETTINGS               \
 222         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 223         "fdt_high=0xffffffffffffffff\0"         \
 224         "initrd_high=0xffffffffffffffff\0"      \
 225         "fdt_addr=0x64f00000\0"                 \
 226         "kernel_addr=0x61000000\0"              \
 227         "scriptaddr=0x80000000\0"               \
 228         "scripthdraddr=0x80080000\0"            \
 229         "fdtheader_addr_r=0x80100000\0"         \
 230         "kernelheader_addr_r=0x80200000\0"      \
 231         "kernel_addr_r=0x81000000\0"            \
 232         "kernel_start=0x1000000\0"              \
 233         "kernelheader_start=0x800000\0"         \
 234         "fdt_addr_r=0x90000000\0"               \
 235         "load_addr=0xa0000000\0"                \
 236         "kernelheader_addr=0x60600000\0"        \
 237         "kernel_size=0x2800000\0"               \
 238         "kernelheader_size=0x40000\0"           \
 239         "kernel_addr_sd=0x8000\0"               \
 240         "kernel_size_sd=0x14000\0"              \
 241         "kernelhdr_addr_sd=0x3000\0"            \
 242         "kernelhdr_size_sd=0x10\0"              \
 243         "console=ttyS0,115200\0"                \
 244         "boot_os=y\0"                           \
 245         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"        \
 246         BOOTENV                                 \
 247         "boot_scripts=ls1043ardb_boot.scr\0"    \
 248         "boot_script_hdr=hdr_ls1043ardb_bs.out\0"       \
 249         "scan_dev_for_boot_part="               \
 250                 "part list ${devtype} ${devnum} devplist; "     \
 251                 "env exists devplist || setenv devplist 1; "    \
 252                 "for distro_bootpart in ${devplist}; do "       \
 253                         "if fstype ${devtype} "                 \
 254                                 "${devnum}:${distro_bootpart} " \
 255                                 "bootfstype; then "             \
 256                                 "run scan_dev_for_boot; "       \
 257                         "fi; "                                  \
 258                 "done\0"                        \
 259         "boot_a_script="                                        \
 260                 "load ${devtype} ${devnum}:${distro_bootpart} " \
 261                         "${scriptaddr} ${prefix}${script}; "    \
 262                 "env exists secureboot && load ${devtype} "     \
 263                         "${devnum}:${distro_bootpart} "         \
 264                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
 265                         "env exists secureboot "        \
 266                         "&& esbc_validate ${scripthdraddr};"    \
 267                 "source ${scriptaddr}\0"                        \
 268         "qspi_bootcmd=echo Trying load from qspi..;"    \
 269                 "sf probe && sf read $load_addr "       \
 270                 "$kernel_start $kernel_size; env exists secureboot "    \
 271                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 272                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 273                 "bootm $load_addr#$board\0"     \
 274         "nor_bootcmd=echo Trying load from nor..;"      \
 275                 "cp.b $kernel_addr $load_addr " \
 276                 "$kernel_size; env exists secureboot "  \
 277                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 278                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 279                 "bootm $load_addr#$board\0"         \
 280         "nand_bootcmd=echo Trying load from NAND..;"    \
 281                 "nand info; nand read $load_addr "      \
 282                 "$kernel_start $kernel_size; env exists secureboot "    \
 283                 "&& nand read $kernelheader_addr_r $kernelheader_start "        \
 284                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 285                 "bootm $load_addr#$board\0"     \
 286         "sd_bootcmd=echo Trying load from SD ..;"       \
 287                 "mmcinfo; mmc read $load_addr "         \
 288                 "$kernel_addr_sd $kernel_size_sd && "     \
 289                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 290                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 291                 " && esbc_validate ${kernelheader_addr_r};"     \
 292                 "bootm $load_addr#$board\0"
 293
 294
 295 #undef CONFIG_BOOTCOMMAND
 296 #ifdef CONFIG_TFABOOT
 297 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "   \
 298                            "env exists secureboot && esbc_halt;"
 299 #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
 300                            "env exists secureboot && esbc_halt;"
 301 #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "     \
 302                            "env exists secureboot && esbc_halt;"
 303 #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; "   \
 304                            "env exists secureboot && esbc_halt;"
 305 #else
 306 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 307 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "     \
 308                            "env exists secureboot && esbc_halt;"
 309 #elif defined(CONFIG_SD_BOOT)
 310 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
 311                            "env exists secureboot && esbc_halt;"
 312 #else
 313 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "      \
 314                            "env exists secureboot && esbc_halt;"
 315 #endif
 316 #endif
 317 #endif
 318
 319 /* Monitor Command Prompt */
 320 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 321
 322 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 323
 324 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 325
 326 #include <asm/arch/soc.h>
 327
 328 #endif /* __LS1043A_COMMON_H */