253911518669f723bd5463ce3a404c6d5811d154
[platform/kernel/u-boot.git] / include / configs / ls1028aqds.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2019-2021 NXP
4  */
5
6 #ifndef __LS1028A_QDS_H
7 #define __LS1028A_QDS_H
8
9 #include "ls1028a_common.h"
10
11 #define COUNTER_FREQUENCY_REAL          (get_board_sys_clk() / 4)
12
13 /*
14  * QIXIS Definitions
15  */
16
17 #ifdef CONFIG_FSL_QIXIS
18 #define QIXIS_BASE                      0x7fb00000
19 #define QIXIS_BASE_PHYS                 QIXIS_BASE
20 #define CONFIG_SYS_I2C_FPGA_ADDR        0x66
21 #define QIXIS_LBMAP_SWITCH              1
22 #define QIXIS_LBMAP_MASK                0x0f
23 #define QIXIS_LBMAP_SHIFT               5
24 #define QIXIS_LBMAP_DFLTBANK            0x00
25 #define QIXIS_LBMAP_ALTBANK             0x00
26 #define QIXIS_LBMAP_SD                  0x00
27 #define QIXIS_LBMAP_EMMC                0x00
28 #define QIXIS_LBMAP_QSPI                0x00
29 #define QIXIS_RCW_SRC_SD                0x8
30 #define QIXIS_RCW_SRC_EMMC              0x9
31 #define QIXIS_RCW_SRC_QSPI              0xf
32 #define QIXIS_RST_CTL_RESET             0x31
33 #define QIXIS_RCFG_CTL_RECONFIG_IDLE    0x20
34 #define QIXIS_RCFG_CTL_RECONFIG_START   0x21
35 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE   0x08
36 #define QIXIS_RST_FORCE_MEM             0x01
37
38 #define CONFIG_SYS_FPGA_CSPR_EXT        (0x0)
39 #define CONFIG_SYS_FPGA_CSPR            (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
40                                         CSPR_PORT_SIZE_8 | \
41                                         CSPR_MSEL_GPCM | \
42                                         CSPR_V)
43 #define CONFIG_SYS_FPGA_AMASK           IFC_AMASK(64 * 1024)
44 #define CONFIG_SYS_FPGA_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
45                                         CSOR_NOR_NOR_MODE_AVD_NOR | \
46                                         CSOR_NOR_TRHZ_80)
47 #endif
48
49 /* RTC */
50 #define CONFIG_SYS_RTC_BUS_NUM         1
51 #define I2C_MUX_CH_RTC                 0xB
52
53 /* Store environment at top of flash */
54
55 /* LPUART */
56 #ifdef CONFIG_LPUART
57 #define CFG_LPUART_MUX_MASK     0xf0
58 #define CFG_LPUART_EN           0xf0
59 #endif
60
61 /* SATA */
62
63 #ifndef SPL_NO_ENV
64 #undef CONFIG_EXTRA_ENV_SETTINGS
65 #define CONFIG_EXTRA_ENV_SETTINGS \
66         "board=ls1028aqds\0" \
67         "hwconfig=fsl_ddr:bank_intlv=auto\0" \
68         "ramdisk_addr=0x800000\0" \
69         "ramdisk_size=0x2000000\0" \
70         "kernel_addr=0x01000000\0" \
71         "scriptaddr=0x80000000\0" \
72         "scripthdraddr=0x80080000\0" \
73         "fdtheader_addr_r=0x80100000\0" \
74         "kernelheader_addr_r=0x80200000\0" \
75         "load_addr=0xa0000000\0" \
76         "kernel_addr_r=0x81000000\0" \
77         "fdt_addr_r=0x90000000\0" \
78         "fdt2_addr_r=0x90010000\0" \
79         "ramdisk_addr_r=0xa0000000\0" \
80         "kernel_start=0x1000000\0" \
81         "kernelheader_start=0x600000\0" \
82         "kernel_load=0xa0000000\0" \
83         "kernel_size=0x2800000\0" \
84         "kernelheader_size=0x40000\0" \
85         "kernel_addr_sd=0x8000\0" \
86         "kernel_size_sd=0x14000\0" \
87         "kernelhdr_addr_sd=0x3000\0" \
88         "kernelhdr_size_sd=0x10\0" \
89         "console=ttyS0,115200\0" \
90         BOOTENV \
91         "boot_scripts=ls1028aqds_boot.scr\0" \
92         "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
93         "scan_dev_for_boot_part=" \
94                 "part list ${devtype} ${devnum} devplist; " \
95                 "env exists devplist || setenv devplist 1; " \
96                 "for distro_bootpart in ${devplist}; do " \
97                   "if fstype ${devtype} " \
98                         "${devnum}:${distro_bootpart} " \
99                         "bootfstype; then " \
100                         "run scan_dev_for_boot; " \
101                   "fi; " \
102                 "done\0" \
103         "boot_a_script=" \
104                 "load ${devtype} ${devnum}:${distro_bootpart} " \
105                         "${scriptaddr} ${prefix}${script}; " \
106                 "env exists secureboot && load ${devtype} " \
107                         "${devnum}:${distro_bootpart} " \
108                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
109                         "&& esbc_validate ${scripthdraddr};" \
110                 "source ${scriptaddr}\0" \
111         "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
112                 "sf probe 0:0 && sf read $load_addr " \
113                 "$kernel_start $kernel_size ; env exists secureboot &&" \
114                 "sf read $kernelheader_addr_r $kernelheader_start " \
115                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
116                 " bootm $load_addr#$board\0" \
117         "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
118                 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
119                 "&& hdp load $load_addr 0x2000\0"                       \
120         "sd_bootcmd=echo Trying load from SD ...;" \
121                 "mmc dev 0; mmcinfo; mmc read $load_addr "              \
122                 "$kernel_addr_sd $kernel_size_sd && "   \
123                 "env exists secureboot && mmc read $kernelheader_addr_r " \
124                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
125                 " && esbc_validate ${kernelheader_addr_r};"     \
126                 "bootm $load_addr#$board\0"             \
127         "sd_hdploadcmd=echo Trying load HDP firmware from SD..;"        \
128                 "mmc dev 0;mmcinfo; mmc read $load_addr 0x4a00 0x200 "  \
129                 "&& hdp load $load_addr 0x2000\0"       \
130         "emmc_bootcmd=echo Trying load from EMMC ..;"   \
131                 "mmc dev 1; mmcinfo; mmc read $load_addr "              \
132                 "$kernel_addr_sd $kernel_size_sd && "   \
133                 "env exists secureboot && mmc read $kernelheader_addr_r " \
134                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
135                 " && esbc_validate ${kernelheader_addr_r};"     \
136                 "bootm $load_addr#$board\0"                     \
137         "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;"      \
138                 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 "   \
139                 "&& hdp load $load_addr 0x2000\0"
140
141 #endif
142 #endif /* __LS1028A_QDS_H */