8fe54f674cd4a70cb0b6b4c0537816aa3b3f60c6
[platform/kernel/u-boot.git] / include / configs / imx8ulp_evk.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2020 NXP
4  */
5
6 #ifndef __IMX8ULP_EVK_H
7 #define __IMX8ULP_EVK_H
8
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
11
12 #define CONFIG_SYS_BOOTM_LEN            (SZ_64M)
13 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
14 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
15
16 #ifdef CONFIG_SPL_BUILD
17 #define CONFIG_SPL_STACK                0x22050000
18 #define CONFIG_SPL_BSS_START_ADDR       0x22048000
19 #define CONFIG_SYS_SPL_MALLOC_START     0x22040000
20 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x8000  /* 32 KB */
21
22 #define CONFIG_MALLOC_F_ADDR            0x22040000
23
24 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
25
26 #endif
27
28 /* ENET Config */
29 #if defined(CONFIG_FEC_MXC)
30 #define PHY_ANEG_TIMEOUT                20000
31
32 #define CONFIG_FEC_MXC_PHYADDR          1
33 #endif
34
35 #ifdef CONFIG_DISTRO_DEFAULTS
36 #define BOOT_TARGET_DEVICES(func) \
37         func(MMC, mmc, 0)
38
39 #include <config_distro_bootcmd.h>
40 #else
41 #define BOOTENV
42 #endif
43
44 /* Initial environment variables */
45 #define CONFIG_EXTRA_ENV_SETTINGS               \
46         BOOTENV \
47         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
48         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
49         "image=Image\0" \
50         "console=ttyLP1,115200 earlycon\0" \
51         "fdt_addr_r=0x83000000\0"                       \
52         "boot_fit=no\0" \
53         "fdtfile=imx8ulp-evk.dtb\0" \
54         "initrd_addr=0x83800000\0"              \
55         "bootm_size=0x10000000\0" \
56         "mmcpart=1\0" \
57         "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
58
59 /* Link Definitions */
60
61 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
62 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
63
64
65 #define CONFIG_SYS_SDRAM_BASE           0x80000000
66 #define PHYS_SDRAM                      0x80000000
67 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
68
69 /* Using ULP WDOG for reset */
70 #define WDOG_BASE_ADDR                  WDG3_RBASE
71 #endif