include/configs/imx8mq_phanbell.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2020 NXP
   4  */
   5
   6 #ifndef __IMX8M_PHANBELL_H
   7 #define __IMX8M_PHANBELL_H
   8
   9 #include <linux/sizes.h>
  10 #include <asm/arch/imx-regs.h>
  11
  12 #define CONFIG_SPL_MAX_SIZE             (172 * 1024)
  13 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  14
  15 #ifdef CONFIG_SPL_BUILD
  16 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  17 #define CONFIG_SPL_STACK                0x187FF0
  18 #define CONFIG_SPL_BSS_START_ADDR      0x00180000
  19 #define CONFIG_SPL_BSS_MAX_SIZE        0x2000   /* 8 KB */
  20 #define CONFIG_SYS_SPL_MALLOC_START    0x42200000
  21 #define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000   /* 512 KB */
  22 #define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
  23
  24 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  25 #define CONFIG_MALLOC_F_ADDR            0x182000
  26 /* For RAW image gives a error info not panic */
  27 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  28 #endif
  29
  30 /* ENET Config */
  31 /* ENET1 */
  32 #if defined(CONFIG_CMD_NET)
  33 #define CONFIG_FEC_MXC_PHYADDR          0
  34 #endif
  35
  36 #define CONFIG_MFG_ENV_SETTINGS \
  37         "initrd_addr=0x43800000\0" \
  38         "initrd_high=0xffffffff\0" \
  39
  40 /* Initial environment variables */
  41 #define CONFIG_EXTRA_ENV_SETTINGS               \
  42         CONFIG_MFG_ENV_SETTINGS \
  43         "script=boot.scr\0" \
  44         "image=Image\0" \
  45         "console=ttymxc0,115200\0" \
  46         "fdt_addr=0x43000000\0"                 \
  47         "fdt_high=0xffffffffffffffff\0"         \
  48         "boot_fdt=try\0" \
  49         "fdt_file=imx8mq-phanbell.dtb\0" \
  50         "initrd_addr=0x43800000\0"              \
  51         "initrd_high=0xffffffffffffffff\0" \
  52         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  53         "mmcpart=1\0" \
  54         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  55         "mmcautodetect=yes\0" \
  56         "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
  57         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  58         "bootscript=echo Running bootscript from mmc ...; " \
  59                 "source\0" \
  60         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  61         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  62         "mmcboot=echo Booting from mmc ...; " \
  63                 "run mmcargs; " \
  64                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  65                         "if run loadfdt; then " \
  66                                 "booti ${loadaddr} - ${fdt_addr}; " \
  67                         "else " \
  68                                 "echo WARN: Cannot load the DT; " \
  69                         "fi; " \
  70                 "else " \
  71                         "echo wait for boot; " \
  72                 "fi;\0" \
  73         "netargs=setenv bootargs console=${console} " \
  74                 "root=/dev/nfs " \
  75                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  76         "netboot=echo Booting from net ...; " \
  77                 "run netargs;  " \
  78                 "if test ${ip_dyn} = yes; then " \
  79                         "setenv get_cmd dhcp; " \
  80                 "else " \
  81                         "setenv get_cmd tftp; " \
  82                 "fi; " \
  83                 "${get_cmd} ${loadaddr} ${image}; " \
  84                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  85                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  86                                 "booti ${loadaddr} - ${fdt_addr}; " \
  87                         "else " \
  88                                 "echo WARN: Cannot load the DT; " \
  89                         "fi; " \
  90                 "else " \
  91                         "booti; " \
  92                 "fi;\0"
  93
  94 /* Link Definitions */
  95
  96 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  97 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
  98 #define CONFIG_SYS_INIT_SP_OFFSET \
  99         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 100 #define CONFIG_SYS_INIT_SP_ADDR \
 101         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 102
 103
 104 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 105 #define PHYS_SDRAM                      0x40000000
 106 #define PHYS_SDRAM_SIZE                 0x40000000 /* 1GB DDR */
 107
 108 #define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(1)
 109
 110 #define CONFIG_SYS_FSL_USDHC_NUM        2
 111 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 112
 113 #endif