Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
[platform/kernel/u-boot.git] / include / configs / imx8mq_cm.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2018 NXP
4  */
5
6 #ifndef __IMX8M_CM_H
7 #define __IMX8M_CM_H
8
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
12
13 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
14
15 #define CONFIG_SPL_MAX_SIZE             (124 * 1024)
16 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
17
18 #ifdef CONFIG_SPL_BUILD
19 #define CONFIG_SPL_STACK                0x187FF0
20 #define CONFIG_SPL_BSS_START_ADDR      0x00180000
21 #define CONFIG_SPL_BSS_MAX_SIZE        0x2000   /* 8 KB */
22 #define CONFIG_SYS_SPL_MALLOC_START    0x42200000
23 #define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000   /* 512 KB */
24 #define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
25
26 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
27 #define CONFIG_MALLOC_F_ADDR            0x182000
28 /* For RAW image gives a error info not panic */
29 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
30
31 #endif
32
33 /* ENET Config */
34 /* ENET1 */
35 #if defined(CONFIG_CMD_NET)
36 #define CONFIG_ETHPRIME                 "FEC"
37 #endif
38
39 #ifndef CONFIG_SPL_BUILD
40 #define BOOT_TARGET_DEVICES(func) \
41                 func(MMC, mmc, 0) \
42                 func(MMC, mmc, 1) \
43                 func(DHCP, dhcp, na)
44
45 #include <config_distro_bootcmd.h>
46 #endif
47
48 /* Initial environment variables */
49 #define CONFIG_EXTRA_ENV_SETTINGS               \
50         BOOTENV \
51         "scriptaddr=0x43500000\0" \
52         "kernel_addr_r=0x40880000\0" \
53         "image=Image\0" \
54         "console=ttymxc0,115200\0" \
55         "fdt_addr=0x43000000\0"                 \
56         "boot_fdt=try\0" \
57         "fdt_file=imx8mq-cm.dtb\0" \
58         "initrd_addr=0x43800000\0"              \
59         "bootm_size=0x10000000\0" \
60         "mmcpart=1\0" \
61         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
62
63 /* Link Definitions */
64
65 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
66 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
67 #define CONFIG_SYS_INIT_SP_OFFSET \
68         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
69 #define CONFIG_SYS_INIT_SP_ADDR \
70         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
71
72 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
73
74 #define CONFIG_SYS_SDRAM_BASE           0x40000000
75 #define PHYS_SDRAM                      0x40000000
76 #define PHYS_SDRAM_SIZE                                 0x40000000 /* 1 GB DDR */
77
78 #define CONFIG_MXC_UART_BASE            UART1_BASE_ADDR
79
80 /* Monitor Command Prompt */
81 #define CONFIG_SYS_CBSIZE               1024
82 #define CONFIG_SYS_MAXARGS              64
83 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
84 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
85                                         sizeof(CONFIG_SYS_PROMPT) + 16)
86
87 #define CONFIG_SYS_FSL_USDHC_NUM                2
88 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
89
90 #endif