include/configs/imx8mp_rsb3720.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  * Copyright 2022 Linaro
   5  */
   6
   7 #ifndef __IMX8MP_RSB3720_H
   8 #define __IMX8MP_RSB3720_H
   9
  10 #include <linux/sizes.h>
  11 #include <linux/stringify.h>
  12 #include <asm/arch/imx-regs.h>
  13 #include <config_distro_bootcmd.h>
  14
  15 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  16
  17 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  18 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  19
  20 /* GUIDs for capsule updatable firmware images */
  21 #define IMX8MP_RSB3720A1_4G_FIT_IMAGE_GUID \
  22         EFI_GUID(0xb1251e89, 0x384a, 0x4635, 0xa8, 0x06, \
  23                  0x3a, 0xa0, 0xb0, 0xe9, 0xf9, 0x65)
  24
  25 #define IMX8MP_RSB3720A1_6G_FIT_IMAGE_GUID \
  26         EFI_GUID(0xb5fb6f08, 0xe142, 0x4db1, 0x97, 0xea, \
  27                  0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9)
  28
  29 #ifdef CONFIG_SPL_BUILD
  30 #define CONFIG_SPL_STACK                0x960000
  31 #define CONFIG_SPL_BSS_START_ADDR       0x0098FC00
  32 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KB */
  33 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  34 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  35
  36 #define CONFIG_MALLOC_F_ADDR            0x184000 /* malloc f used before \
  37                                                   * GD_FLG_FULL_MALLOC_INIT \
  38                                                   * set \
  39                                                   */
  40
  41 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  42
  43 #if defined(CONFIG_NAND_BOOT)
  44 #define CONFIG_SPL_NAND_MXS
  45 #endif
  46
  47 #endif
  48
  49 /* ENET Config */
  50 /* ENET1 */
  51 #if defined(CONFIG_CMD_NET)
  52 #define CONFIG_FEC_MXC_PHYADDR          4
  53
  54 #define DWC_NET_PHYADDR                 4
  55 #ifdef CONFIG_DWC_ETH_QOS
  56 #define CONFIG_SYS_NONCACHED_MEMORY     (1 * SZ_1M)     /* 1M */
  57 #endif
  58
  59 #define PHY_ANEG_TIMEOUT 20000
  60
  61 #endif
  62
  63 #if CONFIG_IS_ENABLED(CMD_MMC)
  64 # define BOOT_TARGET_MMC(func) \
  65         func(MMC, mmc, 2)      \
  66         func(MMC, mmc, 1)
  67 #else
  68 # define BOOT_TARGET_MMC(func)
  69 #endif
  70
  71 #if CONFIG_IS_ENABLED(CMD_PXE)
  72 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
  73 #else
  74 # define BOOT_TARGET_PXE(func)
  75 #endif
  76
  77 #if CONFIG_IS_ENABLED(CMD_DHCP)
  78 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
  79 #else
  80 # define BOOT_TARGET_DHCP(func)
  81 #endif
  82
  83 #define BOOT_TARGET_DEVICES(func) \
  84         BOOT_TARGET_MMC(func) \
  85         BOOT_TARGET_PXE(func) \
  86         BOOT_TARGET_DHCP(func)
  87
  88 /* Initial environment variables */
  89 #define CONFIG_EXTRA_ENV_SETTINGS               \
  90         BOOTENV \
  91         "script=boot.scr\0" \
  92         "image=Image\0" \
  93         "splashimage=0x50000000\0" \
  94         "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
  95         "fdt_addr=0x43000000\0"                 \
  96         "fdt_addr_r=0x43000000\0"                       \
  97         "boot_fit=no\0" \
  98         "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \
  99         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
 100         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
 101         "initrd_addr=0x43800000\0"              \
 102         "bootm_size=0x10000000\0" \
 103         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
 104         "mmcpart=1\0" \
 105         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 106         "mmcautodetect=yes\0" \
 107         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
 108         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 109         "bootscript=echo Running bootscript from mmc ...; " \
 110                 "source\0" \
 111         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
 112         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
 113         "kernel_addr_r=0x40480000\0" \
 114         "pxefile_addr_r=0x40480000\0" \
 115         "ramdisk_addr_r=0x43800000\0" \
 116         "mmcboot=echo Booting from mmc ...; " \
 117                 "run mmcargs; " \
 118                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 119                         "bootm ${loadaddr}; " \
 120                 "else " \
 121                         "if run loadfdt; then " \
 122                                 "booti ${loadaddr} - ${fdt_addr}; " \
 123                         "else " \
 124                                 "echo WARN: Cannot load the DT; " \
 125                         "fi; " \
 126                 "fi;\0" \
 127         "netargs=setenv bootargs ${jh_clk} console=${console} " \
 128                 "root=/dev/nfs " \
 129                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 130         "netboot=echo Booting from net ...; " \
 131                 "run netargs;  " \
 132                 "if test ${ip_dyn} = yes; then " \
 133                         "setenv get_cmd dhcp; " \
 134                 "else " \
 135                         "setenv get_cmd tftp; " \
 136                 "fi; " \
 137                 "${get_cmd} ${loadaddr} ${image}; " \
 138                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 139                         "bootm ${loadaddr}; " \
 140                 "else " \
 141                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 142                                 "booti ${loadaddr} - ${fdt_addr}; " \
 143                         "else " \
 144                                 "echo WARN: Cannot load the DT; " \
 145                         "fi; " \
 146                 "fi;\0"
 147
 148 /* Link Definitions */
 149 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 150 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 151 #define CONFIG_SYS_INIT_SP_OFFSET \
 152         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 153 #define CONFIG_SYS_INIT_SP_ADDR \
 154         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 155
 156
 157 /* Totally 6GB or 4G DDR */
 158 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 159 #define PHYS_SDRAM                      0x40000000
 160 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G)
 161 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
 162 #define PHYS_SDRAM_2                    0x100000000
 163 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
 164 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
 165 #define PHYS_SDRAM_SIZE                 0x80000000      /* 2 GB */
 166 #define PHYS_SDRAM_2                    0xC0000000
 167 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
 168 #endif
 169
 170 #define CONFIG_MXC_UART_BASE            UART3_BASE_ADDR
 171
 172 #define CONFIG_SYS_FSL_USDHC_NUM        2
 173 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 174
 175 #ifdef CONFIG_FSL_FSPI
 176 #define FSL_FSPI_FLASH_SIZE             SZ_32M
 177 #define FSL_FSPI_FLASH_NUM              1
 178 #define FSPI0_BASE_ADDR                 0x30bb0000
 179 #define FSPI0_AMBA_BASE                 0x0
 180 #define CONFIG_FSPI_QUAD_SUPPORT
 181
 182 #define CONFIG_SYS_FSL_FSPI_AHB
 183 #endif
 184
 185 #ifdef CONFIG_NAND_MXS
 186
 187 /* NAND stuff */
 188 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 189 #define CONFIG_SYS_NAND_BASE           0x20000000
 190 #endif /* CONFIG_NAND_MXS */
 191
 192 #endif /* __IMX8MP_RSB3720_H */