include/configs/imx8mp_rsb3720.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  * Copyright 2022 Linaro
   5  */
   6
   7 #ifndef __IMX8MP_RSB3720_H
   8 #define __IMX8MP_RSB3720_H
   9
  10 #include <linux/sizes.h>
  11 #include <linux/stringify.h>
  12 #include <asm/arch/imx-regs.h>
  13 #include <config_distro_bootcmd.h>
  14
  15 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  16
  17 /* GUIDs for capsule updatable firmware images */
  18 #define IMX8MP_RSB3720A1_4G_FIT_IMAGE_GUID \
  19         EFI_GUID(0xb1251e89, 0x384a, 0x4635, 0xa8, 0x06, \
  20                  0x3a, 0xa0, 0xb0, 0xe9, 0xf9, 0x65)
  21
  22 #define IMX8MP_RSB3720A1_6G_FIT_IMAGE_GUID \
  23         EFI_GUID(0xb5fb6f08, 0xe142, 0x4db1, 0x97, 0xea, \
  24                  0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9)
  25
  26 #ifdef CONFIG_SPL_BUILD
  27 #define CONFIG_MALLOC_F_ADDR            0x184000 /* malloc f used before \
  28                                                   * GD_FLG_FULL_MALLOC_INIT \
  29                                                   * set \
  30                                                   */
  31
  32
  33 #if defined(CONFIG_NAND_BOOT)
  34 #define CONFIG_SPL_NAND_MXS
  35 #endif
  36
  37 #endif
  38
  39 /* ENET Config */
  40 /* ENET1 */
  41 #if defined(CONFIG_CMD_NET)
  42 #define CONFIG_FEC_MXC_PHYADDR          4
  43
  44 #define PHY_ANEG_TIMEOUT 20000
  45
  46 #endif
  47
  48 #if CONFIG_IS_ENABLED(CMD_MMC)
  49 # define BOOT_TARGET_MMC(func) \
  50         func(MMC, mmc, 2)      \
  51         func(MMC, mmc, 1)
  52 #else
  53 # define BOOT_TARGET_MMC(func)
  54 #endif
  55
  56 #if CONFIG_IS_ENABLED(CMD_PXE)
  57 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
  58 #else
  59 # define BOOT_TARGET_PXE(func)
  60 #endif
  61
  62 #if CONFIG_IS_ENABLED(CMD_DHCP)
  63 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
  64 #else
  65 # define BOOT_TARGET_DHCP(func)
  66 #endif
  67
  68 #define BOOT_TARGET_DEVICES(func) \
  69         BOOT_TARGET_MMC(func) \
  70         BOOT_TARGET_PXE(func) \
  71         BOOT_TARGET_DHCP(func)
  72
  73 /* Initial environment variables */
  74 #define CONFIG_EXTRA_ENV_SETTINGS               \
  75         BOOTENV \
  76         "script=boot.scr\0" \
  77         "image=Image\0" \
  78         "splashimage=0x50000000\0" \
  79         "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
  80         "fdt_addr=0x43000000\0"                 \
  81         "fdt_addr_r=0x43000000\0"                       \
  82         "boot_fit=no\0" \
  83         "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \
  84         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  85         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  86         "initrd_addr=0x43800000\0"              \
  87         "bootm_size=0x10000000\0" \
  88         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
  89         "mmcpart=1\0" \
  90         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  91         "mmcautodetect=yes\0" \
  92         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
  93         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  94         "bootscript=echo Running bootscript from mmc ...; " \
  95                 "source\0" \
  96         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  97         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  98         "kernel_addr_r=0x40480000\0" \
  99         "pxefile_addr_r=0x40480000\0" \
 100         "ramdisk_addr_r=0x43800000\0" \
 101         "mmcboot=echo Booting from mmc ...; " \
 102                 "run mmcargs; " \
 103                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 104                         "bootm ${loadaddr}; " \
 105                 "else " \
 106                         "if run loadfdt; then " \
 107                                 "booti ${loadaddr} - ${fdt_addr}; " \
 108                         "else " \
 109                                 "echo WARN: Cannot load the DT; " \
 110                         "fi; " \
 111                 "fi;\0" \
 112         "netargs=setenv bootargs ${jh_clk} console=${console} " \
 113                 "root=/dev/nfs " \
 114                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 115         "netboot=echo Booting from net ...; " \
 116                 "run netargs;  " \
 117                 "if test ${ip_dyn} = yes; then " \
 118                         "setenv get_cmd dhcp; " \
 119                 "else " \
 120                         "setenv get_cmd tftp; " \
 121                 "fi; " \
 122                 "${get_cmd} ${loadaddr} ${image}; " \
 123                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 124                         "bootm ${loadaddr}; " \
 125                 "else " \
 126                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 127                                 "booti ${loadaddr} - ${fdt_addr}; " \
 128                         "else " \
 129                                 "echo WARN: Cannot load the DT; " \
 130                         "fi; " \
 131                 "fi;\0"
 132
 133 /* Link Definitions */
 134 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 135 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 136
 137
 138 /* Totally 6GB or 4G DDR */
 139 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 140 #define PHYS_SDRAM                      0x40000000
 141 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G)
 142 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
 143 #define PHYS_SDRAM_2                    0x100000000
 144 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
 145 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
 146 #define PHYS_SDRAM_SIZE                 0x80000000      /* 2 GB */
 147 #define PHYS_SDRAM_2                    0xC0000000
 148 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
 149 #endif
 150
 151 #define CONFIG_MXC_UART_BASE            UART3_BASE_ADDR
 152
 153 #define CFG_SYS_FSL_USDHC_NUM   2
 154 #define CFG_SYS_FSL_ESDHC_ADDR  0
 155
 156 #ifdef CONFIG_FSL_FSPI
 157 #define FSL_FSPI_FLASH_SIZE             SZ_32M
 158 #define FSL_FSPI_FLASH_NUM              1
 159 #define FSPI0_BASE_ADDR                 0x30bb0000
 160 #define FSPI0_AMBA_BASE                 0x0
 161 #define CONFIG_FSPI_QUAD_SUPPORT
 162
 163 #define CONFIG_SYS_FSL_FSPI_AHB
 164 #endif
 165
 166 #ifdef CONFIG_NAND_MXS
 167
 168 /* NAND stuff */
 169 #define CONFIG_SYS_NAND_BASE           0x20000000
 170 #endif /* CONFIG_NAND_MXS */
 171
 172 #endif /* __IMX8MP_RSB3720_H */