31f23e30a6a315d0668567b955c21daaed3fdedc
[platform/kernel/u-boot.git] / include / configs / imx8mp_rsb3720.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2019 NXP
4  * Copyright 2022 Linaro
5  */
6
7 #ifndef __IMX8MP_RSB3720_H
8 #define __IMX8MP_RSB3720_H
9
10 #include <linux/sizes.h>
11 #include <linux/stringify.h>
12 #include <asm/arch/imx-regs.h>
13 #include <config_distro_bootcmd.h>
14
15 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
16
17 #define CONFIG_SPL_MAX_SIZE             (152 * 1024)
18 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
19 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
20
21 /* GUIDs for capsule updatable firmware images */
22 #define IMX8MP_RSB3720A1_4G_FIT_IMAGE_GUID \
23         EFI_GUID(0xb1251e89, 0x384a, 0x4635, 0xa8, 0x06, \
24                  0x3a, 0xa0, 0xb0, 0xe9, 0xf9, 0x65)
25
26 #define IMX8MP_RSB3720A1_6G_FIT_IMAGE_GUID \
27         EFI_GUID(0xb5fb6f08, 0xe142, 0x4db1, 0x97, 0xea, \
28                  0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9)
29
30 #ifdef CONFIG_SPL_BUILD
31 #define CONFIG_SPL_STACK                0x960000
32 #define CONFIG_SPL_BSS_START_ADDR       0x0098FC00
33 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KB */
34 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
35 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
36
37 #define CONFIG_MALLOC_F_ADDR            0x184000 /* malloc f used before \
38                                                   * GD_FLG_FULL_MALLOC_INIT \
39                                                   * set \
40                                                   */
41
42 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
43
44 #if defined(CONFIG_NAND_BOOT)
45 #define CONFIG_SPL_NAND_MXS
46 #endif
47
48 #endif
49
50 /* ENET Config */
51 /* ENET1 */
52 #if defined(CONFIG_CMD_NET)
53 #define CONFIG_FEC_MXC_PHYADDR          4
54
55 #define DWC_NET_PHYADDR                 4
56 #ifdef CONFIG_DWC_ETH_QOS
57 #define CONFIG_SYS_NONCACHED_MEMORY     (1 * SZ_1M)     /* 1M */
58 #endif
59
60 #define PHY_ANEG_TIMEOUT 20000
61
62 #endif
63
64 #if CONFIG_IS_ENABLED(CMD_MMC)
65 # define BOOT_TARGET_MMC(func) \
66         func(MMC, mmc, 2)      \
67         func(MMC, mmc, 1)
68 #else
69 # define BOOT_TARGET_MMC(func)
70 #endif
71
72 #if CONFIG_IS_ENABLED(CMD_PXE)
73 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
74 #else
75 # define BOOT_TARGET_PXE(func)
76 #endif
77
78 #if CONFIG_IS_ENABLED(CMD_DHCP)
79 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
80 #else
81 # define BOOT_TARGET_DHCP(func)
82 #endif
83
84 #define BOOT_TARGET_DEVICES(func) \
85         BOOT_TARGET_MMC(func) \
86         BOOT_TARGET_PXE(func) \
87         BOOT_TARGET_DHCP(func)
88
89 /* Initial environment variables */
90 #define CONFIG_EXTRA_ENV_SETTINGS               \
91         BOOTENV \
92         "script=boot.scr\0" \
93         "image=Image\0" \
94         "splashimage=0x50000000\0" \
95         "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
96         "fdt_addr=0x43000000\0"                 \
97         "fdt_addr_r=0x43000000\0"                       \
98         "boot_fit=no\0" \
99         "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \
100         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
101         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
102         "initrd_addr=0x43800000\0"              \
103         "bootm_size=0x10000000\0" \
104         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
105         "mmcpart=1\0" \
106         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
107         "mmcautodetect=yes\0" \
108         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
109         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
110         "bootscript=echo Running bootscript from mmc ...; " \
111                 "source\0" \
112         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
113         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
114         "kernel_addr_r=0x40480000\0" \
115         "pxefile_addr_r=0x40480000\0" \
116         "ramdisk_addr_r=0x43800000\0" \
117         "mmcboot=echo Booting from mmc ...; " \
118                 "run mmcargs; " \
119                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
120                         "bootm ${loadaddr}; " \
121                 "else " \
122                         "if run loadfdt; then " \
123                                 "booti ${loadaddr} - ${fdt_addr}; " \
124                         "else " \
125                                 "echo WARN: Cannot load the DT; " \
126                         "fi; " \
127                 "fi;\0" \
128         "netargs=setenv bootargs ${jh_clk} console=${console} " \
129                 "root=/dev/nfs " \
130                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
131         "netboot=echo Booting from net ...; " \
132                 "run netargs;  " \
133                 "if test ${ip_dyn} = yes; then " \
134                         "setenv get_cmd dhcp; " \
135                 "else " \
136                         "setenv get_cmd tftp; " \
137                 "fi; " \
138                 "${get_cmd} ${loadaddr} ${image}; " \
139                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
140                         "bootm ${loadaddr}; " \
141                 "else " \
142                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
143                                 "booti ${loadaddr} - ${fdt_addr}; " \
144                         "else " \
145                                 "echo WARN: Cannot load the DT; " \
146                         "fi; " \
147                 "fi;\0"
148
149 /* Link Definitions */
150 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
151 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
152 #define CONFIG_SYS_INIT_SP_OFFSET \
153         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
154 #define CONFIG_SYS_INIT_SP_ADDR \
155         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
156
157
158 /* Totally 6GB or 4G DDR */
159 #define CONFIG_SYS_SDRAM_BASE           0x40000000
160 #define PHYS_SDRAM                      0x40000000
161 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G)
162 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
163 #define PHYS_SDRAM_2                    0x100000000
164 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
165 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
166 #define PHYS_SDRAM_SIZE                 0x80000000      /* 2 GB */
167 #define PHYS_SDRAM_2                    0xC0000000
168 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
169 #endif
170
171 #define CONFIG_MXC_UART_BASE            UART3_BASE_ADDR
172
173 #define CONFIG_SYS_FSL_USDHC_NUM        2
174 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
175
176 #ifdef CONFIG_FSL_FSPI
177 #define FSL_FSPI_FLASH_SIZE             SZ_32M
178 #define FSL_FSPI_FLASH_NUM              1
179 #define FSPI0_BASE_ADDR                 0x30bb0000
180 #define FSPI0_AMBA_BASE                 0x0
181 #define CONFIG_FSPI_QUAD_SUPPORT
182
183 #define CONFIG_SYS_FSL_FSPI_AHB
184 #endif
185
186 #ifdef CONFIG_NAND_MXS
187
188 /* NAND stuff */
189 #define CONFIG_SYS_MAX_NAND_DEVICE     1
190 #define CONFIG_SYS_NAND_BASE           0x20000000
191 #endif /* CONFIG_NAND_MXS */
192
193 #endif /* __IMX8MP_RSB3720_H */