include/configs/imx8mn_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2018 NXP
   4  */
   5
   6 #ifndef __IMX8MN_EVK_H
   7 #define __IMX8MN_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  14
  15 #define CONFIG_SPL_MAX_SIZE             (148 * 1024)
  16 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
  17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  19 #define CONFIG_SYS_UBOOT_BASE   \
  20         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  21
  22 #ifdef CONFIG_SPL_BUILD
  23 #define CONFIG_SPL_STACK                0x980000
  24 #define CONFIG_SPL_BSS_START_ADDR       0x950000
  25 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_8K   /* 8 KB */
  26 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  27 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  28
  29 /* For RAW image gives a error info not panic */
  30 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  31
  32 #endif
  33
  34 #ifndef CONFIG_SPL_BUILD
  35 #define BOOT_TARGET_DEVICES(func) \
  36         func(MMC, mmc, 1) \
  37         func(MMC, mmc, 2) \
  38         func(DHCP, dhcp, na)
  39
  40 #include <config_distro_bootcmd.h>
  41 #endif
  42
  43 /* Initial environment variables */
  44 #define CONFIG_EXTRA_ENV_SETTINGS               \
  45         "image=Image\0" \
  46         BOOTENV \
  47         "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
  48         "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
  49         "console=ttymxc1,115200\0" \
  50         "fdt_addr_r=0x43000000\0"                       \
  51         "boot_fit=no\0" \
  52         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  53         "initrd_addr=0x43800000\0"              \
  54         "bootm_size=0x10000000\0" \
  55         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  56         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  57
  58 /* Link Definitions */
  59 #define CONFIG_LOADADDR                 0x40480000
  60
  61 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
  62
  63 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  64 #define CONFIG_SYS_INIT_RAM_SIZE        0x200000
  65 #define CONFIG_SYS_INIT_SP_OFFSET \
  66         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  67 #define CONFIG_SYS_INIT_SP_ADDR \
  68         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  69
  70 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
  71
  72 /* Size of malloc() pool */
  73 #define CONFIG_SYS_MALLOC_LEN           SZ_32M
  74
  75 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  76 #define PHYS_SDRAM                      0x40000000
  77 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
  78
  79 #define CONFIG_MXC_UART_BASE            UART2_BASE_ADDR
  80
  81 /* Monitor Command Prompt */
  82 #define CONFIG_SYS_CBSIZE               2048
  83 #define CONFIG_SYS_MAXARGS              64
  84 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  85 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
  86                                         sizeof(CONFIG_SYS_PROMPT) + 16)
  87
  88 /* USDHC */
  89 #define CONFIG_FSL_USDHC
  90
  91 #define CONFIG_SYS_FSL_USDHC_NUM        2
  92 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  93
  94 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
  95
  96 #define CONFIG_SYS_I2C_SPEED            100000
  97
  98 #endif