include/configs/imx8mm_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __IMX8MM_EVK_H
   7 #define __IMX8MM_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define UBOOT_ITB_OFFSET                        0x57C00
  14 #define FSPI_CONF_BLOCK_SIZE            0x1000
  15 #define UBOOT_ITB_OFFSET_FSPI  \
  16         (UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE)
  17 #ifdef CONFIG_FSPI_CONF_HEADER
  18 #define CFG_SYS_UBOOT_BASE  \
  19         (QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI)
  20 #else
  21 #define CFG_SYS_UBOOT_BASE      \
  22         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  23 #endif
  24
  25 #ifdef CONFIG_SPL_BUILD
  26 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  27 #define CONFIG_MALLOC_F_ADDR            0x930000
  28 /* For RAW image gives a error info not panic */
  29
  30 #endif
  31
  32 #define BOOT_TARGET_DEVICES(func) \
  33         func(MMC, mmc, 1) \
  34         func(MMC, mmc, 2) \
  35         func(DHCP, dhcp, na)
  36
  37 #include <config_distro_bootcmd.h>
  38
  39 /* Initial environment variables */
  40 #define CFG_EXTRA_ENV_SETTINGS          \
  41         BOOTENV \
  42         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  43         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  44         "image=Image\0" \
  45         "console=ttymxc1,115200\0" \
  46         "fdt_addr_r=0x43000000\0"                       \
  47         "boot_fit=no\0" \
  48         "fdtfile=imx8mm-evk.dtb\0" \
  49         "initrd_addr=0x43800000\0"              \
  50         "bootm_size=0x10000000\0" \
  51         "mmcpart=1\0" \
  52         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  53
  54 /* Link Definitions */
  55
  56 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
  57 #define CFG_SYS_INIT_RAM_SIZE        0x200000
  58
  59
  60 #define CFG_SYS_SDRAM_BASE           0x40000000
  61 #define PHYS_SDRAM                      0x40000000
  62 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
  63
  64 #define CONFIG_FEC_MXC_PHYADDR          0
  65
  66 #endif