include/configs/imx8mm_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __IMX8MM_EVK_H
   7 #define __IMX8MM_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define CONFIG_SYS_BOOTM_LEN            (64 * SZ_1M)
  14 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
  15 #define CONFIG_SYS_UBOOT_BASE   \
  16         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  17
  18 #ifdef CONFIG_SPL_BUILD
  19 #define CONFIG_SPL_BSS_START_ADDR       0x910000
  20 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  21 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  22
  23 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  24 #define CONFIG_MALLOC_F_ADDR            0x930000
  25 /* For RAW image gives a error info not panic */
  26 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  27
  28 #endif
  29
  30 #ifndef CONFIG_SPL_BUILD
  31 #define BOOT_TARGET_DEVICES(func) \
  32         func(MMC, mmc, 1) \
  33         func(MMC, mmc, 2) \
  34         func(DHCP, dhcp, na)
  35
  36 #include <config_distro_bootcmd.h>
  37 #endif
  38
  39 /* Initial environment variables */
  40 #define CONFIG_EXTRA_ENV_SETTINGS               \
  41         BOOTENV \
  42         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  43         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  44         "image=Image\0" \
  45         "console=ttymxc1,115200\0" \
  46         "fdt_addr_r=0x43000000\0"                       \
  47         "boot_fit=no\0" \
  48         "fdtfile=imx8mm-evk.dtb\0" \
  49         "initrd_addr=0x43800000\0"              \
  50         "bootm_size=0x10000000\0" \
  51         "mmcpart=1\0" \
  52         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  53
  54 /* Link Definitions */
  55
  56 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  57 #define CONFIG_SYS_INIT_RAM_SIZE        0x200000
  58
  59
  60 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  61 #define PHYS_SDRAM                      0x40000000
  62 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
  63
  64 #define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(2)
  65
  66 #define CONFIG_FEC_MXC_PHYADDR          0
  67
  68 #endif