include/configs/imx8mm_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __IMX8MM_EVK_H
   7 #define __IMX8MM_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define CONFIG_SYS_BOOTM_LEN            (64 * SZ_1M)
  14 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
  15 #define CONFIG_SYS_UBOOT_BASE   \
  16         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  17
  18 #ifdef CONFIG_SPL_BUILD
  19 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  20 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  21
  22 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  23 #define CONFIG_MALLOC_F_ADDR            0x930000
  24 /* For RAW image gives a error info not panic */
  25 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  26
  27 #endif
  28
  29 #ifndef CONFIG_SPL_BUILD
  30 #define BOOT_TARGET_DEVICES(func) \
  31         func(MMC, mmc, 1) \
  32         func(MMC, mmc, 2) \
  33         func(DHCP, dhcp, na)
  34
  35 #include <config_distro_bootcmd.h>
  36 #endif
  37
  38 /* Initial environment variables */
  39 #define CONFIG_EXTRA_ENV_SETTINGS               \
  40         BOOTENV \
  41         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  42         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  43         "image=Image\0" \
  44         "console=ttymxc1,115200\0" \
  45         "fdt_addr_r=0x43000000\0"                       \
  46         "boot_fit=no\0" \
  47         "fdtfile=imx8mm-evk.dtb\0" \
  48         "initrd_addr=0x43800000\0"              \
  49         "bootm_size=0x10000000\0" \
  50         "mmcpart=1\0" \
  51         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  52
  53 /* Link Definitions */
  54
  55 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  56 #define CONFIG_SYS_INIT_RAM_SIZE        0x200000
  57
  58
  59 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  60 #define PHYS_SDRAM                      0x40000000
  61 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
  62
  63 #define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(2)
  64
  65 #define CONFIG_FEC_MXC_PHYADDR          0
  66
  67 #endif