24345d41a9a713a92114563b7c50af9a457491f5
[platform/kernel/u-boot.git] / include / configs / imx8mm_evk.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2019 NXP
4  */
5
6 #ifndef __IMX8MM_EVK_H
7 #define __IMX8MM_EVK_H
8
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
12
13 #define CONFIG_SYS_BOOTM_LEN            (64 * SZ_1M)
14 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
15 #define CONFIG_SYS_UBOOT_BASE   \
16         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
17
18 #ifdef CONFIG_SPL_BUILD
19 #define CONFIG_SPL_STACK                0x920000
20 #define CONFIG_SPL_BSS_START_ADDR       0x910000
21 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
22 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
23
24 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
25 #define CONFIG_MALLOC_F_ADDR            0x930000
26 /* For RAW image gives a error info not panic */
27 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
28
29 #endif
30
31 #ifndef CONFIG_SPL_BUILD
32 #define BOOT_TARGET_DEVICES(func) \
33         func(MMC, mmc, 1) \
34         func(MMC, mmc, 2) \
35         func(DHCP, dhcp, na)
36
37 #include <config_distro_bootcmd.h>
38 #endif
39
40 /* Initial environment variables */
41 #define CONFIG_EXTRA_ENV_SETTINGS               \
42         BOOTENV \
43         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
44         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
45         "image=Image\0" \
46         "console=ttymxc1,115200\0" \
47         "fdt_addr_r=0x43000000\0"                       \
48         "boot_fit=no\0" \
49         "fdtfile=imx8mm-evk.dtb\0" \
50         "initrd_addr=0x43800000\0"              \
51         "bootm_size=0x10000000\0" \
52         "mmcpart=1\0" \
53         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
54
55 /* Link Definitions */
56
57 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
58 #define CONFIG_SYS_INIT_RAM_SIZE        0x200000
59
60
61 #define CONFIG_SYS_SDRAM_BASE           0x40000000
62 #define PHYS_SDRAM                      0x40000000
63 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
64
65 #define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(2)
66
67 #define CONFIG_FEC_MXC_PHYADDR          0
68
69 #endif