1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef __IMX8MM_CL_IOT_GATE_H
7 #define __IMX8MM_CL_IOT_GATE_H
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
12 #include <config_distro_bootcmd.h>
14 #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
15 #define CONFIG_SPL_MAX_SIZE (148 * 1024)
16 #define CONFIG_SYS_MONITOR_LEN SZ_512K
17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
19 #define CONFIG_SYS_UBOOT_BASE \
20 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
22 #ifdef CONFIG_SPL_BUILD
23 #define CONFIG_SPL_STACK 0x920000
24 #define CONFIG_SPL_BSS_START_ADDR 0x910000
25 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
26 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
27 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
29 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
30 #define CONFIG_MALLOC_F_ADDR 0x912000
31 /* For RAW image gives a error info not panic */
32 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
36 #if CONFIG_IS_ENABLED(CMD_MMC)
37 # define BOOT_TARGET_MMC(func) \
41 # define BOOT_TARGET_MMC(func)
44 #if CONFIG_IS_ENABLED(CMD_USB)
45 # define BOOT_TARGET_USB(func) func(USB, usb, 0)
47 # define BOOT_TARGET_USB(func)
50 #if CONFIG_IS_ENABLED(CMD_PXE)
51 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
53 # define BOOT_TARGET_PXE(func)
56 #if CONFIG_IS_ENABLED(CMD_DHCP)
57 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
59 # define BOOT_TARGET_DHCP(func)
62 #define BOOT_TARGET_DEVICES(func) \
63 BOOT_TARGET_USB(func) \
64 BOOT_TARGET_MMC(func) \
65 BOOT_TARGET_PXE(func) \
66 BOOT_TARGET_DHCP(func)
68 /* Initial environment variables */
69 #define CONFIG_EXTRA_ENV_SETTINGS \
73 "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
74 "fdt_addr=0x43000000\0" \
75 "fdt_addr_r=0x43000000\0" \
77 "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x250 mmcpart 1;" \
78 "u-boot-itb raw 0x300 0x1B00 mmcpart 1\0" \
79 "fdt_file=sb-iotgimx8.dtb\0" \
80 "fdtfile=sb-iotgimx8.dtb\0" \
81 "initrd_addr=0x43800000\0" \
82 "bootm_size=0x10000000\0" \
83 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
84 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
85 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
86 "mmcautodetect=yes\0" \
87 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
88 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
89 "bootscript=echo Running bootscript from mmc ...; " \
91 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
92 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
93 "kernel_addr_r=0x40480000\0" \
94 "pxefile_addr_r=0x40480000\0" \
95 "ramdisk_addr_r=0x43800000\0" \
96 "mmcboot=echo Booting from mmc ...; " \
98 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
99 "bootm ${loadaddr}; " \
101 "if run loadfdt; then " \
102 "booti ${loadaddr} - ${fdt_addr}; " \
104 "echo WARN: Cannot load the DT; " \
107 "netargs=setenv bootargs console=${console} " \
109 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
110 "netboot=echo Booting from net ...; " \
112 "if test ${ip_dyn} = yes; then " \
113 "setenv get_cmd dhcp; " \
115 "setenv get_cmd tftp; " \
117 "${get_cmd} ${loadaddr} ${image}; " \
118 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
119 "bootm ${loadaddr}; " \
121 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
122 "booti ${loadaddr} - ${fdt_addr}; " \
124 "echo WARN: Cannot load the DT; " \
128 #ifndef CONFIG_BOOTCOMMAND
129 #define CONFIG_BOOTCOMMAND \
130 "mmc dev ${mmcdev}; if mmc rescan; then " \
131 "if run loadbootscript; then " \
134 "if run loadimage; then " \
136 "else run netboot; " \
142 /* Link Definitions */
143 #define CONFIG_SYS_LOAD_ADDR 0x40480000
145 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
146 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
147 #define CONFIG_SYS_INIT_SP_OFFSET \
148 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
149 #define CONFIG_SYS_INIT_SP_ADDR \
150 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
152 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
154 /* Size of malloc() pool */
155 #define CONFIG_SYS_MALLOC_LEN SZ_32M
157 #define CONFIG_SYS_SDRAM_BASE 0x40000000
158 #define PHYS_SDRAM 0x40000000
159 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
161 #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
163 /* Monitor Command Prompt */
164 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
165 #define CONFIG_SYS_CBSIZE 2048
166 #define CONFIG_SYS_MAXARGS 64
167 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
168 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
169 sizeof(CONFIG_SYS_PROMPT) + 16)
172 #define CONFIG_FSL_USDHC
174 #define CONFIG_SYS_FSL_USDHC_NUM 2
175 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
177 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
179 #define CONFIG_ETHPRIME "FEC"
181 #define CONFIG_FEC_XCV_TYPE RGMII
182 #define CONFIG_FEC_MXC_PHYADDR 0
183 #define FEC_QUIRK_ENET_MAC
185 #define IMX_FEC_BASE 0x30BE0000
188 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
189 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
190 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
192 #endif /*__IMX8MM_CL_IOT_GATE_H*/