OMAP3: igep00x0: Reduce lines of code for IGEP-based boards.
[platform/kernel/u-boot.git] / include / configs / igep00x0.h
1 /*
2  * Common configuration settings for IGEP technology based boards
3  *
4  * (C) Copyright 2012
5  * ISEE 2007 SL, <www.iseebcn.com>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  */
22
23 #ifndef __IGEP00X0_H
24 #define __IGEP00X0_H
25
26 #include <asm/sizes.h>
27
28 /*
29  * High Level Configuration Options
30  */
31 #define CONFIG_OMAP             1       /* in a TI OMAP core */
32 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
33
34 #define CONFIG_SDRC     /* The chip has SDRC controller */
35
36 #include <asm/arch/cpu.h>
37 #include <asm/arch/omap3.h>
38
39 /*
40  * Display CPU and Board information
41  */
42 #define CONFIG_DISPLAY_CPUINFO          1
43 #define CONFIG_DISPLAY_BOARDINFO        1
44
45 /* Clock Defines */
46 #define V_OSCK                  26000000        /* Clock output from T2 */
47 #define V_SCLK                  (V_OSCK >> 1)
48
49 #define CONFIG_MISC_INIT_R
50
51 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
52 #define CONFIG_SETUP_MEMORY_TAGS        1
53 #define CONFIG_INITRD_TAG               1
54 #define CONFIG_REVISION_TAG             1
55
56 #define CONFIG_OF_LIBFDT                1
57
58 /*
59  * NS16550 Configuration
60  */
61
62 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
63
64 #define CONFIG_SYS_NS16550
65 #define CONFIG_SYS_NS16550_SERIAL
66 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
67 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
68
69 /* select serial console configuration */
70 #define CONFIG_CONS_INDEX               3
71 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
72 #define CONFIG_SERIAL3                  3
73
74 /* allow to overwrite serial and ethaddr */
75 #define CONFIG_ENV_OVERWRITE
76 #define CONFIG_BAUDRATE                 115200
77 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
78                                         115200}
79 #define CONFIG_GENERIC_MMC              1
80 #define CONFIG_MMC                      1
81 #define CONFIG_OMAP_HSMMC               1
82 #define CONFIG_DOS_PARTITION            1
83
84 /* USB */
85 #define CONFIG_MUSB_UDC                 1
86 #define CONFIG_USB_OMAP3                1
87 #define CONFIG_TWL4030_USB              1
88
89 /* USB device configuration */
90 #define CONFIG_USB_DEVICE               1
91 #define CONFIG_USB_TTY                  1
92 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
93
94 /* Change these to suit your needs */
95 #define CONFIG_USBD_VENDORID            0x0451
96 #define CONFIG_USBD_PRODUCTID           0x5678
97 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
98 #define CONFIG_USBD_PRODUCT_NAME        "IGEP"
99
100 /* commands to include */
101 #include <config_cmd_default.h>
102
103 #define CONFIG_CMD_CACHE
104 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
105 #define CONFIG_CMD_FAT          /* FAT support                  */
106 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
107 #define CONFIG_CMD_MMC          /* MMC support                  */
108 #define CONFIG_CMD_ONENAND      /* ONENAND support              */
109 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
110 #define CONFIG_CMD_DHCP
111 #define CONFIG_CMD_PING
112 #define CONFIG_CMD_NFS          /* NFS support                  */
113 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
114 #define CONFIG_MTD_DEVICE
115
116 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
117 #undef CONFIG_CMD_IMLS          /* List all found images        */
118
119 #define CONFIG_SYS_NO_FLASH
120 #define CONFIG_HARD_I2C                 1
121 #define CONFIG_SYS_I2C_SPEED            100000
122 #define CONFIG_SYS_I2C_SLAVE            1
123 #define CONFIG_SYS_I2C_BUS              0
124 #define CONFIG_SYS_I2C_BUS_SELECT       1
125 #define CONFIG_DRIVER_OMAP34XX_I2C      1
126
127 /*
128  * TWL4030
129  */
130 #define CONFIG_TWL4030_POWER            1
131
132 #define CONFIG_BOOTDELAY                3
133
134 #define CONFIG_EXTRA_ENV_SETTINGS \
135         "usbtty=cdc_acm\0" \
136         "loadaddr=0x82000000\0" \
137         "usbtty=cdc_acm\0" \
138         "console=ttyS2,115200n8\0" \
139         "mpurate=500\0" \
140         "vram=12M\0" \
141         "dvimode=1024x768MR-16@60\0" \
142         "defaultdisplay=dvi\0" \
143         "mmcdev=0\0" \
144         "mmcroot=/dev/mmcblk0p2 rw\0" \
145         "mmcrootfstype=ext3 rootwait\0" \
146         "nandroot=/dev/mtdblock4 rw\0" \
147         "nandrootfstype=jffs2\0" \
148         "mmcargs=setenv bootargs console=${console} " \
149                 "mpurate=${mpurate} " \
150                 "vram=${vram} " \
151                 "omapfb.mode=dvi:${dvimode} " \
152                 "omapfb.debug=y " \
153                 "omapdss.def_disp=${defaultdisplay} " \
154                 "root=${mmcroot} " \
155                 "rootfstype=${mmcrootfstype}\0" \
156         "nandargs=setenv bootargs console=${console} " \
157                 "mpurate=${mpurate} " \
158                 "vram=${vram} " \
159                 "omapfb.mode=dvi:${dvimode} " \
160                 "omapfb.debug=y " \
161                 "omapdss.def_disp=${defaultdisplay} " \
162                 "root=${nandroot} " \
163                 "rootfstype=${nandrootfstype}\0" \
164         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
165         "bootscript=echo Running bootscript from mmc ...; " \
166                 "source ${loadaddr}\0" \
167         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
168         "mmcboot=echo Booting from mmc ...; " \
169                 "run mmcargs; " \
170                 "bootm ${loadaddr}\0" \
171         "nandboot=echo Booting from onenand ...; " \
172                 "run nandargs; " \
173                 "onenand read ${loadaddr} 280000 400000; " \
174                 "bootm ${loadaddr}\0" \
175
176 #define CONFIG_BOOTCOMMAND \
177         "if mmc rescan ${mmcdev}; then " \
178                 "if run loadbootscript; then " \
179                         "run bootscript; " \
180                 "else " \
181                         "if run loaduimage; then " \
182                                 "run mmcboot; " \
183                         "else run nandboot; " \
184                         "fi; " \
185                 "fi; " \
186         "else run nandboot; fi"
187
188 #define CONFIG_AUTO_COMPLETE            1
189
190 /*
191  * Miscellaneous configurable options
192  */
193 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
194 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
195 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
196 #define CONFIG_SYS_PROMPT               "U-Boot # "
197 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
198 /* Print Buffer Size */
199 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
200                                         sizeof(CONFIG_SYS_PROMPT) + 16)
201 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
202 /* Boot Argument Buffer Size */
203 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
204
205 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
206                                                                 /* works on */
207 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
208                                         0x01F00000) /* 31MB */
209
210 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
211                                                         /* load address */
212
213 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
214
215 /*
216  * OMAP3 has 12 GP timers, they can be driven by the system clock
217  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
218  * This rate is divided by a local divisor.
219  */
220 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
221 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
222 #define CONFIG_SYS_HZ                   1000
223
224 /*
225  * Stack sizes
226  *
227  * The stack sizes are set up in start.S using the settings below
228  */
229 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
230
231 /*
232  * Physical Memory Map
233  *
234  */
235 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
236 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
237 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 meg */
238 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
239
240 /*
241  * FLASH and environment organization
242  */
243
244 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
245
246 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
247
248 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
249
250 #define CONFIG_ENV_IS_IN_ONENAND        1
251 #define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
252 #define CONFIG_ENV_ADDR                 ONENAND_ENV_OFFSET
253
254 /*
255  * Size of malloc() pool
256  */
257 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
258
259 /*
260  * SMSC911x Ethernet
261  */
262 #if defined(CONFIG_CMD_NET)
263 #define CONFIG_SMC911X
264 #define CONFIG_SMC911X_32_BIT
265 #define CONFIG_SMC911X_BASE     0x2C000000
266 #endif /* (CONFIG_CMD_NET) */
267
268 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
269 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
270 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
271 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
272                                          CONFIG_SYS_INIT_RAM_SIZE - \
273                                          GENERATED_GBL_DATA_SIZE)
274
275 #endif /* __IGEP00X0_H */