configs: Migrate CONFIG_NR_DRAM_BANKS
[platform/kernel/u-boot.git] / include / configs / h2200.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * iPAQ h2200 board configuration
4  *
5  * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
6  */
7
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10
11 #define CONFIG_MACH_TYPE                MACH_TYPE_H2200
12
13 #define CONFIG_CPU_PXA25X               1
14
15 #define PHYS_SDRAM_1                    0xa0000000 /* SDRAM Bank #1 */
16 #define PHYS_SDRAM_1_SIZE               0x04000000 /* 64 MB */
17
18 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
19 #define CONFIG_SYS_SDRAM_SIZE           PHYS_SDRAM_1_SIZE
20
21 #define CONFIG_SYS_INIT_SP_ADDR         0xfffff800
22
23 #define CONFIG_ENV_SIZE                 0x00040000
24 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128*1024)
25
26 #define CONFIG_SYS_LOAD_ADDR            0xa3000000 /* default load address */
27
28 /*
29  * iPAQ 1st stage bootloader loads 2nd stage bootloader
30  * at address 0xa0040000 but bootloader requires header
31  * which is 0x1000 long.
32  *
33  * --- Header begin ---
34  *      .word 0xea0003fe ; b 0x1000
35  *
36  *      .org 0x40
37  *      .ascii "ECEC"
38  *
39  *      .org 0x1000
40  * --- Header end ---
41  */
42
43 /*
44  * Static chips
45  */
46
47 #define CONFIG_SYS_MSC0_VAL             0x246c7ffc
48 #define CONFIG_SYS_MSC1_VAL             0x7ff07ff0
49 #define CONFIG_SYS_MSC2_VAL             0x7ff07ff0
50
51 /*
52  * PCMCIA and CF Interfaces
53  */
54
55 #define CONFIG_SYS_MECR_VAL             0x00000000
56 #define CONFIG_SYS_MCMEM0_VAL           0x00000000
57 #define CONFIG_SYS_MCMEM1_VAL           0x00000000
58 #define CONFIG_SYS_MCATT0_VAL           0x00000000
59 #define CONFIG_SYS_MCATT1_VAL           0x00000000
60 #define CONFIG_SYS_MCIO0_VAL            0x00000000
61 #define CONFIG_SYS_MCIO1_VAL            0x00000000
62
63 #define CONFIG_SYS_FLYCNFG_VAL          0x00000000
64 #define CONFIG_SYS_SXCNFG_VAL           0x00040004
65
66 #define CONFIG_SYS_MDREFR_VAL           0x0099E018
67 #define CONFIG_SYS_MDCNFG_VAL           0x01C801CB
68 #define CONFIG_SYS_MDMRS_VAL            0x00220022
69
70 #define CONFIG_SYS_PSSR_VAL             0x00000000
71 #define CONFIG_SYS_CKEN                 0x00004840
72 #define CONFIG_SYS_CCCR                 0x00000161
73
74 /*
75  * GPIOs
76  */
77
78 #define CONFIG_SYS_GPSR0_VAL            0x01000000
79 #define CONFIG_SYS_GPSR1_VAL            0x00000000
80 #define CONFIG_SYS_GPSR2_VAL            0x00010000
81
82 #define CONFIG_SYS_GPCR0_VAL            0x00000000
83 #define CONFIG_SYS_GPCR1_VAL            0x00000000
84 #define CONFIG_SYS_GPCR2_VAL            0x00000000
85
86 #define CONFIG_SYS_GPDR0_VAL            0xF7E38C00
87 #define CONFIG_SYS_GPDR1_VAL            0xBCFFBF83
88 #define CONFIG_SYS_GPDR2_VAL            0x000157FF
89
90 #define CONFIG_SYS_GAFR0_L_VAL          0x80401000
91 #define CONFIG_SYS_GAFR0_U_VAL          0x00000112
92 #define CONFIG_SYS_GAFR1_L_VAL          0x600A9550
93 #define CONFIG_SYS_GAFR1_U_VAL          0x0005AAAA
94 #define CONFIG_SYS_GAFR2_L_VAL          0x20000000
95 #define CONFIG_SYS_GAFR2_U_VAL          0x00000000
96
97 /*
98  * Serial port
99  */
100 #define CONFIG_FFUART
101
102 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 38400, 115200 }
103
104 #define CONFIG_SETUP_MEMORY_TAGS
105 #define CONFIG_CMDLINE_TAG
106 #define CONFIG_INITRD_TAG
107
108 /* Monitor Command Prompt */
109
110 #define CONFIG_USB_DEV_PULLUP_GPIO      33
111 /* USB VBUS GPIO 3 */
112
113 #define CONFIG_BOOTCOMMAND              \
114         "setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
115         "if bootp ; then setenv downloaded 1 ; fi ; done ; " \
116         "source :script ; " \
117         "bootm ; "
118
119 #define CONFIG_USB_GADGET_PXA2XX
120 #define CONFIG_USB_ETH_SUBSET
121
122 #define CONFIG_USBNET_DEV_ADDR          "de:ad:be:ef:00:01"
123 #define CONFIG_EXTRA_ENV_SETTINGS \
124         "stdin=serial\0" \
125         "stdout=serial\0" \
126         "stderr=serial\0"
127
128 #endif /* __CONFIG_H */