dcd213008058fcee417f6fc8bd74b1d952b43fa1
[platform/kernel/u-boot.git] / include / configs / gose.h
1 /*
2  * include/configs/gose.h
3  *
4  * Copyright (C) 2014 Renesas Electronics Corporation
5  *
6  * SPDX-License-Identifier: GPL-2.0
7  */
8
9 #ifndef __GOSE_H
10 #define __GOSE_H
11
12 #undef DEBUG
13 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Gose"
14
15 #include "rcar-gen2-common.h"
16
17 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
18 #define CONFIG_SYS_TEXT_BASE    0x70000000
19 #else
20 #define CONFIG_SYS_TEXT_BASE    0xE6304000
21 #endif
22
23 /* STACK */
24 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
25 #define CONFIG_SYS_INIT_SP_ADDR         0x7003FFFC
26 #else
27 #define CONFIG_SYS_INIT_SP_ADDR         0xE633FFFC
28 #endif
29
30 #define STACK_AREA_SIZE                 0xC000
31 #define LOW_LEVEL_MERAM_STACK   \
32         (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
33
34 /* MEMORY */
35 #define RCAR_GEN2_SDRAM_BASE            0x40000000
36 #define RCAR_GEN2_SDRAM_SIZE            0x40000000
37 #define RCAR_GEN2_UBOOT_SDRAM_SIZE      0x20000000
38
39 /* SCIF */
40
41 /* FLASH */
42 #define CONFIG_SPI
43 #define CONFIG_SH_QSPI
44
45 /* SH Ether */
46 #define CONFIG_SH_ETHER_USE_PORT        0
47 #define CONFIG_SH_ETHER_PHY_ADDR        0x1
48 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
49 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
50 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
51 #define CONFIG_BITBANGMII
52 #define CONFIG_BITBANGMII_MULTI
53 #define CONFIG_SH_ETHER_ALIGNE_SIZE     64
54
55 /* Board Clock */
56 #define RMOBILE_XTAL_CLK        20000000u
57 #define CONFIG_SYS_CLK_FREQ     RMOBILE_XTAL_CLK
58 #define CONFIG_SH_TMU_CLK_FREQ  (CONFIG_SYS_CLK_FREQ / 2)
59 #define CONFIG_SYS_TMU_CLK_DIV  4
60
61 /* I2C */
62 #define CONFIG_SYS_I2C
63 #define CONFIG_SYS_I2C_SH
64 #define CONFIG_SYS_I2C_SLAVE    0x7F
65 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS       3
66 #define CONFIG_SYS_I2C_SH_SPEED0        400000
67 #define CONFIG_SYS_I2C_SH_SPEED1        400000
68 #define CONFIG_SYS_I2C_SH_SPEED2        400000
69 #define CONFIG_SH_I2C_DATA_HIGH 4
70 #define CONFIG_SH_I2C_DATA_LOW  5
71 #define CONFIG_SH_I2C_CLOCK     10000000
72
73 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
74
75 /* USB */
76 #define CONFIG_USB_EHCI_RMOBILE
77 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
78
79 /* Module stop status bits */
80 /* INTC-RT */
81 #define CONFIG_SMSTP0_ENA       0x00400000
82 /* MSIF */
83 #define CONFIG_SMSTP2_ENA       0x00002000
84 /* INTC-SYS, IRQC */
85 #define CONFIG_SMSTP4_ENA       0x00000180
86 /* SCIF0 */
87 #define CONFIG_SMSTP7_ENA       0x00200000
88
89 /* SDHI */
90 #define CONFIG_SH_SDHI_FREQ             97500000
91
92 #endif  /* __GOSE_H */