1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2015-2019 Toradex, Inc.
5 * Configuration settings for the Toradex VF50/VF61 modules.
8 * Copyright 2013 Freescale Semiconductor, Inc.
14 #include <asm/arch/imx-regs.h>
15 #include <linux/sizes.h>
17 #define CONFIG_SYS_FSL_CLK
19 #ifdef CONFIG_VIDEO_FSL_DCU_FB
20 #define CONFIG_VIDEO_LOGO
21 #define CONFIG_VIDEO_BMP_LOGO
22 #define CONFIG_SYS_FSL_DCU_LE
24 #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
25 #define DCU_LAYER_MAX_NUM 64
29 #define CONFIG_SYS_NAND_ONFI_DETECTION
30 #define CONFIG_SYS_MAX_NAND_DEVICE 1
32 #define CONFIG_IPADDR 192.168.10.2
33 #define CONFIG_NETMASK 255.255.255.0
34 #define CONFIG_SERVERIP 192.168.10.1
36 #define CONFIG_FDTADDR 0x84000000
38 /* We boot from the gfxRAM area of the OCRAM. */
39 #define CONFIG_BOARD_SIZE_LIMIT 520192
41 #define MEM_LAYOUT_ENV_SETTINGS \
42 "bootm_size=0x10000000\0" \
43 "fdt_addr_r=0x82000000\0" \
44 "kernel_addr_r=0x81000000\0" \
45 "pxefile_addr_r=0x87100000\0" \
46 "ramdisk_addr_r=0x82100000\0" \
47 "scriptaddr=0x87000000\0"
49 #define UBOOT_UPDATE \
50 "update_uboot=nand erase.part u-boot && " \
51 "nand write ${loadaddr} u-boot ${filesize}\0" \
54 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
55 "nfsboot=run setup; " \
56 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
57 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
58 "dhcp ${kernel_addr_r} && " \
59 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
60 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
63 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
64 "ubi.fm_autoconvert=1\0" \
65 "ubiboot=run setup; " \
66 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
67 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
69 "ubi read ${kernel_addr_r} kernel && " \
70 "ubi read ${fdt_addr_r} dtb && " \
71 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
73 #define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;"
75 #define BOOT_TARGET_DEVICES(func) \
79 #include <config_distro_bootcmd.h>
80 #undef BOOTENV_RUN_NET_USB_START
81 #define BOOTENV_RUN_NET_USB_START ""
83 #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
85 #define CONFIG_EXTRA_ENV_SETTINGS \
87 MEM_LAYOUT_ENV_SETTINGS \
92 "defargs=user_debug=30\0" \
93 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
94 "fdt_board=eval-v3\0" \
96 "kernel_image=zImage\0" \
97 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
98 "setsdupdate=mmc rescan && set interface mmc && " \
99 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
100 "source ${loadaddr}\0" \
101 "setup=setenv setupargs console=tty1 console=${console}" \
102 ",${baudrate}n8 ${memargs}\0" \
103 "setupdate=run setsdupdate || run setusbupdate\0" \
104 "setusbupdate=usb start && set interface usb && " \
105 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
106 "source ${loadaddr}\0" \
108 "video-mode=dcufb:640x480-16@60,monitor=lcd\0"
110 /* Miscellaneous configurable options */
111 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
112 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
114 #define CONFIG_SYS_HZ 1000
116 /* Physical memory map */
117 #define PHYS_SDRAM (0x80000000)
118 #define PHYS_SDRAM_SIZE (256 * SZ_1M)
120 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
121 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
122 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
124 #define CONFIG_SYS_INIT_SP_OFFSET \
125 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
126 #define CONFIG_SYS_INIT_SP_ADDR \
127 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
129 /* Environment organization */
130 #ifdef CONFIG_ENV_IS_IN_NAND
131 #define CONFIG_ENV_RANGE (4 * 64 * 2048)
134 /* USB Host Support */
135 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
136 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
140 #endif /* __CONFIG_H */