include/configs/cm_t43.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * cm_t43.h
   4  *
   5  * Copyright (C) 2015 Compulab, Ltd.
   6  */
   7
   8 #ifndef __CONFIG_CM_T43_H
   9 #define __CONFIG_CM_T43_H
  10
  11 #define CONFIG_MAX_RAM_BANK_SIZE        (2048 << 20)    /* 2GB */
  12 #define CONFIG_SYS_TIMERBASE            0x48040000      /* Use Timer2 */
  13
  14 #include <asm/arch/omap.h>
  15
  16 /* Serial support */
  17 #define CONFIG_SYS_NS16550_SERIAL
  18 #define CONFIG_SYS_NS16550_CLK          48000000
  19 #define CONFIG_SYS_NS16550_COM1         0x44e09000
  20 #if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
  21 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  22 #endif
  23
  24 /* NAND support */
  25 #define CONFIG_SYS_NAND_ONFI_DETECTION
  26 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  27 #define CONFIG_SYS_NAND_ECCSIZE         512
  28 #define CONFIG_SYS_NAND_ECCBYTES        14
  29 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW
  30 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
  31                                          10, 11, 12, 13, 14, 15, 16, 17, \
  32                                          18, 19, 20, 21, 22, 23, 24, 25, \
  33                                          26, 27, 28, 29, 30, 31, 32, 33, \
  34                                          34, 35, 36, 37, 38, 39, 40, 41, \
  35                                          42, 43, 44, 45, 46, 47, 48, 49, \
  36                                          50, 51, 52, 53, 54, 55, 56, 57, }
  37
  38 /* CPSW Ethernet support */
  39 #define CONFIG_SYS_RX_ETH_BUFFER        64
  40
  41 /* Power */
  42 #define CONFIG_POWER_TPS65218
  43
  44 /* Enabling L2 Cache */
  45 #define CONFIG_SYS_L2_PL310
  46 #define CONFIG_SYS_PL310_BASE           0x48242000
  47
  48 /*
  49  * Since SPL did pll and ddr initialization for us,
  50  * we don't need to do it twice.
  51  */
  52
  53 #define CONFIG_HSMMC2_8BIT
  54
  55 #include <configs/ti_armv7_omap.h>
  56 #undef CONFIG_SYS_MONITOR_LEN
  57
  58 #define V_OSCK                          24000000  /* Clock output from T2 */
  59 #define V_SCLK                          (V_OSCK)
  60
  61 #define CONFIG_EXTRA_ENV_SETTINGS \
  62         "loadaddr=0x80200000\0" \
  63         "fdtaddr=0x81200000\0" \
  64         "bootm_size=0x8000000\0" \
  65         "autoload=no\0" \
  66         "console=ttyO0,115200n8\0" \
  67         "fdtfile=am437x-sb-som-t43.dtb\0" \
  68         "kernel=zImage-cm-t43\0" \
  69         "bootscr=bootscr.img\0" \
  70         "emmcroot=/dev/mmcblk0p2 rw\0" \
  71         "emmcrootfstype=ext4 rootwait\0" \
  72         "emmcargs=setenv bootargs console=${console} " \
  73                 "root=${emmcroot} " \
  74                 "rootfstype=${emmcrootfstype}\0" \
  75         "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \
  76         "bootscript=echo Running bootscript from mmc ...; " \
  77                 "source ${loadaddr}\0" \
  78         "emmcboot=echo Booting from emmc ... && " \
  79                 "run emmcargs && " \
  80                 "load mmc 1 ${loadaddr} ${kernel} && " \
  81                 "load mmc 1 ${fdtaddr} ${fdtfile} && " \
  82                 "bootz ${loadaddr} - ${fdtaddr}\0"
  83
  84 #define CONFIG_BOOTCOMMAND \
  85         "mmc dev 0; " \
  86         "if mmc rescan; then " \
  87                 "if run loadbootscript; then " \
  88                         "run bootscript; " \
  89                 "fi; " \
  90         "fi; " \
  91         "mmc dev 1; " \
  92         "if mmc rescan; then " \
  93                 "run emmcboot; " \
  94         "fi;"
  95
  96 /* SPL defines. */
  97 #define CONFIG_SYS_SPL_ARGS_ADDR        (CONFIG_SYS_SDRAM_BASE + (128 << 20))
  98 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  99
 100 /* EEPROM */
 101
 102 #endif  /* __CONFIG_CM_T43_H */