include/configs/cm_t43.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * cm_t43.h
   4  *
   5  * Copyright (C) 2015 Compulab, Ltd.
   6  */
   7
   8 #ifndef __CONFIG_CM_T43_H
   9 #define __CONFIG_CM_T43_H
  10
  11 #define CONFIG_CM_T43
  12 #define CONFIG_MAX_RAM_BANK_SIZE        (2048 << 20)    /* 2GB */
  13 #define CONFIG_SYS_TIMERBASE            0x48040000      /* Use Timer2 */
  14
  15 #include <asm/arch/omap.h>
  16
  17 /* Serial support */
  18 #define CONFIG_SYS_NS16550_SERIAL
  19 #define CONFIG_SYS_NS16550_CLK          48000000
  20 #define CONFIG_SYS_NS16550_COM1         0x44e09000
  21 #if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
  22 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  23 #endif
  24
  25 /* NAND support */
  26 #define CONFIG_SYS_NAND_ONFI_DETECTION
  27 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  28 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
  29 #define CONFIG_SYS_NAND_OOBSIZE         64
  30 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
  31 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
  32 #define CONFIG_SYS_NAND_ECCSIZE         512
  33 #define CONFIG_SYS_NAND_ECCBYTES        14
  34 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW
  35 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
  36                                          CONFIG_SYS_NAND_PAGE_SIZE)
  37 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
  38                                          10, 11, 12, 13, 14, 15, 16, 17, \
  39                                          18, 19, 20, 21, 22, 23, 24, 25, \
  40                                          26, 27, 28, 29, 30, 31, 32, 33, \
  41                                          34, 35, 36, 37, 38, 39, 40, 41, \
  42                                          42, 43, 44, 45, 46, 47, 48, 49, \
  43                                          50, 51, 52, 53, 54, 55, 56, 57, }
  44
  45 /* CPSW Ethernet support */
  46 #define CONFIG_BOOTP_DEFAULT
  47 #define CONFIG_BOOTP_SEND_HOSTNAME
  48 #define CONFIG_PHY_ATHEROS
  49 #define CONFIG_SYS_RX_ETH_BUFFER        64
  50
  51 /* USB support */
  52 #define CONFIG_USB_XHCI_OMAP
  53 #define CONFIG_AM437X_USB2PHY2_HOST
  54
  55 /* Power */
  56 #define CONFIG_POWER
  57 #define CONFIG_POWER_I2C
  58 #define CONFIG_POWER_TPS65218
  59
  60 /* Enabling L2 Cache */
  61 #define CONFIG_SYS_L2_PL310
  62 #define CONFIG_SYS_PL310_BASE           0x48242000
  63
  64 /*
  65  * Since SPL did pll and ddr initialization for us,
  66  * we don't need to do it twice.
  67  */
  68 #if !defined(CONFIG_SPL_BUILD)
  69 #define CONFIG_SKIP_LOWLEVEL_INIT
  70 #endif
  71
  72 #define CONFIG_HSMMC2_8BIT
  73
  74 #include <configs/ti_armv7_omap.h>
  75 #undef CONFIG_SYS_MONITOR_LEN
  76
  77 #define V_OSCK                          24000000  /* Clock output from T2 */
  78 #define V_SCLK                          (V_OSCK)
  79
  80 #define CONFIG_EXTRA_ENV_SETTINGS \
  81         "loadaddr=0x80200000\0" \
  82         "fdtaddr=0x81200000\0" \
  83         "bootm_size=0x8000000\0" \
  84         "autoload=no\0" \
  85         "console=ttyO0,115200n8\0" \
  86         "fdtfile=am437x-sb-som-t43.dtb\0" \
  87         "kernel=zImage-cm-t43\0" \
  88         "bootscr=bootscr.img\0" \
  89         "emmcroot=/dev/mmcblk0p2 rw\0" \
  90         "emmcrootfstype=ext4 rootwait\0" \
  91         "emmcargs=setenv bootargs console=${console} " \
  92                 "root=${emmcroot} " \
  93                 "rootfstype=${emmcrootfstype}\0" \
  94         "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \
  95         "bootscript=echo Running bootscript from mmc ...; " \
  96                 "source ${loadaddr}\0" \
  97         "emmcboot=echo Booting from emmc ... && " \
  98                 "run emmcargs && " \
  99                 "load mmc 1 ${loadaddr} ${kernel} && " \
 100                 "load mmc 1 ${fdtaddr} ${fdtfile} && " \
 101                 "bootz ${loadaddr} - ${fdtaddr}\0"
 102
 103 #define CONFIG_BOOTCOMMAND \
 104         "mmc dev 0; " \
 105         "if mmc rescan; then " \
 106                 "if run loadbootscript; then " \
 107                         "run bootscript; " \
 108                 "fi; " \
 109         "fi; " \
 110         "mmc dev 1; " \
 111         "if mmc rescan; then " \
 112                 "run emmcboot; " \
 113         "fi;"
 114
 115 /* SPL defines. */
 116 #define CONFIG_SYS_SPL_ARGS_ADDR        (CONFIG_SYS_SDRAM_BASE + (128 << 20))
 117 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x40000
 118 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
 119
 120 /* EEPROM */
 121 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 122 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 123 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
 124 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
 125 #define CONFIG_SYS_EEPROM_SIZE                  256
 126
 127 #endif  /* __CONFIG_CM_T43_H */