include/configs/cm_t335.h

   1 /*
   2  * Config file for Compulab CM-T335 board
   3  *
   4  * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/
   5  *
   6  * Author: Ilya Ledvich <ilya@compulab.co.il>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_CM_T335_H
  12 #define __CONFIG_CM_T335_H
  13
  14 #define CONFIG_CM_T335
  15
  16 #include <configs/ti_am335x_common.h>
  17
  18 #undef CONFIG_SPI
  19 #undef CONFIG_BOOTCOUNT_LIMIT
  20 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
  21
  22 #undef CONFIG_MAX_RAM_BANK_SIZE
  23 #define CONFIG_MAX_RAM_BANK_SIZE        (512 << 20)     /* 512MB */
  24
  25 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T335
  26
  27 /* Clock Defines */
  28 #define V_OSCK                          25000000  /* Clock output from T2 */
  29 #define V_SCLK                          (V_OSCK)
  30
  31 #define CONFIG_ENV_SIZE                 (16 << 10)      /* 16 KiB */
  32
  33 #ifndef CONFIG_SPL_BUILD
  34 #define MMCARGS \
  35         "mmcdev=0\0" \
  36         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
  37         "mmcrootfstype=ext4\0" \
  38         "mmcargs=setenv bootargs console=${console} " \
  39                 "root=${mmcroot} " \
  40                 "rootfstype=${mmcrootfstype}\0" \
  41         "mmcboot=echo Booting from mmc ...; " \
  42                 "run mmcargs; " \
  43                 "bootm ${loadaddr}\0"
  44
  45 #define NANDARGS \
  46         "mtdids=" MTDIDS_DEFAULT "\0" \
  47         "mtdparts=" MTDPARTS_DEFAULT "\0" \
  48         "nandroot=ubi0:rootfs rw\0" \
  49         "nandrootfstype=ubifs\0" \
  50         "nandargs=setenv bootargs console=${console} " \
  51                 "root=${nandroot} " \
  52                 "rootfstype=${nandrootfstype} " \
  53                 "ubi.mtd=${rootfs_name}\0" \
  54         "nandboot=echo Booting from nand ...; " \
  55                 "run nandargs; " \
  56                 "nboot ${loadaddr} nand0 900000; " \
  57                 "bootm ${loadaddr}\0"
  58
  59 #define CONFIG_EXTRA_ENV_SETTINGS \
  60         "loadaddr=82000000\0" \
  61         "console=ttyO0,115200n8\0" \
  62         "rootfs_name=rootfs\0" \
  63         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  64         "bootscript=echo Running bootscript from mmc ...; " \
  65                 "source ${loadaddr}\0" \
  66         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
  67         MMCARGS \
  68         NANDARGS
  69
  70 #define CONFIG_BOOTCOMMAND \
  71         "mmc dev ${mmcdev}; if mmc rescan; then " \
  72                 "if run loadbootscript; then " \
  73                         "run bootscript; " \
  74                 "else " \
  75                         "if run loaduimage; then " \
  76                                 "run mmcboot; " \
  77                         "else run nandboot; " \
  78                         "fi; " \
  79                 "fi; " \
  80         "else run nandboot; fi"
  81 #endif /* CONFIG_SPL_BUILD */
  82
  83 #define CONFIG_TIMESTAMP
  84 #define CONFIG_SYS_AUTOLOAD             "no"
  85
  86 /* Serial console configuration */
  87 #define CONFIG_CONS_INDEX               1
  88 #define CONFIG_SERIAL1                  1       /* UART0 */
  89
  90 /* NS16550 Configuration */
  91 #define CONFIG_SYS_NS16550_COM1         0x44e09000      /* UART0 */
  92 #define CONFIG_SYS_NS16550_COM2         0x48022000      /* UART1 */
  93
  94 /* I2C Configuration */
  95 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50    /* Main EEPROM */
  96 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
  97 #define CONFIG_SYS_I2C_EEPROM_BUS       0
  98
  99 /* SPL */
 100
 101 /* Network. */
 102 #define CONFIG_PHY_ATHEROS
 103
 104 /* NAND support */
 105 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 106 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
 107                                          CONFIG_SYS_NAND_PAGE_SIZE)
 108 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 109 #define CONFIG_SYS_NAND_OOBSIZE         64
 110 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 111 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 112 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
 113                                          10, 11, 12, 13, 14, 15, 16, 17, \
 114                                          18, 19, 20, 21, 22, 23, 24, 25, \
 115                                          26, 27, 28, 29, 30, 31, 32, 33, \
 116                                          34, 35, 36, 37, 38, 39, 40, 41, \
 117                                          42, 43, 44, 45, 46, 47, 48, 49, \
 118                                          50, 51, 52, 53, 54, 55, 56, 57, }
 119
 120 #define CONFIG_SYS_NAND_ECCSIZE         512
 121 #define CONFIG_SYS_NAND_ECCBYTES        14
 122
 123 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 124
 125 #undef CONFIG_SYS_NAND_U_BOOT_OFFS
 126 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x200000
 127
 128 #define MTDIDS_DEFAULT                  "nand0=nand"
 129 #define MTDPARTS_DEFAULT                "mtdparts=nand:2m(spl)," \
 130                                         "1m(u-boot),1m(u-boot-env)," \
 131                                         "1m(dtb),4m(splash)," \
 132                                         "6m(kernel),-(rootfs)"
 133 #define CONFIG_ENV_OFFSET               0x300000 /* environment starts here */
 134 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 135 #define CONFIG_SYS_NAND_ONFI_DETECTION
 136 #ifdef CONFIG_SPL_OS_BOOT
 137 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
 138 #endif
 139
 140 /* GPIO pin + bank to pin ID mapping */
 141 #define GPIO_PIN(_bank, _pin)           ((_bank << 5) + _pin)
 142
 143 /* Status LED */
 144 /* Status LED polarity is inversed, so init it in the "off" state */
 145
 146 /* EEPROM */
 147 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 148 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 149 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
 150 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
 151 #define CONFIG_SYS_EEPROM_SIZE                  256
 152
 153 #ifndef CONFIG_SPL_BUILD
 154 /*
 155  * Enable PCA9555 at I2C0-0x26.
 156  * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
 157  */
 158 #define CONFIG_PCA953X
 159 #define CONFIG_SYS_I2C_PCA953X_ADDR     0x26
 160 #define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x26, 16} }
 161 #endif /* CONFIG_SPL_BUILD */
 162
 163 #endif  /* __CONFIG_CM_T335_H */
 164