include/configs/cm5200.h

   1 /*
   2  * (C) Copyright 2003-2007
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 /*
  12  * High Level Configuration Options
  13  */
  14 #define CONFIG_MPC5200          1       /* This is an MPC5200 CPU */
  15 #define CONFIG_CM5200           1       /* ... on CM5200 platform */
  16
  17 #define CONFIG_SYS_TEXT_BASE    0xfc000000
  18
  19 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  20
  21 /*
  22  * Supported commands
  23  */
  24 #define CONFIG_CMD_REGINFO
  25
  26 /*
  27  * Serial console configuration
  28  */
  29 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  30 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  31
  32 /*
  33  * Ethernet configuration
  34  */
  35 #define CONFIG_MPC5xxx_FEC      1
  36 #define CONFIG_MPC5xxx_FEC_MII100
  37 #define CONFIG_PHY_ADDR         0x00
  38 #define CONFIG_ENV_OVERWRITE    1       /* allow overwriting of ethaddr */
  39 /* use misc_init_r() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */
  40 #define CONFIG_MISC_INIT_R      1
  41 #define CONFIG_MAC_OFFSET       0x35    /* MAC address offset in I2C EEPROM */
  42
  43 /*
  44  * POST support
  45  */
  46 #define CONFIG_POST             (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU)
  47 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
  48 /* List of I2C addresses to be verified by POST */
  49 #define CONFIG_SYS_POST_I2C_ADDRS       {CONFIG_SYS_I2C_SLAVE,  \
  50                                          CONFIG_SYS_I2C_IO,     \
  51                                          CONFIG_SYS_I2C_EEPROM}
  52
  53 /* display image timestamps */
  54 #define CONFIG_TIMESTAMP        1
  55
  56 /*
  57  * Autobooting
  58  */
  59 #define CONFIG_PREBOOT  "echo;" \
  60         "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
  61         "echo"
  62 #undef CONFIG_BOOTARGS
  63
  64 /*
  65  * Default environment settings
  66  */
  67 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  68         "netdev=eth0\0"                                                 \
  69         "netmask=255.255.0.0\0"                                         \
  70         "ipaddr=192.168.160.33\0"                                       \
  71         "serverip=192.168.1.1\0"                                        \
  72         "gatewayip=192.168.1.1\0"                                       \
  73         "console=ttyPSC0\0"                                             \
  74         "u-boot_addr=100000\0"                                          \
  75         "kernel_addr=200000\0"                                          \
  76         "kernel_addr_flash=fc0c0000\0"                                  \
  77         "fdt_addr=400000\0"                                             \
  78         "fdt_addr_flash=fc0a0000\0"                                     \
  79         "ramdisk_addr=500000\0"                                         \
  80         "rootpath=/opt/eldk-4.1/ppc_6xx\0"                              \
  81         "u-boot=/tftpboot/cm5200/u-boot.bin\0"                          \
  82         "bootfile_fdt=/tftpboot/cm5200/uImage\0"                        \
  83         "fdt_file=/tftpboot/cm5200/cm5200.dtb\0"                        \
  84         "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
  85         "update=prot off fc000000 +${filesize}; "                       \
  86                 "era fc000000 +${filesize}; "                           \
  87                 "cp.b ${u-boot_addr} fc000000 ${filesize}; "            \
  88                 "prot on fc000000 +${filesize}\0"                       \
  89         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
  90                 "nfsroot=${serverip}:${rootpath}\0"                     \
  91         "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0"            \
  92         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
  93         "addinit=setenv bootargs ${bootargs} init=/linuxrc\0"           \
  94         "addcons=setenv bootargs ${bootargs} "                          \
  95                 "console=${console},${baudrate}\0"                      \
  96         "addip=setenv bootargs ${bootargs} "                            \
  97                 "ip=${ipaddr}:${serverip}:${gatewayip}:"                \
  98                 "${netmask}:${hostname}:${netdev}:off panic=1\0"        \
  99         "flash_flash=run flashargs addinit addip addcons;"              \
 100                 "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0"      \
 101         "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; "             \
 102                 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip "      \
 103                 "addcons; bootm ${kernel_addr} - ${fdt_addr}\0"         \
 104         ""
 105 #define CONFIG_BOOTCOMMAND      "run flash_flash"
 106
 107 /*
 108  * Low level configuration
 109  */
 110
 111 /*
 112  * Clock configuration
 113  */
 114 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000        /* SYS_XTAL_IN = 33MHz */
 115 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 1       /* IPB = 133MHz */
 116
 117 /*
 118  * Memory map
 119  */
 120 #define CONFIG_SYS_MBAR         0xF0000000
 121 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 122 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 123
 124 #define CONFIG_SYS_LOWBOOT              1
 125
 126 /* Use ON-Chip SRAM until RAM will be available */
 127 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 128 #ifdef CONFIG_POST
 129 /* preserve space for the post_word at end of on-chip SRAM */
 130 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_POST_SIZE
 131 #else
 132 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
 133 #endif
 134
 135 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 136 #define CONFIG_BOARD_TYPES      1       /* we use board_type */
 137
 138 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 139
 140 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 141 #define CONFIG_SYS_MONITOR_LEN          (384 << 10)     /* 384 kB for Monitor */
 142 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)     /* 256 kB for malloc() */
 143 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* initial mem map for Linux */
 144
 145 /*
 146  * Flash configuration
 147  */
 148 #define CONFIG_SYS_FLASH_CFI            1
 149 #define CONFIG_FLASH_CFI_DRIVER 1
 150 #define CONFIG_SYS_FLASH_BASE           0xfc000000
 151 /* we need these despite using CFI */
 152 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of flash banks */
 153 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* max num of sectors on one chip */
 154 #define CONFIG_SYS_FLASH_SIZE           0x02000000 /* 32 MiB */
 155
 156 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 157 #define CONFIG_SYS_RAMBOOT              1
 158 #undef CONFIG_SYS_LOWBOOT
 159 #endif
 160
 161 /*
 162  * Chip selects configuration
 163  */
 164 /* Boot Chipselect */
 165 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 166 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 167 #define CONFIG_SYS_BOOTCS_CFG           0x00087D31      /* for pci_clk = 33 MHz */
 168 /* use board_early_init_r to enable flash write in CS_BOOT */
 169 #define CONFIG_BOARD_EARLY_INIT_R
 170
 171 /* Flash memory addressing */
 172 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 173 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 174
 175 /* No burst, dead cycle = 1 for CS0 (Flash) */
 176 #define CONFIG_SYS_CS_BURST             0x00000000
 177 #define CONFIG_SYS_CS_DEADCYCLE 0x00000001
 178
 179 /*
 180  * SDRAM configuration
 181  * settings for k4s561632E-xx75, assuming XLB = 132 MHz
 182  */
 183 #define SDRAM_MODE      0x00CD0000      /* CASL 3, burst length 8 */
 184 #define SDRAM_CONTROL   0x514F0000
 185 #define SDRAM_CONFIG1   0xE2333900
 186 #define SDRAM_CONFIG2   0x8EE70000
 187
 188 /*
 189  * MTD configuration
 190  */
 191 #define CONFIG_CMD_MTDPARTS     1
 192 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 193 #define CONFIG_FLASH_CFI_MTD
 194 #define MTDIDS_DEFAULT          "nor0=cm5200-0"
 195 #define MTDPARTS_DEFAULT        "mtdparts=cm5200-0:"                    \
 196                                         "384k(uboot),128k(env),"        \
 197                                         "128k(redund_env),128k(dtb),"   \
 198                                         "2m(kernel),27904k(rootfs),"    \
 199                                         "-(config)"
 200
 201 /*
 202  * RTC configuration
 203  */
 204 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 205
 206 /*
 207  * USB configuration
 208  */
 209 #define CONFIG_USB_OHCI         1
 210 #define CONFIG_USB_CLOCK        0x0001BBBB
 211 #define CONFIG_USB_CONFIG       0x00001000
 212 /* Partitions (for USB) */
 213
 214 /*
 215  * Invoke our last_stage_init function - needed by fwupdate
 216  */
 217 #define CONFIG_LAST_STAGE_INIT  1
 218
 219 /*
 220  * Environment settings
 221  */
 222 #define CONFIG_ENV_IS_IN_FLASH  1
 223 #define CONFIG_ENV_SIZE         0x10000
 224 #define CONFIG_ENV_SECT_SIZE    0x20000
 225 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 226 /* Configuration of redundant environment */
 227 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 228 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 229
 230 /*
 231  * Pin multiplexing configuration
 232  */
 233
 234 /*
 235  * CS1/GPIO_WKUP_6: GPIO (default)
 236  * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
 237  * IRDA/PSC6: UART
 238  * Ether: Ethernet 100Mbit with MD
 239  * PCI_DIS: PCI controller disabled
 240  * USB: USB
 241  * PSC3: SPI with UART3
 242  * PSC2: UART
 243  * PSC1: UART
 244  */
 245 #define CONFIG_SYS_GPS_PORT_CONFIG      0x10559C44
 246
 247 /*
 248  * Miscellaneous configurable options
 249  */
 250 #define CONFIG_SYS_LONGHELP             1       /* undef to save memory */
 251 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
 252 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 253 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 254 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 255
 256 #define CONFIG_SYS_ALT_MEMTEST          1
 257 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 258 #define CONFIG_SYS_MEMTEST_END          0x03f00000      /* 1 .. 63 MiB in SDRAM */
 259
 260 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 261
 262 /*
 263  * Various low-level settings
 264  */
 265 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 266 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 267
 268 #define CONFIG_SYS_XLB_PIPELINING       1       /* enable transaction pipeling */
 269
 270 /*
 271  * Cache Configuration
 272  */
 273 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 274 #ifdef CONFIG_CMD_KGDB
 275 #define CONFIG_SYS_CACHELINE_SHIFT      5       /* log base 2 of the above value */
 276 #endif
 277
 278 /*
 279  * Flat Device Tree support
 280  */
 281 #define OF_CPU                  "PowerPC,5200@0"
 282 #define OF_SOC                  "soc5200@f0000000"
 283 #define OF_TBCLK                (bd->bi_busfreq / 4)
 284 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
 285
 286 #endif /* __CONFIG_H */