include/configs/cgtqmx6eval.h

   1 /*
   2  *
   3  * Congatec Conga-QEVAl board configuration file.
   4  *
   5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
   6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
   7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
   8  * Leo Sartre, <lsartre@adeneo-embedded.com>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_CGTQMX6EVAL_H
  14 #define __CONFIG_CGTQMX6EVAL_H
  15
  16 #include "mx6_common.h"
  17
  18 #define CONFIG_MACH_TYPE        4122
  19
  20 #ifdef CONFIG_SPL
  21 #define CONFIG_SPL_LIBCOMMON_SUPPORT
  22 #define CONFIG_SPL_MMC_SUPPORT
  23 #define CONFIG_SPL_SPI_SUPPORT
  24 #define CONFIG_SPL_SPI_FLASH_SUPPORT
  25 #define CONFIG_SYS_SPI_U_BOOT_OFFS      (64 * 1024)
  26 #define CONFIG_SPL_SPI_LOAD
  27 #include "imx6_spl.h"
  28 #endif
  29
  30 /* Size of malloc() pool */
  31 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  32
  33 #define CONFIG_BOARD_EARLY_INIT_F
  34 #define CONFIG_BOARD_LATE_INIT
  35 #define CONFIG_MISC_INIT_R
  36
  37 #define CONFIG_MXC_UART
  38 #define CONFIG_MXC_UART_BASE           UART2_BASE
  39
  40 /* MMC Configs */
  41 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
  42
  43 /* SPI NOR */
  44 #define CONFIG_CMD_SF
  45 #define CONFIG_SPI_FLASH
  46 #define CONFIG_SPI_FLASH_STMICRO
  47 #define CONFIG_SPI_FLASH_SST
  48 #define CONFIG_MXC_SPI
  49 #define CONFIG_SF_DEFAULT_BUS           0
  50 #define CONFIG_SF_DEFAULT_SPEED         20000000
  51 #define CONFIG_SF_DEFAULT_MODE          (SPI_MODE_0)
  52
  53 /* Miscellaneous commands */
  54 #define CONFIG_CMD_BMODE
  55
  56 /* Thermal support */
  57 #define CONFIG_IMX_THERMAL
  58
  59 /* I2C Configs */
  60 #define CONFIG_CMD_I2C
  61 #define CONFIG_SYS_I2C
  62 #define CONFIG_SYS_I2C_MXC
  63 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  64 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  65 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  66 #define CONFIG_SYS_I2C_SPEED              100000
  67
  68 /* PMIC */
  69 #define CONFIG_POWER
  70 #define CONFIG_POWER_I2C
  71 #define CONFIG_POWER_PFUZE100
  72 #define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
  73
  74 /* USB Configs */
  75 #define CONFIG_CMD_USB
  76 #define CONFIG_CMD_FAT
  77 #define CONFIG_USB_EHCI
  78 #define CONFIG_USB_EHCI_MX6
  79 #define CONFIG_USB_STORAGE
  80 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  81 #define CONFIG_USB_HOST_ETHER
  82 #define CONFIG_USB_ETHER_ASIX
  83 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
  84 #define CONFIG_MXC_USB_FLAGS    0
  85 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
  86 #define CONFIG_USB_KEYBOARD
  87 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
  88
  89 #define CONFIG_USBD_HS
  90
  91 #define CONFIG_CMD_USB_MASS_STORAGE
  92 #define CONFIG_USB_FUNCTION_MASS_STORAGE
  93
  94 /* USB Device Firmware Update support */
  95 #define CONFIG_CMD_DFU
  96 #define CONFIG_USB_FUNCTION_DFU
  97 #define CONFIG_DFU_MMC
  98 #define CONFIG_DFU_SF
  99
 100 #define CONFIG_USB_FUNCTION_FASTBOOT
 101 #define CONFIG_CMD_FASTBOOT
 102 #define CONFIG_ANDROID_BOOT_IMAGE
 103 #define CONFIG_FASTBOOT_BUF_ADDR   CONFIG_SYS_LOAD_ADDR
 104 #define CONFIG_FASTBOOT_BUF_SIZE   0x07000000
 105
 106 /* Framebuffer */
 107 #define CONFIG_VIDEO
 108 #define CONFIG_VIDEO_IPUV3
 109 #define CONFIG_CFB_CONSOLE
 110 #define CONFIG_VGA_AS_SINGLE_DEVICE
 111 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 112 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 113 #define CONFIG_VIDEO_BMP_RLE8
 114 #define CONFIG_SPLASH_SCREEN
 115 #define CONFIG_SPLASH_SCREEN_ALIGN
 116 #define CONFIG_BMP_16BPP
 117 #define CONFIG_VIDEO_LOGO
 118 #define CONFIG_VIDEO_BMP_LOGO
 119 #ifdef CONFIG_MX6DL
 120 #define CONFIG_IPUV3_CLK 198000000
 121 #else
 122 #define CONFIG_IPUV3_CLK 264000000
 123 #endif
 124 #define CONFIG_IMX_HDMI
 125
 126 /* SATA */
 127 #define CONFIG_CMD_SATA
 128 #define CONFIG_DWC_AHSATA
 129 #define CONFIG_SYS_SATA_MAX_DEVICE      1
 130 #define CONFIG_DWC_AHSATA_PORT_ID       0
 131 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
 132 #define CONFIG_LBA48
 133 #define CONFIG_LIBATA
 134
 135 /* Ethernet */
 136 #define CONFIG_CMD_PING
 137 #define CONFIG_CMD_DHCP
 138 #define CONFIG_CMD_MII
 139 #define CONFIG_FEC_MXC
 140 #define CONFIG_MII
 141 #define IMX_FEC_BASE                    ENET_BASE_ADDR
 142 #define CONFIG_FEC_XCV_TYPE             RGMII
 143 #define CONFIG_ETHPRIME                 "FEC"
 144 #define CONFIG_FEC_MXC_PHYADDR          6
 145 #define CONFIG_PHYLIB
 146 #define CONFIG_PHY_ATHEROS
 147
 148 /* Command definition */
 149
 150 #define CONFIG_MXC_UART_BASE    UART2_BASE
 151 #define CONFIG_CONSOLE_DEV      "ttymxc1"
 152 #define CONFIG_MMCROOT          "/dev/mmcblk0p2"
 153 #define CONFIG_SYS_MMC_ENV_DEV          0
 154
 155 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 156 #define CONFIG_EXTRA_ENV_SETTINGS \
 157         "script=boot.scr\0" \
 158         "image=zImage\0" \
 159         "fdtfile=undefined\0" \
 160         "fdt_addr_r=0x18000000\0" \
 161         "boot_fdt=try\0" \
 162         "ip_dyn=yes\0" \
 163         "console=" CONFIG_CONSOLE_DEV "\0" \
 164         "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
 165         "dfu_alt_info_spl=spl raw 0x400\0" \
 166         "dfu_alt_info_img=u-boot raw 0x10000\0" \
 167         "dfu_alt_info=spl raw 0x400\0" \
 168         "bootm_size=0x10000000\0" \
 169         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
 170         "mmcpart=1\0" \
 171         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 172         "update_sd_firmware=" \
 173                 "if test ${ip_dyn} = yes; then " \
 174                         "setenv get_cmd dhcp; " \
 175                 "else " \
 176                         "setenv get_cmd tftp; " \
 177                 "fi; " \
 178                 "if mmc dev ${mmcdev}; then "   \
 179                         "if ${get_cmd} ${update_sd_firmware_filename}; then " \
 180                                 "setexpr fw_sz ${filesize} / 0x200; " \
 181                                 "setexpr fw_sz ${fw_sz} + 1; "  \
 182                                 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
 183                         "fi; "  \
 184                 "fi\0" \
 185         "mmcargs=setenv bootargs console=${console},${baudrate} " \
 186                 "root=${mmcroot}\0" \
 187         "loadbootscript=" \
 188                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 189         "bootscript=echo Running bootscript from mmc ...; " \
 190                 "source\0" \
 191         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
 192         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
 193         "mmcboot=echo Booting from mmc ...; " \
 194                 "run mmcargs; " \
 195                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 196                         "if run loadfdt; then " \
 197                                 "bootz ${loadaddr} - ${fdt_addr_r}; " \
 198                         "else " \
 199                                 "if test ${boot_fdt} = try; then " \
 200                                         "bootz; " \
 201                                 "else " \
 202                                         "echo WARN: Cannot load the DT; " \
 203                                 "fi; " \
 204                         "fi; " \
 205                 "else " \
 206                         "bootz; " \
 207                 "fi;\0" \
 208         "findfdt="\
 209                 "if test $board_rev = MX6Q ; then " \
 210                         "setenv fdtfile imx6q-qmx6.dtb; fi; " \
 211                 "if test $board_rev = MX6DL ; then " \
 212                         "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
 213                 "if test $fdtfile = undefined; then " \
 214                         "echo WARNING: Could not determine dtb to use; fi; \0" \
 215         "netargs=setenv bootargs console=${console},${baudrate} " \
 216                 "root=/dev/nfs " \
 217                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 218         "netboot=echo Booting from net ...; " \
 219                 "run netargs; " \
 220                 "if test ${ip_dyn} = yes; then " \
 221                         "setenv get_cmd dhcp; " \
 222                 "else " \
 223                         "setenv get_cmd tftp; " \
 224                 "fi; " \
 225                 "${get_cmd} ${image}; " \
 226                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 227                         "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
 228                                 "bootz ${loadaddr} - ${fdt_addr_r}; " \
 229                         "else " \
 230                                 "if test ${boot_fdt} = try; then " \
 231                                         "bootz; " \
 232                                 "else " \
 233                                         "echo WARN: Cannot load the DT; " \
 234                                 "fi; " \
 235                         "fi; " \
 236                 "else " \
 237                         "bootz; " \
 238                 "fi;\0" \
 239         "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
 240
 241 #define CONFIG_BOOTCOMMAND \
 242         "run spilock;"      \
 243         "run findfdt; " \
 244         "mmc dev ${mmcdev};" \
 245         "if mmc rescan; then " \
 246                 "if run loadbootscript; then " \
 247                 "run bootscript; " \
 248                 "else " \
 249                         "if run loadimage; then " \
 250                                 "run mmcboot; " \
 251                         "else run netboot; " \
 252                         "fi; " \
 253                 "fi; " \
 254         "else run netboot; fi"
 255
 256 #define CONFIG_SYS_MEMTEST_START       0x10000000
 257 #define CONFIG_SYS_MEMTEST_END         0x10010000
 258 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
 259
 260 /* Physical Memory Map */
 261 #define CONFIG_NR_DRAM_BANKS           1
 262 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 263 #define PHYS_SDRAM_SIZE                        (1u * 1024 * 1024 * 1024)
 264
 265 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
 266 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
 267 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 268
 269 #define CONFIG_SYS_INIT_SP_OFFSET \
 270         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 271 #define CONFIG_SYS_INIT_SP_ADDR \
 272         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 273
 274 /* Environment organization */
 275 #if defined (CONFIG_ENV_IS_IN_MMC)
 276 #define CONFIG_ENV_OFFSET               (6 * 64 * 1024)
 277 #define CONFIG_SYS_MMC_ENV_DEV          0
 278 #endif
 279
 280 #define CONFIG_ENV_SIZE                 (8 * 1024)
 281
 282 #define CONFIG_ENV_IS_IN_SPI_FLASH
 283 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 284 #define CONFIG_ENV_OFFSET               (768 * 1024)
 285 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
 286 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
 287 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
 288 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
 289 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 290 #endif
 291
 292 #endif                         /* __CONFIG_CGTQMX6EVAL_H */