b22fc6c5ddcccf4e9d2636f03117358e2d9ee576
[platform/kernel/u-boot.git] / include / configs / capricorn-common.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2017-2018 NXP
4  * Copyright 2019 Siemens AG
5  */
6
7 #ifndef __IMX8X_CAPRICORN_H
8 #define __IMX8X_CAPRICORN_H
9
10 #include <linux/sizes.h>
11 #include <asm/arch/imx-regs.h>
12
13 #include "siemens-env-common.h"
14
15 /* SPL config */
16 #ifdef CONFIG_SPL_BUILD
17
18 #define CONFIG_SYS_MONITOR_LEN          (1024 * 1024)
19
20 #define CONFIG_SPL_BSS_START_ADDR       0x00128000
21 #define CONFIG_SYS_SPL_MALLOC_START     0x00120000
22 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x3000  /* 12 KB */
23 #define CONFIG_MALLOC_F_ADDR            0x00120000
24
25 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
26 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
27
28 #endif /* CONFIG_SPL_BUILD */
29
30 #define CONFIG_FACTORYSET
31
32 /* ENET1 connects to base board and MUX with ESAI */
33 #define CONFIG_FEC_ENET_DEV             1
34 #define CONFIG_FEC_MXC_PHYADDR          0x0
35
36 /* I2C Configuration */
37 #ifndef CONFIG_SPL_BUILD
38 /* EEPROM */
39 #define  EEPROM_I2C_BUS         0 /* I2C0 */
40 #define  EEPROM_I2C_ADDR        0x50
41 /* PCA9552 */
42 #define  PCA9552_1_I2C_BUS      1 /* I2C1 */
43 #define  PCA9552_1_I2C_ADDR     0x60
44 #endif /* !CONFIG_SPL_BUILD */
45
46 /* AHAB */
47 #ifdef CONFIG_AHAB_BOOT
48 #define AHAB_ENV "sec_boot=yes\0"
49 #else
50 #define AHAB_ENV "sec_boot=no\0"
51 #endif
52
53 #define MFG_ENV_SETTINGS_DEFAULT \
54         "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
55                 "rdinit=/linuxrc " \
56                 "clk_ignore_unused "\
57                 "\0" \
58         "kboot=booti\0"\
59         "bootcmd_mfg=run mfgtool_args;" \
60         "if iminfo ${initrd_addr}; then " \
61         "if test ${tee} = yes; then " \
62                 "bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; " \
63         "else " \
64                 "booti ${loadaddr} ${initrd_addr} ${fdt_addr}; " \
65         "fi; " \
66         "else " \
67             "echo \"Run fastboot ...\"; fastboot 0; "  \
68         "fi;\0"
69
70 /* Boot M4 */
71 #define M4_BOOT_ENV \
72         "m4_0_image=m4_0.bin\0" \
73         "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} " \
74                         "${loadaddr} ${m4_0_image}\0" \
75         "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
76
77 #define CONFIG_MFG_ENV_SETTINGS \
78         MFG_ENV_SETTINGS_DEFAULT \
79         "initrd_addr=0x83100000\0" \
80         "initrd_high=0xffffffffffffffff\0" \
81         "emmc_dev=0\0"
82
83 /* Initial environment variables */
84 #define CONFIG_EXTRA_ENV_SETTINGS \
85         CONFIG_MFG_ENV_SETTINGS \
86         M4_BOOT_ENV \
87         AHAB_ENV \
88         ENV_COMMON \
89         "script=boot.scr\0" \
90         "image=Image\0" \
91         "panel=NULL\0" \
92         "console=ttyLP2\0" \
93         "fdt_addr=0x83000000\0" \
94         "fdt_high=0xffffffffffffffff\0" \
95         "cntr_addr=0x88000000\0" \
96         "cntr_file=os_cntr_signed.bin\0" \
97         "initrd_addr=0x83800000\0" \
98         "initrd_high=0xffffffffffffffff\0" \
99         "netdev=eth0\0" \
100         "nfsopts=vers=3,udp,rsize=4096,wsize=4096,nolock rw\0" \
101         "hostname=capricorn\0" \
102         ENV_EMMC \
103         ENV_NET
104
105 /* Default location for tftp and bootm */
106
107 /* On CCP board, USDHC1 is for eMMC */
108
109 #define CONFIG_SYS_SDRAM_BASE           0x80000000
110 #define PHYS_SDRAM_1                    0x80000000
111 #define PHYS_SDRAM_2                    0x880000000
112 /* DDR3 board total DDR is 1 GB */
113 #define PHYS_SDRAM_1_SIZE               0x40000000      /* 1 GB */
114 #define PHYS_SDRAM_2_SIZE               0x00000000      /* 0 GB */
115
116 #define BOOTAUX_RESERVED_MEM_BASE       0x88000000
117 #define BOOTAUX_RESERVED_MEM_SIZE       SZ_128M /* Reserve from second 128MB */
118
119 #endif /* __IMX8X_CAPRICORN_H */