include/configs/bamboo.h

   1 /*
   2  * (C) Copyright 2005-2007
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /************************************************************************
   9  * bamboo.h - configuration for BAMBOO board
  10  ***********************************************************************/
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 /*-----------------------------------------------------------------------
  15  * High Level Configuration Options
  16  *----------------------------------------------------------------------*/
  17 #define CONFIG_BAMBOO           1       /* Board is BAMBOO              */
  18 #define CONFIG_440EP            1       /* Specific PPC440EP support    */
  19 #define CONFIG_440              1       /* ... PPC440 family            */
  20 #define CONFIG_SYS_CLK_FREQ     33333333    /* external freq to pll     */
  21
  22 #ifndef CONFIG_SYS_TEXT_BASE
  23 #define CONFIG_SYS_TEXT_BASE    0xFFFA0000
  24 #endif
  25
  26 /*
  27  * Include common defines/options for all AMCC eval boards
  28  */
  29 #define CONFIG_HOSTNAME         bamboo
  30 #include "amcc-common.h"
  31
  32 /* Reclaim some space. */
  33 #undef CONFIG_SYS_LONGHELP
  34
  35 /*
  36  * Please note that, if NAND support is enabled, the 2nd ethernet port
  37  * can't be used because of pin multiplexing. So, if you want to use the
  38  * 2nd ethernet port you have to "undef" the following define.
  39  */
  40 #define CONFIG_BAMBOO_NAND      1       /* enable nand flash support    */
  41
  42 /*-----------------------------------------------------------------------
  43  * Base addresses -- Note these are effective addresses where the
  44  * actual resources get mapped (not physical addresses)
  45  *----------------------------------------------------------------------*/
  46 #define CONFIG_SYS_FLASH_BASE           0xfff00000          /* start of FLASH   */
  47 #define CONFIG_SYS_PCI_MEMBASE          0xa0000000          /* mapped pci memory*/
  48 #define CONFIG_SYS_PCI_MEMBASE1        CONFIG_SYS_PCI_MEMBASE  + 0x10000000
  49 #define CONFIG_SYS_PCI_MEMBASE2        CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
  50 #define CONFIG_SYS_PCI_MEMBASE3        CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
  51
  52 /*Don't change either of these*/
  53 #define CONFIG_SYS_PCI_BASE             0xe0000000          /* internal PCI regs*/
  54 /*Don't change either of these*/
  55
  56 #define CONFIG_SYS_USB_DEVICE          0x50000000
  57 #define CONFIG_SYS_NVRAM_BASE_ADDR     0x80000000
  58 #define CONFIG_SYS_BOOT_BASE_ADDR      0xf0000000
  59 #define CONFIG_SYS_NAND_ADDR           0x90000000
  60 #define CONFIG_SYS_NAND2_ADDR          0x94000000
  61
  62 /*-----------------------------------------------------------------------
  63  * Initial RAM & stack pointer (placed in SDRAM)
  64  *----------------------------------------------------------------------*/
  65 #define CONFIG_SYS_INIT_RAM_DCACHE      1               /* d-cache as init ram  */
  66 #define CONFIG_SYS_INIT_RAM_ADDR        0x70000000      /* DCache       */
  67 #define CONFIG_SYS_INIT_RAM_SIZE        (4 << 10)
  68 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  69 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  70
  71 /*-----------------------------------------------------------------------
  72  * Serial Port
  73  *----------------------------------------------------------------------*/
  74 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
  75 #define CONFIG_SYS_EXT_SERIAL_CLOCK     11059200 /* use external 11.059MHz clk  */
  76
  77 /*-----------------------------------------------------------------------
  78  * NVRAM/RTC
  79  *
  80  * NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF
  81  * The DS1558 code assumes this condition
  82  *
  83  *----------------------------------------------------------------------*/
  84 #define CONFIG_SYS_NVRAM_SIZE           (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs     */
  85 #define CONFIG_RTC_DS1556       1                        /* DS1556 RTC          */
  86
  87 /*-----------------------------------------------------------------------
  88  * Environment
  89  *----------------------------------------------------------------------*/
  90 #define CONFIG_ENV_IS_IN_FLASH     1    /* use FLASH for environment vars       */
  91
  92 /*-----------------------------------------------------------------------
  93  * FLASH related
  94  *----------------------------------------------------------------------*/
  95 #define CONFIG_SYS_MAX_FLASH_BANKS      3       /* number of banks                      */
  96 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* sectors per device                   */
  97
  98 #undef  CONFIG_SYS_FLASH_CHECKSUM
  99 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
 100 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
 101
 102 #define CONFIG_SYS_FLASH_ADDR0         0x555
 103 #define CONFIG_SYS_FLASH_ADDR1         0x2aa
 104 #define CONFIG_SYS_FLASH_WORD_SIZE     unsigned char
 105
 106 #define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1        /* bamboo has 8 and 16bit device        */
 107 #define CONFIG_SYS_FLASH_2ND_ADDR      0x87800000  /* bamboo has 8 and 16bit device     */
 108
 109 #ifdef CONFIG_ENV_IS_IN_FLASH
 110 #define CONFIG_ENV_SECT_SIZE    0x10000 /* size of one complete sector          */
 111 #define CONFIG_ENV_ADDR         ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
 112 #define CONFIG_ENV_SIZE         0x2000  /* Total Size of Environment Sector     */
 113
 114 /* Address and size of Redundant Environment Sector     */
 115 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 116 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 117 #endif /* CONFIG_ENV_IS_IN_FLASH */
 118
 119 /*-----------------------------------------------------------------------
 120  * NAND FLASH
 121  *----------------------------------------------------------------------*/
 122 #define CONFIG_SYS_MAX_NAND_DEVICE      2
 123 #define CONFIG_SYS_NAND_BASE            (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 124 #define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_ADDR + 2 }
 125 #define CONFIG_SYS_NAND_SELECT_DEVICE  1        /* nand driver supports mutipl. chips   */
 126 #define CONFIG_SYS_NAND_CS              1
 127
 128 /*-----------------------------------------------------------------------
 129  * DDR SDRAM
 130  *----------------------------------------------------------------------------- */
 131 #define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for setup             */
 132 #undef CONFIG_DDR_ECC                   /* don't use ECC                        */
 133 #define CONFIG_SYS_SIMULATE_SPD_EEPROM  0xff    /* simulate spd eeprom on this address  */
 134 #define SPD_EEPROM_ADDRESS      {CONFIG_SYS_SIMULATE_SPD_EEPROM, 0x50, 0x51}
 135 #define CONFIG_SYS_MBYTES_SDRAM (64)    /* 64MB fixed size for early-sdram-init */
 136 #define CONFIG_PROG_SDRAM_TLB
 137
 138 /*-----------------------------------------------------------------------
 139  * I2C
 140  *----------------------------------------------------------------------*/
 141 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           400000
 142
 143 #define CONFIG_SYS_I2C_EEPROM_ADDR      (0xa8>>1)
 144 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 145 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 146 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
 147
 148 #ifdef CONFIG_ENV_IS_IN_EEPROM
 149 #define CONFIG_ENV_SIZE         0x200       /* Size of Environment vars */
 150 #define CONFIG_ENV_OFFSET               0x0
 151 #endif /* CONFIG_ENV_IS_IN_EEPROM */
 152
 153 /*
 154  * Default environment variables
 155  */
 156 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 157         CONFIG_AMCC_DEF_ENV                                             \
 158         CONFIG_AMCC_DEF_ENV_POWERPC                                     \
 159         CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
 160         CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
 161         "kernel_addr=fff00000\0"                                        \
 162         "ramdisk_addr=fff10000\0"                                       \
 163         ""
 164
 165 #define CONFIG_HAS_ETH0
 166 #define CONFIG_PHY_ADDR         0       /* PHY address, See schematics  */
 167 #define CONFIG_PHY1_ADDR        1
 168
 169 #ifndef CONFIG_BAMBOO_NAND
 170 #define CONFIG_HAS_ETH1         1       /* add support for "eth1addr"   */
 171 #endif /* CONFIG_BAMBOO_NAND */
 172
 173 #ifdef CONFIG_440EP
 174 /* USB */
 175 #define CONFIG_USB_OHCI
 176
 177 /*Comment this out to enable USB 1.1 device*/
 178 #define USB_2_0_DEVICE
 179 #endif /*CONFIG_440EP*/
 180
 181 /*
 182  * Commands additional to the ones defined in amcc-common.h
 183  */
 184 #define CONFIG_CMD_DATE
 185 #define CONFIG_CMD_PCI
 186 #define CONFIG_CMD_SDRAM
 187
 188 #ifdef CONFIG_BAMBOO_NAND
 189 #define CONFIG_CMD_NAND
 190 #endif
 191
 192 #define CONFIG_SUPPORT_VFAT
 193
 194 /* Partitions */
 195 #define CONFIG_DOS_PARTITION
 196 #define CONFIG_ISO_PARTITION
 197
 198 /*-----------------------------------------------------------------------
 199  * PCI stuff
 200  *-----------------------------------------------------------------------
 201  */
 202 /* General PCI */
 203 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
 204 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 205 #define CONFIG_SYS_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/
 206
 207 /* Board-specific PCI */
 208 #define CONFIG_SYS_PCI_TARGET_INIT
 209 #define CONFIG_SYS_PCI_MASTER_INIT
 210
 211 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8   /* AMCC */
 212 #define CONFIG_SYS_PCI_SUBSYS_ID       0xcafe   /* Whatever */
 213
 214 #endif  /* __CONFIG_H */