2 * Copyright (C) 2006 Atmel Corporation
4 * Copyright (C) 2012 Andreas Bießmann <andreas.devel@googlemail.com>
6 * Configuration settings for the AVR32 Network Gateway
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/hardware.h>
16 #define CONFIG_AT32AP7000
17 #define CONFIG_ATNGW100MKII
19 #define CONFIG_SYS_GENERIC_BOARD
20 #define CONFIG_BOARD_EARLY_INIT_F
21 #define CONFIG_BOARD_EARLY_INIT_R
24 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
25 * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
26 * and the PBA bus to run at 1/4 the PLL frequency.
29 #define CONFIG_SYS_POWER_MANAGER
30 #define CONFIG_SYS_OSC0_HZ 20000000
31 #define CONFIG_SYS_PLL0_DIV 1
32 #define CONFIG_SYS_PLL0_MUL 7
33 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
35 * Set the CPU running at:
36 * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
38 #define CONFIG_SYS_CLKDIV_CPU 0
40 * Set the HSB running at:
41 * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
43 #define CONFIG_SYS_CLKDIV_HSB 1
45 * Set the PBA running at:
46 * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
48 #define CONFIG_SYS_CLKDIV_PBA 2
50 * Set the PBB running at:
51 * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
53 #define CONFIG_SYS_CLKDIV_PBB 1
55 /* Reserve VM regions for NOR flash, NAND flash and SDRAM */
56 #define CONFIG_SYS_NR_VM_REGIONS 3
59 * The PLLOPT register controls the PLL like this:
63 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
65 #define CONFIG_SYS_PLL0_OPT 0x04
67 #define CONFIG_USART_BASE ATMEL_BASE_USART1
68 #define CONFIG_USART_ID 1
70 /* User serviceable stuff */
71 #define CONFIG_DOS_PARTITION
73 #define CONFIG_CMDLINE_TAG
74 #define CONFIG_SETUP_MEMORY_TAGS
75 #define CONFIG_INITRD_TAG
77 #define CONFIG_STACKSIZE (2048)
79 #define CONFIG_BAUDRATE 115200
80 #define CONFIG_BOOTARGS \
81 "root=mtd:main rootfstype=jffs2"
82 #define CONFIG_BOOTCOMMAND \
83 "fsload 0x10400000 /uImage; bootm"
86 * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
87 * data on the serial line may interrupt the boot sequence.
89 #define CONFIG_BOOTDELAY 1
90 #define CONFIG_AUTOBOOT
91 #define CONFIG_AUTOBOOT_KEYED
92 #define CONFIG_AUTOBOOT_PROMPT \
93 "Press SPACE to abort autoboot in %d seconds\n", bootdelay
94 #define CONFIG_AUTOBOOT_DELAY_STR "d"
95 #define CONFIG_AUTOBOOT_STOP_STR " "
98 * After booting the board for the first time, new ethernet addresses
99 * should be generated and assigned to the environment variables
100 * "ethaddr" and "eth1addr". This is normally done during production.
102 #define CONFIG_OVERWRITE_ETHADDR_ONCE
107 #define CONFIG_BOOTP_SUBNETMASK
108 #define CONFIG_BOOTP_GATEWAY
111 * Command line configuration.
113 #include <config_cmd_default.h>
115 #define CONFIG_CMD_ASKENV
116 #define CONFIG_CMD_DHCP
117 #define CONFIG_CMD_EXT2
118 #define CONFIG_CMD_FAT
119 #define CONFIG_CMD_JFFS2
120 #define CONFIG_CMD_MMC
121 #define CONFIG_CMD_SF
122 #define CONFIG_CMD_SPI
123 #define CONFIG_CMD_MII
125 #undef CONFIG_CMD_FPGA
126 #undef CONFIG_CMD_SETGETDCR
127 #undef CONFIG_CMD_XIMG
129 #define CONFIG_ATMEL_USART
131 #define CONFIG_PORTMUX_PIO
132 #define CONFIG_SYS_NR_PIOS 5
133 #define CONFIG_SYS_HSDRAMC
135 #define CONFIG_GENERIC_ATMEL_MCI
136 #define CONFIG_GENERIC_MMC
137 #define CONFIG_ATMEL_SPI
139 #define CONFIG_SPI_FLASH
140 #define CONFIG_SPI_FLASH_ATMEL
142 #define CONFIG_SYS_DCACHE_LINESZ 32
143 #define CONFIG_SYS_ICACHE_LINESZ 32
145 #define CONFIG_NR_DRAM_BANKS 1
147 #define CONFIG_SYS_FLASH_CFI
148 #define CONFIG_FLASH_CFI_DRIVER
149 #define CONFIG_SYS_FLASH_PROTECTION
151 #define CONFIG_SYS_FLASH_BASE 0x00000000
152 #define CONFIG_SYS_FLASH_SIZE 0x800000
153 #define CONFIG_SYS_MAX_FLASH_BANKS 1
154 #define CONFIG_SYS_MAX_FLASH_SECT 135
156 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
157 #define CONFIG_SYS_TEXT_BASE 0x00000000
159 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
160 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
161 #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
163 #define CONFIG_ENV_IS_IN_FLASH
164 #define CONFIG_ENV_SIZE 65536
165 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
167 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
169 #define CONFIG_SYS_MALLOC_LEN (256*1024)
171 /* Allow 4MB for the kernel run-time image */
172 #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
173 #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
175 /* Other configuration settings that shouldn't have to change all that often */
176 #define CONFIG_SYS_PROMPT "U-Boot> "
177 #define CONFIG_SYS_CBSIZE 256
178 #define CONFIG_SYS_MAXARGS 16
179 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
180 #define CONFIG_SYS_LONGHELP
182 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
183 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
185 #define CONFIG_MTD_DEVICE
186 #define CONFIG_MTD_PARTITIONS
188 #endif /* __CONFIG_H */