1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2013 Atmel Corporation.
4 * Josh Wu <josh.wu@atmel.com>
6 * Configuation settings for the AT91SAM9N12-EK boards.
9 #ifndef __AT91SAM9N12_CONFIG_H_
10 #define __AT91SAM9N12_CONFIG_H_
12 /* ARM asynchronous clock */
13 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
14 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
16 /* Misc CPU related */
17 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
18 #define CONFIG_SETUP_MEMORY_TAGS
19 #define CONFIG_INITRD_TAG
22 #define LCD_BPP LCD_COLOR16
23 #define LCD_OUTPUT_BPP 24
24 #define CONFIG_LCD_LOGO
25 #define CONFIG_LCD_INFO
26 #define CONFIG_LCD_INFO_BELOW_LOGO
27 #define CONFIG_ATMEL_LCD_RGB565
32 #define CONFIG_BOOTP_BOOTFILESIZE
34 #define CONFIG_SYS_SDRAM_BASE 0x20000000
35 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
38 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
39 * leaving the correct space for initial global data structure above
40 * that address while providing maximum stack area below.
42 # define CONFIG_SYS_INIT_SP_ADDR \
43 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
48 #ifdef CONFIG_CMD_NAND
49 #define CONFIG_SYS_MAX_NAND_DEVICE 1
50 #define CONFIG_SYS_NAND_BASE 0x40000000
51 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
52 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
53 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
54 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
57 #define CONFIG_EXTRA_ENV_SETTINGS \
58 "console=console=ttyS0,115200\0" \
59 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
60 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
61 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
65 #define CONFIG_USB_ATMEL
66 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
67 #define CONFIG_USB_OHCI_NEW
68 #define CONFIG_SYS_USB_OHCI_CPU_INIT
69 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
70 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
71 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
74 #ifdef CONFIG_SPI_BOOT
76 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
77 #define CONFIG_BOOTCOMMAND \
78 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
79 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
82 #elif defined(CONFIG_NAND_BOOT)
84 /* bootstrap + u-boot + env + linux in nandflash */
85 #define CONFIG_BOOTCOMMAND \
86 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
87 "nand read 0x21000000 0x180000 0x080000;" \
88 "nand read 0x22000000 0x200000 0x400000;" \
89 "bootm 0x22000000 - 0x21000000"
91 #else /* CONFIG_SD_BOOT */
93 #define CONFIG_BOOTCOMMAND \
94 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
95 "fatload mmc 0:1 0x21000000 dtb;" \
96 "fatload mmc 0:1 0x22000000 uImage;" \
97 "bootm 0x22000000 - 0x21000000"
102 #define CONFIG_SPL_MAX_SIZE 0x6000
103 #define CONFIG_SPL_STACK 0x308000
105 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
106 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
107 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
108 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
110 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
112 #define CONFIG_SYS_MASTER_CLOCK 132096000
113 #define CONFIG_SYS_AT91_PLLA 0x20953f03
114 #define CONFIG_SYS_MCKR 0x1301
115 #define CONFIG_SYS_MCKR_CSS 0x1302
117 #ifdef CONFIG_SD_BOOT
118 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
120 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
121 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
122 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
123 #define CONFIG_SYS_NAND_PAGE_COUNT 64
124 #define CONFIG_SYS_NAND_OOBSIZE 64
125 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
126 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0