include/configs/at91sam9261ek.h

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * Configuation settings for the AT91SAM9261EK board.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 /* ARM asynchronous clock */
  15 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  16 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000        /* 18.432 MHz crystal */
  17
  18 #ifdef CONFIG_AT91SAM9G10
  19 #define CONFIG_AT91SAM9G10EK            /* It's an Atmel AT91SAM9G10 EK*/
  20 #else
  21 #define CONFIG_AT91SAM9261EK            /* It's an Atmel AT91SAM9261 EK*/
  22 #endif
  23
  24 #include <asm/hardware.h>
  25
  26 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  27 #define CONFIG_SETUP_MEMORY_TAGS
  28 #define CONFIG_INITRD_TAG
  29
  30 #define CONFIG_SKIP_LOWLEVEL_INIT
  31
  32 #define CONFIG_ATMEL_LEGACY
  33 #define CONFIG_SYS_TEXT_BASE            0x21f00000
  34
  35 /*
  36  * Hardware drivers
  37  */
  38
  39 /* gpio */
  40 #define CONFIG_AT91_GPIO
  41 #define CONFIG_AT91_GPIO_PULLUP         1
  42
  43 /* serial console */
  44 #define CONFIG_ATMEL_USART
  45 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  46 #define CONFIG_USART_ID                 ATMEL_ID_SYS
  47 #define CONFIG_BAUDRATE                 115200
  48
  49 /* LCD */
  50 #define LCD_BPP                         LCD_COLOR8
  51 #define CONFIG_LCD_LOGO
  52 #undef LCD_TEST_PATTERN
  53 #define CONFIG_LCD_INFO
  54 #define CONFIG_LCD_INFO_BELOW_LOGO
  55 #define CONFIG_SYS_WHITE_ON_BLACK
  56 #define CONFIG_ATMEL_LCD
  57 #ifdef CONFIG_AT91SAM9261EK
  58 #define CONFIG_ATMEL_LCD_BGR555
  59 #endif
  60
  61 /* LED */
  62 #define CONFIG_AT91_LED
  63 #define CONFIG_RED_LED          AT91_PIN_PA23   /* this is the power led */
  64 #define CONFIG_GREEN_LED        AT91_PIN_PA13   /* this is the user1 led */
  65 #define CONFIG_YELLOW_LED       AT91_PIN_PA14   /* this is the user2 led */
  66
  67
  68 /*
  69  * BOOTP options
  70  */
  71 #define CONFIG_BOOTP_BOOTFILESIZE
  72 #define CONFIG_BOOTP_BOOTPATH
  73 #define CONFIG_BOOTP_GATEWAY
  74 #define CONFIG_BOOTP_HOSTNAME
  75
  76 /*
  77  * Command line configuration.
  78  */
  79 #define CONFIG_CMD_NAND
  80
  81 /* SDRAM */
  82 #define CONFIG_NR_DRAM_BANKS            1
  83 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  84 #define CONFIG_SYS_SDRAM_SIZE           0x04000000
  85 #define CONFIG_SYS_INIT_SP_ADDR \
  86         (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
  87
  88 /* DataFlash */
  89 #define CONFIG_ATMEL_DATAFLASH_SPI
  90 #define CONFIG_HAS_DATAFLASH
  91 #define CONFIG_SYS_MAX_DATAFLASH_BANKS          2
  92 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0     0xC0000000      /* CS0 */
  93 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3     0xD0000000      /* CS3 */
  94 #define AT91_SPI_CLK                            15000000
  95 #define DATAFLASH_TCSS                          (0x1a << 16)
  96 #define DATAFLASH_TCHS                          (0x1 << 24)
  97
  98 /* NAND flash */
  99 #ifdef CONFIG_CMD_NAND
 100 #define CONFIG_NAND_ATMEL
 101 #define CONFIG_SYS_MAX_NAND_DEVICE              1
 102 #define CONFIG_SYS_NAND_BASE                    0x40000000
 103 #define CONFIG_SYS_NAND_DBW_8
 104 /* our ALE is AD22 */
 105 #define CONFIG_SYS_NAND_MASK_ALE                (1 << 22)
 106 /* our CLE is AD21 */
 107 #define CONFIG_SYS_NAND_MASK_CLE                (1 << 21)
 108 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
 109 #define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PC15
 110
 111 #endif
 112
 113 /* NOR flash - no real flash on this board */
 114 #define CONFIG_SYS_NO_FLASH
 115
 116 /* Ethernet */
 117 #define CONFIG_DRIVER_DM9000
 118 #define CONFIG_DM9000_BASE              0x30000000
 119 #define DM9000_IO                       CONFIG_DM9000_BASE
 120 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 4)
 121 #define CONFIG_DM9000_USE_16BIT
 122 #define CONFIG_DM9000_NO_SROM
 123 #define CONFIG_NET_RETRY_COUNT          20
 124 #define CONFIG_RESET_PHY_R
 125
 126 /* USB */
 127 #define CONFIG_USB_ATMEL
 128 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 129 #define CONFIG_USB_OHCI_NEW
 130 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 131 #define CONFIG_SYS_USB_OHCI_REGS_BASE           0x00500000      /* AT91SAM9261_UHP_BASE */
 132 #ifdef CONFIG_AT91SAM9G10EK
 133 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9g10"
 134 #else
 135 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9261"
 136 #endif
 137 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
 138
 139 #define CONFIG_SYS_LOAD_ADDR                    0x22000000      /* load address */
 140
 141 #define CONFIG_SYS_MEMTEST_START                CONFIG_SYS_SDRAM_BASE
 142 #define CONFIG_SYS_MEMTEST_END                  0x23e00000
 143
 144 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 145
 146 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
 147 #define CONFIG_ENV_IS_IN_DATAFLASH
 148 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
 149 #define CONFIG_ENV_OFFSET       0x4200
 150 #define CONFIG_ENV_ADDR         (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
 151 #define CONFIG_ENV_SIZE         0x4200
 152 #define CONFIG_BOOTCOMMAND      "cp.b 0xC0084000 0x22000000 0x210000; bootm"
 153 #define CONFIG_BOOTARGS         "console=ttyS0,115200 "                 \
 154                                 "root=/dev/mtdblock0 "                  \
 155                                 "mtdparts=atmel_nand:-(root) "          \
 156                                 "rw rootfstype=jffs2"
 157
 158 #elif CONFIG_SYS_USE_DATAFLASH_CS3
 159
 160 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
 161 #define CONFIG_ENV_IS_IN_DATAFLASH
 162 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
 163 #define CONFIG_ENV_OFFSET       0x4200
 164 #define CONFIG_ENV_ADDR         (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
 165 #define CONFIG_ENV_SIZE         0x4200
 166 #define CONFIG_BOOTCOMMAND      "cp.b 0xD0084000 0x22000000 0x210000; bootm"
 167 #define CONFIG_BOOTARGS         "console=ttyS0,115200 "                 \
 168                                 "root=/dev/mtdblock0 "                  \
 169                                 "mtdparts=atmel_nand:-(root) "          \
 170                                 "rw rootfstype=jffs2"
 171
 172 #else /* CONFIG_SYS_USE_NANDFLASH */
 173
 174 /* bootstrap + u-boot + env + linux in nandflash */
 175 #define CONFIG_ENV_IS_IN_NAND
 176 #define CONFIG_ENV_OFFSET               0xc0000
 177 #define CONFIG_ENV_OFFSET_REDUND        0x100000
 178 #define CONFIG_ENV_SIZE         0x20000         /* 1 sector = 128 kB */
 179 #define CONFIG_BOOTCOMMAND      "nand read 0x22000000 0x200000 0x300000; bootm"
 180 #define CONFIG_BOOTARGS                                                 \
 181         "console=ttyS0,115200 earlyprintk "                             \
 182         "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
 183         "256k(env),256k(env_redundant),256k(spare),"                    \
 184         "512k(dtb),6M(kernel)ro,-(rootfs) "                             \
 185         "root=/dev/mtdblock7 rw rootfstype=jffs2"
 186 #endif
 187
 188 #define CONFIG_SYS_CBSIZE               256
 189 #define CONFIG_SYS_MAXARGS              16
 190 #define CONFIG_SYS_LONGHELP
 191 #define CONFIG_CMDLINE_EDITING
 192 #define CONFIG_AUTO_COMPLETE
 193
 194 /*
 195  * Size of malloc() pool
 196  */
 197 #define CONFIG_SYS_MALLOC_LEN           ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 198
 199 #endif