1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration settings for the Sentec Cobra Board.
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
9 * configuration for ASTRO "Urmel" board.
10 * Originating from Cobra5272 configuration, messed up by
11 * Wolfgang Wegner <w.wegner@astro-kom.de>
12 * Please do not bother the original author with bug reports
13 * concerning this file.
16 #ifndef _CONFIG_ASTRO_MCF5373L_H
17 #define _CONFIG_ASTRO_MCF5373L_H
19 #include <linux/stringify.h>
22 * set the card type to actually compile for; either of
23 * the possibilities listed below has to be used!
35 #elif ASTRO_COFDMDUOS2
38 #error No card type defined!
42 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
43 * a different bootloader that has already performed RAM setup) or
44 * started directly from flash, which is the regular case for production
48 #define CONFIG_MONITOR_IS_IN_RAM
60 * Defines processor clock - important for correct timings concerning serial
64 #define CONFIG_SYS_CLK 80000000
65 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
66 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
68 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
69 #define CONFIG_SYS_CORE_SRAM 0x80000000
71 #define CONFIG_SYS_UNIFY_CACHE
74 * Define baudrate for UART1 (console output, tftp, ...)
75 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
76 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
77 * in u-boot command interface
80 #define CONFIG_SYS_UART_PORT (2)
81 #define CONFIG_SYS_UART2_ALT3_GPIO
84 * Watchdog configuration; Watchdog is disabled for running from RAM
85 * and set to highest possible value else. Beware there is no check
86 * in the watchdog code to validate the timeout value set here!
89 #ifndef CONFIG_MONITOR_IS_IN_RAM
90 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
94 * Configuration for environment
95 * Environment is located in the last sector of the flash
98 #ifndef CONFIG_MONITOR_IS_IN_RAM
101 * environment in RAM - This is used to use a single PC-based application
102 * to load an image, load U-Boot, load an environment and then start U-Boot
103 * to execute the commands from the environment. Feedback is done via setting
104 * and reading memory locations.
108 /* here we put our FPGA configuration... */
110 /* Define user parameters that have to be customized most likely */
112 /* AUTOBOOT settings - booting images automatically by u-boot after power on */
115 * The following settings will be contained in the environment block ; if you
116 * want to use a neutral environment all those settings can be manually set in
117 * u-boot: 'set' command
120 #define CONFIG_EXTRA_ENV_SETTINGS \
121 "loaderversion=11\0" \
122 "card_id="__stringify(ASTRO_ID)"\0" \
125 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
126 "fpga load 0 0x41000000 $filesize\0" \
127 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
128 "fpga load 1 0x41000000 $filesize\0" \
130 "env_check=if test $env_default -eq 1;"\
131 " then setenv env_default 0;saveenv;fi\0"
134 * "update" is a non-standard command that has to be supplied
135 * by external update.c; This is not included in mainline because
136 * it needs non-blocking CFI routines.
139 #define CONFIG_FPGA_COUNT 1
140 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
141 #define CONFIG_SYS_FPGA_WAIT 1000
143 /* End of user parameters to be customized */
145 /* Defines memory range for test */
148 * Low Level Configuration Settings
149 * (address mappings, register initial values, etc.)
150 * You should know what you are doing if you make changes here.
153 /* Base register address */
155 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
157 /* System Conf. Reg. & System Protection Reg. */
159 #define CONFIG_SYS_SCR 0x0003;
160 #define CONFIG_SYS_SPR 0xffff;
163 * Definitions for initial stack pointer and data area (in internal SRAM)
165 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
166 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000
167 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
168 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
169 GENERATED_GBL_DATA_SIZE)
170 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
173 * Start addresses for the final memory configuration
174 * (Set up by the startup code)
175 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
177 #define CONFIG_SYS_SDRAM_BASE 0x40000000
180 * Chipselect bank definitions
182 * CS0 - Flash 32MB (first 16MB)
183 * CS1 - Flash 32MB (second half)
189 #define CONFIG_SYS_CS0_BASE 0
190 #define CONFIG_SYS_CS0_MASK 0x00ff0001
191 #define CONFIG_SYS_CS0_CTRL 0x00001fc0
193 #define CONFIG_SYS_CS1_BASE 0x01000000
194 #define CONFIG_SYS_CS1_MASK 0x00ff0001
195 #define CONFIG_SYS_CS1_CTRL 0x00001fc0
197 #define CONFIG_SYS_CS2_BASE 0x20000000
198 #define CONFIG_SYS_CS2_MASK 0x00ff0001
199 #define CONFIG_SYS_CS2_CTRL 0x0000fec0
201 #define CONFIG_SYS_CS3_BASE 0x21000000
202 #define CONFIG_SYS_CS3_MASK 0x00ff0001
203 #define CONFIG_SYS_CS3_CTRL 0x0000fec0
205 #define CONFIG_SYS_FLASH_BASE 0x00000000
207 #ifdef CONFIG_MONITOR_IS_IN_RAM
208 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
210 /* This is mainly used during relocation in start.S */
211 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
213 /* Reserve 256 kB for Monitor */
214 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
216 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
219 * For booting Linux, the board info and command line data
220 * have to be in the first 8 MB of memory, since this is
221 * the maximum mapped by the Linux kernel during initialization ??
223 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
224 (CONFIG_SYS_SDRAM_SIZE << 20))
226 /* FLASH organization */
227 #define CONFIG_SYS_MAX_FLASH_SECT 259
228 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
230 #define CONFIG_SYS_FLASH_SIZE 0x2000000
231 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
233 #define LDS_BOARD_TEXT \
234 . = DEFINED(env_offset) ? env_offset : .; \
235 env/embedded.o(.text*)
238 /* JFFS Partition offset set */
239 #define CONFIG_SYS_JFFS2_FIRST_BANK 0
240 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
241 /* 512k reserved for u-boot */
242 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40
245 /* Cache Configuration */
247 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
248 CONFIG_SYS_INIT_RAM_SIZE - 8)
249 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
250 CONFIG_SYS_INIT_RAM_SIZE - 4)
251 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
252 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
253 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
254 CF_ACR_EN | CF_ACR_SM_ALL)
255 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
258 #endif /* _CONFIG_ASTRO_MCF5373L_H */