1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration settings for the Sentec Cobra Board.
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
9 * configuration for ASTRO "Urmel" board.
10 * Originating from Cobra5272 configuration, messed up by
11 * Wolfgang Wegner <w.wegner@astro-kom.de>
12 * Please do not bother the original author with bug reports
13 * concerning this file.
16 #ifndef _CONFIG_ASTRO_MCF5373L_H
17 #define _CONFIG_ASTRO_MCF5373L_H
19 #include <linux/stringify.h>
22 * set the card type to actually compile for; either of
23 * the possibilities listed below has to be used!
25 #define CONFIG_ASTRO_V532 1
29 #elif CONFIG_ASTRO_V512
31 #elif CONFIG_ASTRO_TWIN7S2
33 #elif CONFIG_ASTRO_V912
35 #elif CONFIG_ASTRO_COFDMDUOS2
38 #error No card type defined!
42 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
43 * a different bootloader that has already performed RAM setup) or
44 * started directly from flash, which is the regular case for production
48 #define CONFIG_MONITOR_IS_IN_RAM
61 #define CONFIG_SYS_I2C_FSL
62 #define CONFIG_SYS_FSL_I2C_SPEED 80000
63 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
64 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
65 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
68 * Defines processor clock - important for correct timings concerning serial
72 #define CONFIG_SYS_CLK 80000000
73 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
74 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
76 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
77 #define CONFIG_SYS_CORE_SRAM 0x80000000
79 #define CONFIG_SYS_UNIFY_CACHE
82 * Define baudrate for UART1 (console output, tftp, ...)
83 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
84 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
85 * in u-boot command interface
88 #define CONFIG_MCFUART
89 #define CONFIG_SYS_UART_PORT (2)
90 #define CONFIG_SYS_UART2_ALT3_GPIO
93 * Watchdog configuration; Watchdog is disabled for running from RAM
94 * and set to highest possible value else. Beware there is no check
95 * in the watchdog code to validate the timeout value set here!
98 #ifndef CONFIG_MONITOR_IS_IN_RAM
99 #define CONFIG_WATCHDOG
100 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
104 * Configuration for environment
105 * Environment is located in the last sector of the flash
108 #ifndef CONFIG_MONITOR_IS_IN_RAM
111 * environment in RAM - This is used to use a single PC-based application
112 * to load an image, load U-Boot, load an environment and then start U-Boot
113 * to execute the commands from the environment. Feedback is done via setting
114 * and reading memory locations.
118 /* here we put our FPGA configuration... */
120 /* Define user parameters that have to be customized most likely */
122 /* AUTOBOOT settings - booting images automatically by u-boot after power on */
125 * The following settings will be contained in the environment block ; if you
126 * want to use a neutral environment all those settings can be manually set in
127 * u-boot: 'set' command
130 #define CONFIG_EXTRA_ENV_SETTINGS \
131 "loaderversion=11\0" \
132 "card_id="__stringify(ASTRO_ID)"\0" \
135 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
136 "fpga load 0 0x41000000 $filesize\0" \
137 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
138 "fpga load 1 0x41000000 $filesize\0" \
140 "env_check=if test $env_default -eq 1;"\
141 " then setenv env_default 0;saveenv;fi\0"
144 * "update" is a non-standard command that has to be supplied
145 * by external update.c; This is not included in mainline because
146 * it needs non-blocking CFI routines.
148 #ifdef CONFIG_MONITOR_IS_IN_RAM
149 #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */
151 #if CONFIG_ASTRO_V532
152 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
153 "run xilinxload&&run alteraload&&bootm 0x80000;"\
156 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
157 "run xilinxload&&bootm 0x80000;update;reset"
161 /* default RAM address for user programs */
162 #define CONFIG_SYS_LOAD_ADDR 0x20000
164 #define CONFIG_FPGA_COUNT 1
165 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
166 #define CONFIG_SYS_FPGA_WAIT 1000
168 /* End of user parameters to be customized */
170 /* Defines memory range for test */
173 * Low Level Configuration Settings
174 * (address mappings, register initial values, etc.)
175 * You should know what you are doing if you make changes here.
178 /* Base register address */
180 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
182 /* System Conf. Reg. & System Protection Reg. */
184 #define CONFIG_SYS_SCR 0x0003;
185 #define CONFIG_SYS_SPR 0xffff;
188 * Definitions for initial stack pointer and data area (in internal SRAM)
190 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
191 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000
192 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
193 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
194 GENERATED_GBL_DATA_SIZE)
195 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
198 * Start addresses for the final memory configuration
199 * (Set up by the startup code)
200 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
202 #define CONFIG_SYS_SDRAM_BASE 0x40000000
205 * Chipselect bank definitions
207 * CS0 - Flash 32MB (first 16MB)
208 * CS1 - Flash 32MB (second half)
214 #define CONFIG_SYS_CS0_BASE 0
215 #define CONFIG_SYS_CS0_MASK 0x00ff0001
216 #define CONFIG_SYS_CS0_CTRL 0x00001fc0
218 #define CONFIG_SYS_CS1_BASE 0x01000000
219 #define CONFIG_SYS_CS1_MASK 0x00ff0001
220 #define CONFIG_SYS_CS1_CTRL 0x00001fc0
222 #define CONFIG_SYS_CS2_BASE 0x20000000
223 #define CONFIG_SYS_CS2_MASK 0x00ff0001
224 #define CONFIG_SYS_CS2_CTRL 0x0000fec0
226 #define CONFIG_SYS_CS3_BASE 0x21000000
227 #define CONFIG_SYS_CS3_MASK 0x00ff0001
228 #define CONFIG_SYS_CS3_CTRL 0x0000fec0
230 #define CONFIG_SYS_FLASH_BASE 0x00000000
232 #ifdef CONFIG_MONITOR_IS_IN_RAM
233 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
235 /* This is mainly used during relocation in start.S */
236 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
238 /* Reserve 256 kB for Monitor */
239 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
241 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
242 /* Reserve 128 kB for malloc() */
243 #define CONFIG_SYS_MALLOC_LEN (128 << 10)
246 * For booting Linux, the board info and command line data
247 * have to be in the first 8 MB of memory, since this is
248 * the maximum mapped by the Linux kernel during initialization ??
250 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
251 (CONFIG_SYS_SDRAM_SIZE << 20))
253 /* FLASH organization */
254 #define CONFIG_SYS_MAX_FLASH_BANKS 1
255 #define CONFIG_SYS_MAX_FLASH_SECT 259
256 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
258 #define CONFIG_SYS_FLASH_SIZE 0x2000000
259 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
261 #define LDS_BOARD_TEXT \
262 . = DEFINED(env_offset) ? env_offset : .; \
263 env/embedded.o(.text*)
266 /* JFFS Partition offset set */
267 #define CONFIG_SYS_JFFS2_FIRST_BANK 0
268 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
269 /* 512k reserved for u-boot */
270 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40
273 /* Cache Configuration */
274 #define CONFIG_SYS_CACHELINE_SIZE 16
276 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
277 CONFIG_SYS_INIT_RAM_SIZE - 8)
278 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
279 CONFIG_SYS_INIT_RAM_SIZE - 4)
280 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
281 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
282 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
283 CF_ACR_EN | CF_ACR_SM_ALL)
284 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
287 #endif /* _CONFIG_ASTRO_MCF5373L_H */