d7af4f91bcb2649a170308ec0b0a3985a12ca0c5
[platform/kernel/u-boot.git] / include / configs / apf27.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  *
4  * Configuration settings for the Armadeus Project motherboard APF27
5  *
6  * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
7  */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #define CONFIG_ENV_VERSION      10
13 #define CONFIG_BOARD_NAME apf27
14
15 /*
16  * SoC configurations
17  */
18 #define CONFIG_MX27                     /* This is a Freescale i.MX27 Chip */
19 #define CONFIG_MACH_TYPE        1698    /* APF27 */
20
21 /*
22  * Enable the call to miscellaneous platform dependent initialization.
23  */
24
25 /*
26  * SPL
27  */
28 #define CONFIG_SPL_TARGET       "u-boot-with-spl.bin"
29 #define CONFIG_SPL_MAX_SIZE     2048
30
31 /* NAND boot config */
32 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
33 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x800
34 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
35 #define CONFIG_SYS_NAND_U_BOOT_SIZE     CONFIG_SYS_MONITOR_LEN - 0x800
36
37 /*
38  * BOOTP options
39  */
40 #define CONFIG_BOOTP_BOOTFILESIZE
41 #define CONFIG_BOOTP_DNS2
42
43 #define CONFIG_HOSTNAME "apf27"
44 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
45
46 /*
47  * Memory configurations
48  */
49 #define CONFIG_NR_DRAM_POPULATED 1
50
51 #define ACFG_SDRAM_MBYTE_SYZE 64
52
53 #define PHYS_SDRAM_1                    0xA0000000
54 #define PHYS_SDRAM_2                    0xB0000000
55 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
56 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (512<<10))
57 #define CONFIG_SYS_MEMTEST_START        0xA0000000      /* memtest test area  */
58 #define CONFIG_SYS_MEMTEST_END          0xA0300000      /* 3 MiB RAM test */
59
60 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE  \
61                 + PHYS_SDRAM_1_SIZE - 0x0100000)
62
63 /*
64  * FLASH organization
65  */
66 #define ACFG_MONITOR_OFFSET             0x00000000
67 #define CONFIG_SYS_MONITOR_LEN          0x00100000      /* 1MiB */
68 #define CONFIG_ENV_OVERWRITE
69 #define CONFIG_ENV_OFFSET               0x00100000      /* NAND offset */
70 #define CONFIG_ENV_SIZE                 0x00020000      /* 128kB  */
71 #define CONFIG_ENV_RANGE                0X00080000      /* 512kB */
72 #define CONFIG_ENV_OFFSET_REDUND        \
73                 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)  /* +512kB */
74 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE /* 512kB */
75 #define CONFIG_FIRMWARE_OFFSET          0x00200000
76 #define CONFIG_FIRMWARE_SIZE            0x00080000      /* 512kB  */
77 #define CONFIG_KERNEL_OFFSET            0x00300000
78 #define CONFIG_ROOTFS_OFFSET            0x00800000
79
80 /*
81  * U-Boot general configurations
82  */
83 #define CONFIG_SYS_CBSIZE               2048            /* console I/O buffer */
84 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
85                                                 /* Boot argument buffer size */
86 #define CONFIG_USE_PREBOOT
87 #define CONFIG_PREBOOT                  "run check_flash check_env;"
88
89 /*
90  * Boot Linux
91  */
92 #define CONFIG_CMDLINE_TAG              /* send commandline to Kernel   */
93 #define CONFIG_SETUP_MEMORY_TAGS        /* send memory definition to kernel */
94 #define CONFIG_INITRD_TAG               /* send initrd params   */
95
96 #define CONFIG_BOOTFILE         __stringify(CONFIG_BOARD_NAME) "-linux.bin"
97
98 #define ACFG_CONSOLE_DEV        ttySMX0
99 #define CONFIG_BOOTCOMMAND      "run ubifsboot"
100 #define CONFIG_SYS_AUTOLOAD     "no"
101 /*
102  * Default load address for user programs and kernel
103  */
104 #define CONFIG_LOADADDR                 0xA0000000
105 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
106
107 /*
108  * Extra Environments
109  */
110 #define CONFIG_EXTRA_ENV_SETTINGS \
111         "env_version="          __stringify(CONFIG_ENV_VERSION)         "\0" \
112         "consoledev="           __stringify(ACFG_CONSOLE_DEV)           "\0" \
113         "mtdparts="             CONFIG_MTDPARTS_DEFAULT "\0" \
114         "partition=nand0,6\0"                                           \
115         "u-boot_addr="          __stringify(ACFG_MONITOR_OFFSET)        "\0" \
116         "env_addr="             __stringify(CONFIG_ENV_OFFSET)          "\0" \
117         "firmware_addr="        __stringify(CONFIG_FIRMWARE_OFFSET)     "\0" \
118         "firmware_size="        __stringify(CONFIG_FIRMWARE_SIZE)       "\0" \
119         "kernel_addr="          __stringify(CONFIG_KERNEL_OFFSET)       "\0" \
120         "rootfs_addr="          __stringify(CONFIG_ROOTFS_OFFSET)       "\0" \
121         "board_name="           __stringify(CONFIG_BOARD_NAME)          "\0" \
122         "kernel_addr_r=A0000000\0" \
123         "check_env=if test -n ${flash_env_version}; "                   \
124                 "then env default env_version; "                        \
125                 "else env set flash_env_version ${env_version}; env save; "\
126                 "fi; "                                                  \
127                 "if itest ${flash_env_version} < ${env_version}; then " \
128                         "echo \"*** Warning - Environment version"      \
129                         " change suggests: run flash_reset_env; reset\"; "\
130                         "env default flash_reset_env; "\
131                 "fi; \0"                                                \
132         "check_flash=nand lock; nand unlock ${env_addr}; \0"    \
133         "flash_reset_env=env default -f -a; saveenv; run update_env;"   \
134                 "echo Flash environment variables erased!\0"            \
135         "download_uboot=tftpboot ${loadaddr} ${board_name}"             \
136                 "-u-boot-with-spl.bin\0"                                \
137         "flash_uboot=nand unlock ${u-boot_addr} ;"                      \
138                 "nand erase.part u-boot;"               \
139                 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
140                         "then nand lock; nand unlock ${env_addr};"      \
141                                 "echo Flashing of uboot succeed;"       \
142                         "else echo Flashing of uboot failed;"           \
143                 "fi; \0"                                                \
144         "update_uboot=run download_uboot flash_uboot\0"                 \
145         "download_env=tftpboot ${loadaddr} ${board_name}"               \
146                 "-u-boot-env.txt\0"                             \
147         "flash_env=env import -t ${loadaddr}; env save; \0"             \
148         "update_env=run download_env flash_env\0"                       \
149         "update_all=run update_env update_uboot\0"                      \
150         "unlock_regs=mw 10000008 0; mw 10020008 0\0"                    \
151
152 /*
153  * Serial Driver
154  */
155 #define CONFIG_MXC_UART
156 #define CONFIG_MXC_UART_BASE            UART1_BASE
157
158 /*
159  * NOR
160  */
161
162 /*
163  * NAND
164  */
165
166 #define CONFIG_MXC_NAND_REGS_BASE       0xD8000000
167 #define CONFIG_SYS_NAND_BASE            CONFIG_MXC_NAND_REGS_BASE
168 #define CONFIG_SYS_MAX_NAND_DEVICE      1
169
170 #define CONFIG_MXC_NAND_HWECC
171 #define CONFIG_SYS_NAND_LARGEPAGE
172 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
173 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
174 #define CONFIG_SYS_NAND_PAGE_COUNT      CONFIG_SYS_NAND_BLOCK_SIZE / \
175                                                 CONFIG_SYS_NAND_PAGE_SIZE
176 #define CONFIG_SYS_NAND_SIZE            (256 * 1024 * 1024)
177 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   11
178 #define NAND_MAX_CHIPS                  1
179
180 #define CONFIG_FLASH_SHOW_PROGRESS      45
181 #define CONFIG_SYS_NAND_QUIET           1
182
183 /*
184  * Partitions & Filsystems
185  */
186
187 /*
188  * Ethernet (on SOC imx FEC)
189  */
190 #define CONFIG_FEC_MXC
191 #define CONFIG_FEC_MXC_PHYADDR          0x1f
192
193 /*
194  * FPGA
195  */
196 #define CONFIG_FPGA_COUNT               1
197 #define CONFIG_SYS_FPGA_WAIT            250 /* 250 ms */
198 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
199 #define CONFIG_SYS_FPGA_CHECK_CTRLC
200 #define CONFIG_SYS_FPGA_CHECK_ERROR
201
202 /*
203  * Fuses - IIM
204  */
205 #ifdef CONFIG_CMD_IMX_FUSE
206 #define IIM_MAC_BANK            0
207 #define IIM_MAC_ROW             5
208 #define IIM0_SCC_KEY            11
209 #define IIM1_SUID               1
210 #endif
211
212 /*
213  * I2C
214  */
215
216 #ifdef CONFIG_CMD_I2C
217 #define CONFIG_SYS_I2C
218 #define CONFIG_SYS_I2C_MXC
219 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
220 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
221 #define CONFIG_SYS_MXC_I2C1_SPEED       100000  /* 100 kHz */
222 #define CONFIG_SYS_MXC_I2C1_SLAVE       0x7F
223 #define CONFIG_SYS_MXC_I2C2_SPEED       100000  /* 100 kHz */
224 #define CONFIG_SYS_MXC_I2C2_SLAVE       0x7F
225 #define CONFIG_SYS_I2C_NOPROBES         { }
226
227 #ifdef CONFIG_CMD_EEPROM
228 # define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM 24LC02 */
229 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* bytes of address */
230 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
231 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* msec */
232 #endif /* CONFIG_CMD_EEPROM */
233 #endif /* CONFIG_CMD_I2C */
234
235 /*
236  * SD/MMC
237  */
238 #ifdef CONFIG_CMD_MMC
239 #define CONFIG_MXC_MCI_REGS_BASE        0x10014000
240 #endif
241
242 /*
243  * RTC
244  */
245 #ifdef CONFIG_CMD_DATE
246 #define CONFIG_RTC_DS1374
247 #define CONFIG_SYS_RTC_BUS_NUM          0
248 #endif /* CONFIG_CMD_DATE */
249
250 /*
251  * PLL
252  *
253  *  31 | x  |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
254  *     |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
255  */
256 #define CONFIG_MX27_CLK32               32768   /* 32768 or 32000 Hz crystal */
257
258 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
259 /* micron 64MB */
260 #define PHYS_SDRAM_1_SIZE                       0x04000000 /* 64 MB */
261 #define PHYS_SDRAM_2_SIZE                       0x04000000 /* 64 MB */
262 #endif
263
264 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
265 /* micron 128MB */
266 #define PHYS_SDRAM_1_SIZE                       0x08000000 /* 128 MB */
267 #define PHYS_SDRAM_2_SIZE                       0x08000000 /* 128 MB */
268 #endif
269
270 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
271 /* micron 256MB */
272 #define PHYS_SDRAM_1_SIZE                       0x10000000 /* 256 MB */
273 #define PHYS_SDRAM_2_SIZE                       0x10000000 /* 256 MB */
274 #endif
275
276 #endif /* __CONFIG_H */