include/configs/am3517_evm.h

   1 /*
   2  * am3517_evm.h - Default configuration for AM3517 EVM board.
   3  *
   4  * Author: Vaibhav Hiremath <hvaibhav@ti.com>
   5  *
   6  * Based on omap3_evm_config.h
   7  *
   8  * Copyright (C) 2010 Texas Instruments Incorporated
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 /* High Level Configuration Options */
  17
  18 #define CONFIG_OMAP
  19 #define CONFIG_OMAP_COMMON
  20
  21 #define CONFIG_SYS_NO_FLASH
  22
  23 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
  24
  25 /* Common ARM Erratas */
  26 #define CONFIG_ARM_ERRATA_454179
  27 #define CONFIG_ARM_ERRATA_430973
  28 #define CONFIG_ARM_ERRATA_621766
  29
  30 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  31
  32 /*
  33  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  34  * 64 bytes before this address should be set aside for u-boot.img's
  35  * header. That is 0x800FFFC0--0x80100000 should not be used for any
  36  * other needs.
  37  */
  38 #define CONFIG_SYS_TEXT_BASE            0x80100000
  39 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
  40 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  41
  42 #include <asm/arch/cpu.h>               /* get chip and board defs */
  43 #include <asm/arch/omap.h>
  44
  45 /* Display CPU and Board information */
  46 #define CONFIG_DISPLAY_CPUINFO
  47 #define CONFIG_DISPLAY_BOARDINFO
  48 #define CONFIG_MISC_INIT_R
  49 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  50 #define CONFIG_SETUP_MEMORY_TAGS
  51 #define CONFIG_INITRD_TAG
  52 #define CONFIG_REVISION_TAG
  53
  54 /* Clock Defines */
  55 #define V_OSCK                  26000000        /* Clock output from T2 */
  56 #define V_SCLK                  (V_OSCK >> 1)
  57
  58 /* Size of malloc() pool */
  59 #define CONFIG_SYS_MALLOC_LEN           (16 << 20)
  60
  61 /* Hardware drivers */
  62
  63 /* OMAP GPIO configuration */
  64 #define CONFIG_OMAP_GPIO
  65
  66 /* NS16550 Configuration */
  67 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  68 #define CONFIG_SYS_NS16550_SERIAL
  69 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  70 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  71
  72 /* select serial console configuration */
  73 #define CONFIG_CONS_INDEX               3
  74 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  75 #define CONFIG_SERIAL3                  3       /* UART3 on AM3517 EVM */
  76
  77 /* allow to overwrite serial and ethaddr */
  78 #define CONFIG_ENV_OVERWRITE
  79 #define CONFIG_BAUDRATE                 115200
  80 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  81                                         115200}
  82
  83 /* SD/MMC */
  84 #define CONFIG_MMC
  85 #define CONFIG_GENERIC_MMC
  86 #define CONFIG_OMAP_HSMMC
  87 #define CONFIG_DOS_PARTITION
  88
  89 /*
  90  * USB configuration
  91  * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
  92  * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
  93  */
  94 #define CONFIG_USB_MUSB_AM35X
  95 #define CONFIG_USB_MUSB_PIO_ONLY
  96
  97 #ifdef CONFIG_USB_MUSB_AM35X
  98
  99 #ifdef CONFIG_USB_MUSB_HOST
 100
 101 #define CONGIG_CMD_STORAGE
 102
 103 #ifdef CONFIG_USB_KEYBOARD
 104 #define CONFIG_SYS_USB_EVENT_POLL
 105 #define CONFIG_PREBOOT "usb start"
 106 #endif /* CONFIG_USB_KEYBOARD */
 107
 108 #endif /* CONFIG_USB_MUSB_HOST */
 109
 110 #ifdef CONFIG_USB_MUSB_GADGET
 111 #define CONFIG_USB_ETHER
 112 #define CONFIG_USB_ETH_RNDIS
 113 #endif /* CONFIG_USB_MUSB_GADGET */
 114
 115 #endif /* CONFIG_USB_MUSB_AM35X */
 116
 117 /* commands to include */
 118 #define CONFIG_CMD_NAND
 119 #define CONFIG_CMD_PART
 120 #define CONFIG_CMD_MTDPARTS
 121
 122 /* I2C */
 123 #define CONFIG_SYS_I2C
 124 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 125 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 126 #define CONFIG_SYS_I2C_OMAP34XX
 127
 128 /* Ethernet */
 129 #define CONFIG_DRIVER_TI_EMAC
 130 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 131 #define CONFIG_MII
 132 #define CONFIG_BOOTP_DEFAULT
 133 #define CONFIG_BOOTP_DNS
 134 #define CONFIG_BOOTP_DNS2
 135 #define CONFIG_BOOTP_SEND_HOSTNAME
 136 #define CONFIG_NET_RETRY_COUNT          10
 137
 138 /* Board NAND Info. */
 139 #ifdef CONFIG_NAND
 140 #define CONFIG_NAND_OMAP_GPMC
 141 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
 142 #define CONFIG_BCH
 143 #define CONFIG_CMD_UBI                  /* UBI-formated MTD partition support */
 144 #define CONFIG_CMD_UBIFS                /* Read-only UBI volume operations */
 145 #define CONFIG_RBTREE                   /* required by CONFIG_CMD_UBI */
 146 #define CONFIG_LZO                      /* required by CONFIG_CMD_UBIFS */
 147 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 148                                                         /* to access nand */
 149 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 150                                                         /* to access */
 151                                                         /* nand at CS0 */
 152 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 153                                                         /* NAND devices */
 154 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 155 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 156 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 157 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 158 #define CONFIG_SYS_NAND_OOBSIZE         64
 159 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 160 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 161 #define CONFIG_SYS_NAND_ECCPOS          { 2,  3,  4,  5,  6,  7,  8,  9, 10, \
 162                                          11, 12, 13, 14, 16, 17, 18, 19, 20, \
 163                                          21, 22, 23, 24, 25, 26, 27, 28, 30, \
 164                                          31, 32, 33, 34, 35, 36, 37, 38, 39, \
 165                                          40, 41, 42, 44, 45, 46, 47, 48, 49, \
 166                                          50, 51, 52, 53, 54, 55, 56 }
 167
 168 #define CONFIG_SYS_NAND_ECCSIZE         512
 169 #define CONFIG_SYS_NAND_ECCBYTES        13
 170 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
 171 #define CONFIG_SYS_NAND_MAX_OOBFREE     2
 172 #define CONFIG_SYS_NAND_MAX_ECCPOS      56
 173 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 174 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 175 #define CONFIG_MTD_PARTITIONS           /* required for UBI partition support */
 176 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 177 /* NAND block size is 128 KiB.  Synchronize these values with
 178  * corresponding Device Tree entries in Linux:
 179  *  MLO(SPL)             4 * NAND_BLOCK_SIZE = 512 KiB  @ 0x000000
 180  *  U-Boot              15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
 181  *  U-Boot environment   2 * NAND_BLOCK_SIZE = 256 KiB  @ 0x260000
 182  *  Kernel              64 * NAND_BLOCK_SIZE = 8 MiB    @ 0x2A0000
 183  *  DTB                  4 * NAND_BLOCK_SIZE = 512 KiB  @ 0xAA0000
 184  *  RootFS              Remaining Flash Space           @ 0xB20000
 185  */
 186 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
 187 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"       \
 188         "512k(MLO),"                                    \
 189         "1920k(u-boot),"                                \
 190         "256k(u-boot-env),"                             \
 191         "8m(kernel),"                                   \
 192         "512k(dtb),"                                    \
 193         "-(rootfs)"
 194 #else
 195 #define MTDIDS_DEFAULT
 196 #define MTDPARTS_DEFAULT
 197 #endif /* CONFIG_NAND */
 198
 199 /* Environment information */
 200
 201 #define CONFIG_BOOTFILE         "uImage"
 202
 203 #define CONFIG_EXTRA_ENV_SETTINGS \
 204         "loadaddr=0x82000000\0" \
 205         "console=ttyO2,115200n8\0" \
 206         "fdtfile=am3517-evm.dtb\0" \
 207         "fdtaddr=0x82C00000\0" \
 208         "vram=16M\0" \
 209         "bootenv=uEnv.txt\0" \
 210         "cmdline=\0" \
 211         "optargs=\0" \
 212         "mtdids=" MTDIDS_DEFAULT "\0" \
 213         "mtdparts=" MTDPARTS_DEFAULT "\0" \
 214         "mmcdev=0\0" \
 215         "mmcpart=1\0" \
 216         "mmcroot=/dev/mmcblk0p2 rw\0" \
 217         "mmcrootfstype=ext4 rootwait fixrtc\0" \
 218         "mmcargs=setenv bootargs console=${console} " \
 219                 "${mtdparts} " \
 220                 "${optargs} " \
 221                 "root=${mmcroot} " \
 222                 "rootfstype=${mmcrootfstype} " \
 223                 "${cmdline}\0" \
 224         "nandargs=setenv bootargs console=${console} " \
 225                 "${mtdparts} " \
 226                 "${optargs} " \
 227                 "root=ubi0:rootfs rw ubi.mtd=rootfs " \
 228                 "rootfstype=ubifs rootwait " \
 229                 "${cmdline}\0" \
 230         "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
 231         "importbootenv=echo Importing environment from mmc ...; " \
 232                 "env import -t ${loadaddr} ${filesize}\0" \
 233         "bootscript=echo Running bootscript from mmc ...; " \
 234                 "source ${loadaddr}\0" \
 235         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
 236         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
 237         "mmcboot=echo Booting from mmc ...; " \
 238                 "run mmcargs; " \
 239                 "bootz ${loadaddr} - ${fdtaddr}\0" \
 240         "nandboot=echo Booting from nand ...; " \
 241                 "run nandargs; " \
 242                 "nand read ${loadaddr} 2a0000 800000; " \
 243                 "nand read ${fdtaddr} aa0000 80000; " \
 244                 "bootm ${loadaddr} - ${fdtaddr}\0" \
 245
 246 #define CONFIG_BOOTCOMMAND \
 247         "mmc dev ${mmcdev}; if mmc rescan; then " \
 248                 "echo SD/MMC found on device $mmcdev; " \
 249                 "if run loadbootenv; then " \
 250                         "run importbootenv; " \
 251                 "fi; " \
 252                 "echo Checking if uenvcmd is set ...; " \
 253                 "if test -n $uenvcmd; then " \
 254                         "echo Running uenvcmd ...; " \
 255                         "run uenvcmd; " \
 256                 "fi; " \
 257                 "echo Running default loadimage ...; " \
 258                 "setenv bootfile zImage; " \
 259                 "if run loadimage; then " \
 260                         "run loadfdt; " \
 261                         "run mmcboot; " \
 262                 "fi; " \
 263         "else run nandboot; fi"
 264
 265 /* Miscellaneous configurable options */
 266 #define CONFIG_AUTO_COMPLETE
 267 #define CONFIG_CMDLINE_EDITING
 268 #define CONFIG_SYS_LONGHELP
 269 #define CONFIG_PARTITION_UUIDS
 270
 271 /* We set the max number of command args high to avoid HUSH bugs. */
 272 #define CONFIG_SYS_MAXARGS              64
 273
 274 /* Console I/O Buffer Size */
 275 #define CONFIG_SYS_CBSIZE               512
 276 /* Print Buffer Size */
 277 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE \
 278                                         + sizeof(CONFIG_SYS_PROMPT) + 16)
 279 /* Boot Argument Buffer Size */
 280 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 281
 282 /* memtest works on */
 283 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 284 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 285                                         0x01F00000) /* 31MB */
 286
 287 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 288                                                                 /* address */
 289
 290 /*
 291  * AM3517 has 12 GP timers, they can be driven by the system clock
 292  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 293  * This rate is divided by a local divisor.
 294  */
 295 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 296 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 297
 298 /* Physical Memory Map */
 299 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
 300 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
 301 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
 302 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 303 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 304 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 305 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 306                                          CONFIG_SYS_INIT_RAM_SIZE - \
 307                                          GENERATED_GBL_DATA_SIZE)
 308
 309 /* FLASH and environment organization */
 310
 311 /* **** PISMO SUPPORT *** */
 312 #define CONFIG_SYS_MAX_FLASH_SECT       520     /* max number of sectors */
 313                                                 /* on one chip */
 314 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of flash banks */
 315 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 316
 317 #if defined(CONFIG_NAND)
 318 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
 319 #endif
 320
 321 /* Monitor at start of flash */
 322 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 323
 324 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 325 #define CONFIG_ENV_SIZE                 CONFIG_SYS_ENV_SECT_SIZE
 326 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 327 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 328 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 329 #define CONFIG_ENV_IS_IN_NAND
 330
 331 /* Defines for SPL */
 332 #define CONFIG_SPL_FRAMEWORK
 333 #define CONFIG_SPL_BOARD_INIT
 334 #define CONFIG_SPL_NAND_SIMPLE
 335 #define CONFIG_SPL_TEXT_BASE            0x40200000
 336 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 337                                          CONFIG_SPL_TEXT_BASE)
 338
 339 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 340 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 341
 342 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 343 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
 344 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 345 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
 346
 347 #define CONFIG_SPL_NAND_BASE
 348 #define CONFIG_SPL_NAND_DRIVERS
 349 #define CONFIG_SPL_NAND_ECC
 350 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 351
 352 #endif /* __CONFIG_H */