Merge branch 'master' of git://git.denx.de/u-boot-arm
[platform/kernel/u-boot.git] / include / configs / a3m071.h
1 /*
2  * Copyright 2012-2013 Stefan Roese <sr@denx.de>
3  *
4  * See file CREDITS for list of people who contributed to this
5  * project.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17
18 #ifndef __CONFIG_H
19 #define __CONFIG_H
20
21 /*
22  * High Level Configuration Options
23  * (easy to change)
24  */
25
26 #define CONFIG_MPC5200
27 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
28 #define CONFIG_A3M071                   /* ... on A3M071 board */
29
30 #define CONFIG_SYS_TEXT_BASE    0x01000000      /* boot low for 32 MiB boards */
31
32 #define CONFIG_SPL_TARGET       "u-boot-img.bin"
33
34 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33MHz */
35
36 #define CONFIG_MISC_INIT_R
37 #define CONFIG_SYS_LOWBOOT              /* Enable lowboot       */
38
39 #ifdef CONFIG_A4M2K
40 #define CONFIG_HOSTNAME         a4m2k
41 #else
42 #define CONFIG_HOSTNAME         a3m071
43 #endif
44
45 /*
46  * Serial console configuration
47  */
48 #define CONFIG_PSC_CONSOLE      1           /* console is on PSC1 */
49 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
50 #define CONFIG_SYS_BAUDRATE_TABLE               \
51         { 9600, 19200, 38400, 57600, 115200, 230400 }
52
53 /*
54  * Command line configuration.
55  */
56 #include <config_cmd_default.h>
57
58 #define CONFIG_CMD_BSP
59 #define CONFIG_CMD_CACHE
60 #define CONFIG_CMD_MII
61 #define CONFIG_CMD_REGINFO
62 #define CONFIG_CMD_DHCP
63 #define CONFIG_BOOTP_SEND_HOSTNAME
64 #define CONFIG_BOOTP_SERVERIP
65 #define CONFIG_BOOTP_MAY_FAIL
66 #define CONFIG_BOOTP_BOOTPATH
67 #define CONFIG_BOOTP_GATEWAY
68 #define CONFIG_BOOTP_SERVERIP
69 #define CONFIG_NET_RETRY_COUNT 3
70 #define CONFIG_CMD_LINK_LOCAL
71 #define CONFIG_NETCONSOLE
72 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
73 #define CONFIG_CMD_PING
74 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
75 #define CONFIG_MTD_PARTITIONS   /* needed for UBI */
76 #define CONFIG_FLASH_CFI_MTD
77 #define MTDIDS_DEFAULT          "nor0=fc000000.flash"
78 #define MTDPARTS_DEFAULT        "mtdparts=fc000000.flash:512k(u-boot)," \
79                                                 "256k(env),"    \
80                                                 "128k(hwinfo)," \
81                                                 "1M(nvramsim)," \
82                                                 "128k(dtb),"    \
83                                                 "5M(kernel),"   \
84                                                 "128k(sysinfo),"        \
85                                                 "7552k(root),"  \
86                                                 "4M(app),"      \
87                                                 "13568k(data)"
88 #define CONFIG_LZO                      /* needed for UBI */
89 #define CONFIG_RBTREE                   /* needed for UBI */
90 #define CONFIG_CMD_MTDPARTS
91 #define CONFIG_CMD_UBI
92 #define CONFIG_CMD_UBIFS
93 #define CONFIG_FIT
94
95 /*
96  * IPB Bus clocking configuration.
97  */
98 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
99 /* define for 66MHz speed - undef for 33MHz PCI clock speed */
100 #ifdef CONFIG_A4M2K
101 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
102 #else
103 #undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
104 #endif
105
106 /* pass open firmware flat tree */
107 #define CONFIG_OF_LIBFDT
108 #define CONFIG_OF_BOARD_SETUP
109
110 /* maximum size of the flat tree (8K) */
111 #define OF_FLAT_TREE_MAX_SIZE   8192
112
113 #define OF_CPU                  "PowerPC,5200@0"
114 #define OF_SOC                  "soc5200@f0000000"
115 #define OF_TBCLK                (bd->bi_busfreq / 4)
116 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
117
118 /*
119  * NOR flash configuration
120  */
121 #define CONFIG_SYS_FLASH_BASE           0xfc000000
122 #define CONFIG_SYS_FLASH_SIZE           0x02000000
123 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + 0x80000)
124
125 #define CONFIG_SYS_MAX_FLASH_BANKS      1
126 #define CONFIG_SYS_MAX_FLASH_SECT       256
127 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000
128 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
129 #define CONFIG_SYS_FLASH_LOCK_TOUT      5
130 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    10000
131 #define CONFIG_SYS_FLASH_PROTECTION
132 #define CONFIG_FLASH_CFI_DRIVER
133 #define CONFIG_SYS_FLASH_CFI
134 #define CONFIG_SYS_FLASH_EMPTY_INFO
135 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
136 #define CONFIG_FLASH_VERIFY
137
138 /*
139  * Environment settings
140  */
141 #define CONFIG_ENV_IS_IN_FLASH
142 #define CONFIG_ENV_SIZE         0x10000
143 #define CONFIG_ENV_SECT_SIZE    0x20000
144 #define CONFIG_ENV_OVERWRITE
145 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
146 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
147
148 /*
149  * Memory map
150  */
151 #define CONFIG_SYS_MBAR                 0xf0000000
152 #define CONFIG_SYS_SDRAM_BASE           0x00000000
153 #define CONFIG_SYS_DEFAULT_MBAR         0x80000000
154
155 /* Use SRAM until RAM will be available */
156 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
157 #define CONFIG_SYS_INIT_RAM_END         MPC5XXX_SRAM_SIZE
158
159 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - \
160                                          GENERATED_GBL_DATA_SIZE)
161 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
162
163 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
164
165 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
166 #define CONFIG_SYS_MALLOC_LEN           (4 << 20)
167 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
168
169 /*
170  * Ethernet configuration
171  */
172 #define CONFIG_MPC5xxx_FEC
173 #define CONFIG_MPC5xxx_FEC_MII100
174 #ifdef CONFIG_A4M2K
175 #define CONFIG_PHY_ADDR                 0x01
176 #else
177 #define CONFIG_PHY_ADDR                 0x00
178 #endif
179
180 /*
181  * GPIO configuration
182  */
183
184 /*
185  * GPIO-config depends on failsave-level
186  * failsave 0 means just MPX-config, no digiboard, no fpga
187  *          1 means digiboard ok
188  *          2 means fpga ok
189  */
190
191 #ifdef CONFIG_A4M2K
192 #define CONFIG_SYS_GPS_PORT_CONFIG      0x1005C805
193 #else
194 /* for failsave-level 0 - full failsave */
195 #define CONFIG_SYS_GPS_PORT_CONFIG      0x1005C005
196 /* for failsave-level 1 - only digiboard ok */
197 #define CONFIG_SYS_GPS_PORT_CONFIG_1    0x1005C065
198 /* for failsave-level 2 - all ok */
199 #define CONFIG_SYS_GPS_PORT_CONFIG_2    0x1005C065
200 #endif
201
202 #define CONFIG_WDOG_GPIO_PIN            GPIO_WKUP_7
203 #if defined(CONFIG_A4M2K) && !defined(CONFIG_SPL_BUILD)
204 #define CONFIG_HW_WATCHDOG              /* Use external HW-Watchdog     */
205 #endif
206
207 /*
208  * Configuration matrix
209  *                        MSB                            LSB
210  * failsave 0  0x1005C005  00010000000001011100000000000101  ( full failsave )
211  * failsave 1  0x1005C065  00010000000001011100000001100101  ( digib.-ver ok )
212  * failsave 2  0x1005C065  00010000000001011100000001100101  ( all ok )
213  *                         || ||| ||  |   ||| |   |   |   |
214  *                         || ||| ||  |   ||| |   |   |   |  bit rev name
215  *                         ++-+++-++--+---+++-+---+---+---+-  0   31 CS1
216  *                          +-+++-++--+---+++-+---+---+---+-  1   30 LPTZ
217  *                            ||| ||  |   ||| |   |   |   |   2   29 ALTs
218  *                            +++-++--+---+++-+---+---+---+-  3   28 ALTs
219  *                             ++-++--+---+++-+---+---+---+-  4   27 CS7
220  *                              +-++--+---+++-+---+---+---+-  5   26 CS6
221  *                                ||  |   ||| |   |   |   |   6   25 ATA
222  *                                ++--+---+++-+---+---+---+-  7   24 ATA
223  *                                 +--+---+++-+---+---+---+-  8   23 IR_USB_CLK
224  *                                    |   ||| |   |   |   |   9   22 IRDA
225  *                                    |   ||| |   |   |   |  10   21 IRDA
226  *                                    +---+++-+---+---+---+- 11   20 IRDA
227  *                                        ||| |   |   |   |  12   19 Ether
228  *                                        ||| |   |   |   |  13   18 Ether
229  *                                        ||| |   |   |   |  14   17 Ether
230  *                                        +++-+---+---+---+- 15   16 Ether
231  *                                         ++-+---+---+---+- 16   15 PCI_DIS
232  *                                          +-+---+---+---+- 17   14 USB_SE
233  *                                            |   |   |   |  18   13 USB
234  *                                            +---+---+---+- 19   12 USB
235  *                                                |   |   |  20   11 PSC3
236  *                                                |   |   |  21   10 PSC3
237  *                                                |   |   |  22    9 PSC3
238  *                                                +---+---+- 23    8 PSC3
239  *                                                    |   |  24    7 -
240  *                                                    |   |  25    6 PSC2
241  *                                                    |   |  26    5 PSC2
242  *                                                    +---+- 27    4 PSC2
243  *                                                        |  28    3 -
244  *                                                        |  29    2 PSC1
245  *                                                        |  30    1 PSC1
246  *                                                        +- 31    0 PSC1
247  */
248
249
250 /*
251  * Miscellaneous configurable options
252  */
253 #define CONFIG_SYS_LONGHELP
254 #define CONFIG_SYS_PROMPT               "=> "
255
256 #define CONFIG_CMDLINE_EDITING
257 #define CONFIG_SYS_HUSH_PARSER
258 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
259
260 #if defined(CONFIG_CMD_KGDB)
261 #define CONFIG_SYS_CBSIZE               1024
262 #else
263 #define CONFIG_SYS_CBSIZE               256
264 #endif
265 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
266 #define CONFIG_SYS_MAXARGS              16
267 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
268
269 #define CONFIG_SYS_MEMTEST_START        0x00100000
270 #define CONFIG_SYS_MEMTEST_END          0x00f00000
271
272 #define CONFIG_SYS_LOAD_ADDR            0x00100000
273
274 #define CONFIG_SYS_HZ                   1000
275 #define CONFIG_LOOPW
276 #define CONFIG_SYS_CONSOLE_INFO_QUIET   /* don't print console @ startup*/
277
278 /*
279  * Various low-level settings
280  */
281 #define CONFIG_SYS_HID0_INIT            (HID0_ICE | HID0_ICFI)
282 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
283
284 #define CONFIG_SYS_BOOTCS_START         CONFIG_SYS_FLASH_BASE
285 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
286 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
287 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
288
289 #ifdef CONFIG_A4M2K
290 /* external MRAM */
291 #define CONFIG_SYS_CS1_START            0xf1000000
292 #define CONFIG_SYS_CS1_SIZE             (512 << 10)     /* 512KiB MRAM */
293 #endif
294
295 #define CONFIG_SYS_CS2_START            0xe0000000
296 #define CONFIG_SYS_CS2_SIZE             0x00100000
297
298 /* FPGA slave io (512kiB / 1MiB) - see ticket #66 */
299 #define CONFIG_SYS_CS3_START            0xE9000000
300 #ifdef CONFIG_A4M2K
301 #define CONFIG_SYS_CS3_SIZE             0x00100000
302 #else
303 #define CONFIG_SYS_CS3_SIZE             0x00080000
304 #endif
305 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0032B900 */
306 #define CONFIG_SYS_CS3_CFG              0x0032B900
307
308 #ifndef CONFIG_A4M2K
309 /* Diagnosis Interface - see ticket #63 */
310 #define CONFIG_SYS_CS4_START            0xEA000000
311 #define CONFIG_SYS_CS4_SIZE             0x00000001
312 /* 00000000 00000010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0002B900 */
313 #define CONFIG_SYS_CS4_CFG              0x0002B900
314 #endif
315
316 /* FPGA master io (64kiB / 1MiB) - see ticket #66 */
317 #define CONFIG_SYS_CS5_START            0xE8000000
318 #ifdef CONFIG_A4M2K
319 #define CONFIG_SYS_CS5_SIZE             0x00100000
320 #else
321 #define CONFIG_SYS_CS5_SIZE             0x00010000
322 #endif
323 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0032B900 */
324 #define CONFIG_SYS_CS5_CFG              0x0032B900
325
326 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2     /* for pci_clk  = 66 MHz */
327 #define CONFIG_SYS_BOOTCS_CFG           0x0006F900
328 #define CONFIG_SYS_CS1_CFG              0x0008FD00
329 #define CONFIG_SYS_CS2_CFG              0x0006F90C
330 #else   /* for pci_clk = 33 MHz */
331 #define CONFIG_SYS_BOOTCS_CFG           0x0002F900
332 #define CONFIG_SYS_CS1_CFG              0x0001FB00
333 #define CONFIG_SYS_CS2_CFG              0x0002F90C
334 #endif
335
336 #define CONFIG_SYS_CS_BURST             0x00000000
337 /* set DC for FPGA CS5 and CS3 to 0 - see ticket #66 */
338 /* R  7  R  6  R  5  R  4  R  3  R  2  R  1  R  0  */
339 /* 00 11 00 11 00 00 00 11 00 00 00 00 00 00 00 00 */
340 #define CONFIG_SYS_CS_DEADCYCLE         0x33030000
341
342 #define CONFIG_SYS_RESET_ADDRESS        0xff000000
343
344 /*
345  * Environment Configuration
346  */
347
348 #define CONFIG_BOOTDELAY        3       /* -1 disables auto-boot */
349 #undef  CONFIG_BOOTARGS
350 #define CONFIG_ZERO_BOOTDELAY_CHECK
351
352 #define CONFIG_SYS_AUTOLOAD     "n"
353
354 #define CONFIG_PREBOOT  "echo;" \
355         "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \
356         "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \
357         "echo"
358
359 #undef  CONFIG_BOOTARGS
360
361 #define CONFIG_SYS_OS_BASE      0xfc200000
362 #define CONFIG_SYS_FDT_BASE     0xfc1e0000
363
364 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
365         "netdev=eth0\0"                                                 \
366         "verify=no\0"                                                   \
367         "loadaddr=200000\0"                                             \
368         "kernel_addr=" __stringify(CONFIG_SYS_OS_BASE) "\0"             \
369         "kernel_addr_r=1000000\0"                                       \
370         "fdt_addr=" __stringify(CONFIG_SYS_FDT_BASE) "\0"               \
371         "fdt_addr_r=1800000\0"                                          \
372         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
373         "fdtfile=" __stringify(CONFIG_HOSTNAME) "/"                     \
374                 __stringify(CONFIG_HOSTNAME) ".dtb\0"                   \
375         "rootpath=/opt/eldk-5.2.1/powerpc/"                             \
376                 "core-image-minimal-mtdutils-dropbear-generic\0"        \
377         "consoledev=ttyPSC0\0"                                          \
378         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
379                 "nfsroot=${serverip}:${rootpath}\0"                     \
380         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
381         "mtdargs=setenv bootargs root=/dev/mtdblock7 "                  \
382                 "rootfstype=squashfs,jffs2\0"                           \
383         "addhost=setenv bootargs ${bootargs} "                          \
384                 "hostname=${hostname}\0"                                \
385         "addip=setenv bootargs ${bootargs} "                            \
386                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
387                 ":${hostname}:${netdev}:off panic=1\0"                  \
388         "addtty=setenv bootargs ${bootargs} "                           \
389                 "console=${consoledev},${baudrate}\0"                   \
390         "flash_nfs=run nfsargs addip addtty addhost;"                   \
391                 "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
392         "flash_mtd=run mtdargs addip addtty addhost;"                   \
393                 "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
394         "flash_self=run ramargs addip addtty addhost;"                  \
395                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
396         "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
397                 "tftp ${fdt_addr_r} ${fdtfile};"                        \
398                 "run nfsargs addip addtty addhost;"                     \
399                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
400         "load=tftp ${loadaddr} " __stringify(CONFIG_HOSTNAME)           \
401                 "/u-boot-img.bin\0"                                     \
402         "update=protect off fc000000 fc07ffff; "                        \
403                 "era fc000000 fc07ffff;"                                \
404                 "cp.b ${loadaddr} fc000000 ${filesize}\0"               \
405         "upd=run load;run update\0"                                     \
406         ""
407
408 #define CONFIG_BOOTCOMMAND      "run flash_mtd"
409
410 /*
411  * SPL related defines
412  */
413 #define CONFIG_SPL
414 #define CONFIG_SPL_FRAMEWORK
415 #define CONFIG_SPL_BOARD_INIT
416 #define CONFIG_SPL_NOR_SUPPORT
417 #define CONFIG_SPL_TEXT_BASE    0xfc000000
418 #define CONFIG_SPL_START_S_PATH "arch/powerpc/cpu/mpc5xxx"
419 #define CONFIG_SPL_LDSCRIPT     "arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds"
420 #define CONFIG_SPL_LIBCOMMON_SUPPORT    /* image.c */
421 #define CONFIG_SPL_LIBGENERIC_SUPPORT   /* string.c */
422 #define CONFIG_SPL_SERIAL_SUPPORT
423
424 /* Place BSS for SPL near end of SDRAM */
425 #define CONFIG_SPL_BSS_START_ADDR       ((128 - 1) << 20)
426 #define CONFIG_SPL_BSS_MAX_SIZE         (64 << 10)
427
428 #define CONFIG_SPL_OS_BOOT
429 #define CONFIG_SPL_ENV_SUPPORT
430 /* Place patched DT blob (fdt) at this address */
431 #define CONFIG_SYS_SPL_ARGS_ADDR        0x01800000
432
433 /* Settings for real U-Boot to be loaded from NOR flash */
434 #ifndef __ASSEMBLY__
435 extern char __spl_flash_end[];
436 #endif
437 #define CONFIG_SYS_UBOOT_BASE           __spl_flash_end
438 #define CONFIG_SYS_SPL_MAX_LEN          (32 << 10)
439 #define CONFIG_SYS_UBOOT_START          0x1000100
440
441 #endif /* __CONFIG_H */