include/configs/UCP1020.h

   1 /*
   2  * Copyright 2013-2015 Arcturus Networks, Inc.
   3  *           http://www.arcturusnetworks.com/products/ucp1020/
   4  * based on include/configs/p1_p2_rdb_pc.h
   5  * original copyright follows:
   6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 /*
  12  * QorIQ uCP1020-xx boards configuration file
  13  */
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  18 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  19 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  20 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  21 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  22 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  23
  24 #if defined(CONFIG_TARTGET_UCP1020T1)
  25
  26 #define CONFIG_UCP1020_REV_1_3
  27
  28 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  29
  30 #define CONFIG_TSEC1
  31 #define CONFIG_TSEC3
  32 #define CONFIG_HAS_ETH0
  33 #define CONFIG_HAS_ETH1
  34 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  35 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  36 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  37 #define CONFIG_IPADDR           10.80.41.229
  38 #define CONFIG_SERVERIP         10.80.41.227
  39 #define CONFIG_NETMASK          255.255.252.0
  40 #define CONFIG_ETHPRIME         "eTSEC3"
  41
  42 #ifndef CONFIG_SPI_FLASH
  43 #endif
  44 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  45
  46 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  47
  48 #endif
  49
  50 #if defined(CONFIG_TARGET_UCP1020)
  51
  52 #define CONFIG_UCP1020
  53 #define CONFIG_UCP1020_REV_1_3
  54
  55 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  56
  57 #define CONFIG_TSEC1
  58 #define CONFIG_TSEC2
  59 #define CONFIG_TSEC3
  60 #define CONFIG_HAS_ETH0
  61 #define CONFIG_HAS_ETH1
  62 #define CONFIG_HAS_ETH2
  63 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  64 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  65 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  66 #define CONFIG_IPADDR           192.168.1.81
  67 #define CONFIG_IPADDR1          192.168.1.82
  68 #define CONFIG_IPADDR2          192.168.1.83
  69 #define CONFIG_SERVERIP         192.168.1.80
  70 #define CONFIG_GATEWAYIP        102.168.1.1
  71 #define CONFIG_NETMASK          255.255.255.0
  72 #define CONFIG_ETHPRIME         "eTSEC1"
  73
  74 #ifndef CONFIG_SPI_FLASH
  75 #endif
  76 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  77
  78 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  79
  80 #endif
  81
  82 #ifdef CONFIG_SDCARD
  83 #define CONFIG_RAMBOOT_SDCARD
  84 #define CONFIG_SYS_RAMBOOT
  85 #define CONFIG_SYS_EXTRA_ENV_RELOC
  86 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  87 #endif
  88
  89 #ifdef CONFIG_SPIFLASH
  90 #define CONFIG_RAMBOOT_SPIFLASH
  91 #define CONFIG_SYS_RAMBOOT
  92 #define CONFIG_SYS_EXTRA_ENV_RELOC
  93 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
  94 #endif
  95
  96 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
  97
  98 #ifndef CONFIG_RESET_VECTOR_ADDRESS
  99 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
 100 #endif
 101
 102 #ifndef CONFIG_SYS_MONITOR_BASE
 103 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 104 #endif
 105
 106 #define CONFIG_MP
 107
 108 #define CONFIG_ENV_OVERWRITE
 109
 110 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 111 #define CONFIG_LBA48
 112
 113 #define CONFIG_SYS_CLK_FREQ     66666666
 114 #define CONFIG_DDR_CLK_FREQ     66666666
 115
 116 #define CONFIG_HWCONFIG
 117
 118 /*
 119  * These can be toggled for performance analysis, otherwise use default.
 120  */
 121 #define CONFIG_L2_CACHE
 122 #define CONFIG_BTB
 123
 124 #define CONFIG_ENABLE_36BIT_PHYS
 125
 126 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 127 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 128
 129 #define CONFIG_SYS_CCSRBAR              0xffe00000
 130 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 131
 132 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 133        SPL code*/
 134 #ifdef CONFIG_SPL_BUILD
 135 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 136 #endif
 137
 138 /* DDR Setup */
 139 #define CONFIG_DDR_ECC_ENABLE
 140 #ifndef CONFIG_DDR_ECC_ENABLE
 141 #define CONFIG_SYS_DDR_RAW_TIMING
 142 #define CONFIG_DDR_SPD
 143 #endif
 144 #define CONFIG_SYS_SPD_BUS_NUM 1
 145 #undef CONFIG_FSL_DDR_INTERACTIVE
 146
 147 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 148 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 149 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 150 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 151 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 152
 153 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 154
 155 /* Default settings for DDR3 */
 156 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 157 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 158 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 159 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 160 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 161 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 162
 163 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 164 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 165 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 166 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 167
 168 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 169 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 170 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 171 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 172 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 173 #ifdef CONFIG_DDR_ECC_ENABLE
 174 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 175 #else
 176 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 177 #endif
 178 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 179 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 180 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 181
 182 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 183 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 184 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 185 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 186 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 187 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 188 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 189 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 190
 191 #undef CONFIG_CLOCKS_IN_MHZ
 192
 193 /*
 194  * Memory map
 195  *
 196  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 197  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 198  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 199  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 200  *   (early boot only)
 201  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 202  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 203  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 204  */
 205
 206 /*
 207  * Local Bus Definitions
 208  */
 209 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 210 #define CONFIG_SYS_FLASH_BASE           0xec000000
 211
 212 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 213
 214 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 215         | BR_PS_16 | BR_V)
 216
 217 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 218
 219 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 220 #define CONFIG_SYS_FLASH_QUIET_TEST
 221 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 222
 223 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 224
 225 #undef CONFIG_SYS_FLASH_CHECKSUM
 226 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 227 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 228
 229 #define CONFIG_FLASH_CFI_DRIVER
 230 #define CONFIG_SYS_FLASH_CFI
 231 #define CONFIG_SYS_FLASH_EMPTY_INFO
 232 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 233
 234 #define CONFIG_SYS_INIT_RAM_LOCK
 235 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 236 /* Initial L1 address */
 237 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 238 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 239 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 240 /* Size of used area in RAM */
 241 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 242
 243 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 244                                         GENERATED_GBL_DATA_SIZE)
 245 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 246
 247 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 248 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 249
 250 #define CONFIG_SYS_PMC_BASE     0xff980000
 251 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 252 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 253                                         BR_PS_8 | BR_V)
 254 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 255                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 256                                  OR_GPCM_EAD)
 257
 258 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 259 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 260 #ifdef CONFIG_NAND_FSL_ELBC
 261 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 262 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 263 #endif
 264
 265 /* Serial Port - controlled on board with jumper J8
 266  * open - index 2
 267  * shorted - index 1
 268  */
 269 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 270 #define CONFIG_SYS_NS16550_SERIAL
 271 #define CONFIG_SYS_NS16550_REG_SIZE     1
 272 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 273 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 274 #define CONFIG_NS16550_MIN_FUNCTIONS
 275 #endif
 276
 277 #define CONFIG_SYS_BAUDRATE_TABLE       \
 278         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 279
 280 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 281 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 282
 283 /* I2C */
 284 #define CONFIG_SYS_I2C
 285 #define CONFIG_SYS_I2C_FSL
 286 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 287 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 288 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 289 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 290 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 291 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 292 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 293 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 294
 295 #define CONFIG_RTC_DS1337
 296 #define CONFIG_RTC_DS1337_NOOSC
 297 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 298 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 299 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 300 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 301
 302 /*
 303  * eSPI - Enhanced SPI
 304  */
 305 #define CONFIG_HARD_SPI
 306
 307 #define CONFIG_SF_DEFAULT_SPEED         10000000
 308 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 309
 310 #if defined(CONFIG_PCI)
 311 /*
 312  * General PCI
 313  * Memory space is mapped 1-1, but I/O space must start from 0.
 314  */
 315
 316 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 317 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 318 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 319 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 320 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 321 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 322 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 323 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 324 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 325 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 326
 327 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 328 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 329 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 330 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 331 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 332 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 333 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 334 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 335 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 336 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 337
 338 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 339 #endif /* CONFIG_PCI */
 340
 341 /*
 342  * Environment
 343  */
 344 #ifdef CONFIG_ENV_FIT_UCBOOT
 345
 346 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 347 #define CONFIG_ENV_SIZE         0x20000
 348 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 349
 350 #else
 351
 352 #define CONFIG_ENV_SPI_BUS      0
 353 #define CONFIG_ENV_SPI_CS       0
 354 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 355 #define CONFIG_ENV_SPI_MODE     0
 356
 357 #ifdef CONFIG_RAMBOOT_SPIFLASH
 358
 359 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 360 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 361 #define CONFIG_ENV_SECT_SIZE    0x1000
 362
 363 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 364 /* Address and size of Redundant Environment Sector     */
 365 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 366 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 367 #endif
 368
 369 #elif defined(CONFIG_RAMBOOT_SDCARD)
 370 #define CONFIG_FSL_FIXED_MMC_LOCATION
 371 #define CONFIG_ENV_SIZE         0x2000
 372 #define CONFIG_SYS_MMC_ENV_DEV  0
 373
 374 #elif defined(CONFIG_SYS_RAMBOOT)
 375 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 376 #define CONFIG_ENV_SIZE         0x2000
 377
 378 #else
 379 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 380 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 381 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 382 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 383 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 384 /* Address and size of Redundant Environment Sector     */
 385 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 386 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 387 #endif
 388
 389 #endif
 390
 391 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 392
 393 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 394 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 395
 396 /*
 397  * USB
 398  */
 399 #define CONFIG_HAS_FSL_DR_USB
 400
 401 #if defined(CONFIG_HAS_FSL_DR_USB)
 402 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 403
 404 #ifdef CONFIG_USB_EHCI_HCD
 405 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 406 #define CONFIG_USB_EHCI_FSL
 407 #endif
 408 #endif
 409
 410 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 411
 412 #ifdef CONFIG_MMC
 413 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 414 #define CONFIG_MMC_SPI
 415 #endif
 416
 417 /* Misc Extra Settings */
 418 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 419
 420 /*
 421  * Miscellaneous configurable options
 422  */
 423 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 424 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 425
 426 /*
 427  * For booting Linux, the board info and command line data
 428  * have to be in the first 64 MB of memory, since this is
 429  * the maximum mapped by the Linux kernel during initialization.
 430  */
 431 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 432 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 433
 434 #if defined(CONFIG_CMD_KGDB)
 435 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 436 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 437 #endif
 438
 439 /*
 440  * Environment Configuration
 441  */
 442
 443 #if defined(CONFIG_TSEC_ENET)
 444
 445 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
 446 #else
 447 #error "UCP1020 module revision is not defined !!!"
 448 #endif
 449
 450 #define CONFIG_BOOTP_SERVERIP
 451
 452 #define CONFIG_MII              /* MII PHY management */
 453 #define CONFIG_TSEC1_NAME       "eTSEC1"
 454 #define CONFIG_TSEC2_NAME       "eTSEC2"
 455 #define CONFIG_TSEC3_NAME       "eTSEC3"
 456
 457 #define TSEC1_PHY_ADDR  4
 458 #define TSEC2_PHY_ADDR  0
 459 #define TSEC2_PHY_ADDR_SGMII    0x00
 460 #define TSEC3_PHY_ADDR  6
 461
 462 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 463 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 464 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 465
 466 #define TSEC1_PHYIDX    0
 467 #define TSEC2_PHYIDX    0
 468 #define TSEC3_PHYIDX    0
 469
 470 #endif
 471
 472 #define CONFIG_HOSTNAME         UCP1020
 473 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 474 #define CONFIG_BOOTFILE         "uImage"
 475 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 476
 477 /* default location for tftp and bootm */
 478 #define CONFIG_LOADADDR         1000000
 479
 480 #if defined(CONFIG_DONGLE)
 481
 482 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 483 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 484 "bootfile=uImage\0"                                                     \
 485 "consoledev=ttyS0\0"                                                    \
 486 "cramfsfile=image.cramfs\0"                                             \
 487 "dtbaddr=0x00c00000\0"                                                  \
 488 "dtbfile=image.dtb\0"                                                   \
 489 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 490 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 491 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 492 "fileaddr=0x01000000\0"                                                 \
 493 "filesize=0x00080000\0"                                                 \
 494 "flashmbr=sf probe 0; "                                                 \
 495         "tftp $loadaddr $mbr; "                                         \
 496         "sf erase $mbr_offset +$filesize; "                             \
 497         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 498 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 499         "protect off $nor_recoveryaddr +$filesize; "                    \
 500         "erase $nor_recoveryaddr +$filesize; "                          \
 501         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 502         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 503 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 504         "protect off $nor_ubootaddr +$filesize; "                       \
 505         "erase $nor_ubootaddr +$filesize; "                             \
 506         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 507         "protect on $nor_ubootaddr +$filesize\0 "                       \
 508 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 509         "protect off $nor_workingaddr +$filesize; "                     \
 510         "erase $nor_workingaddr +$filesize; "                           \
 511         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 512         "protect on $nor_workingaddr +$filesize\0 "                     \
 513 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 514 "kerneladdr=0x01100000\0"                                               \
 515 "kernelfile=uImage\0"                                                   \
 516 "loadaddr=0x01000000\0"                                                 \
 517 "mbr=uCP1020d.mbr\0"                                                    \
 518 "mbr_offset=0x00000000\0"                                               \
 519 "mmbr=uCP1020Quiet.mbr\0"                                               \
 520 "mmcpart=0:2\0"                                                         \
 521 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 522         "mmc erase 1 1; "                                               \
 523         "mmc write $loadaddr 1 1\0"                                     \
 524 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 525         "mmc erase 0x40 0x400; "                                        \
 526         "mmc write $loadaddr 0x40 0x400\0"                              \
 527 "netdev=eth0\0"                                                         \
 528 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 529 "nor_ubootaddr=0xEFF80000\0"                                            \
 530 "nor_workingaddr=0xECFA0000\0"                                          \
 531 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 532         " console=$consoledev,$baudrate $othbootargs; "                 \
 533         "run norloadrecovery; "                                         \
 534         "bootm $kerneladdr - $dtbaddr\0"                                \
 535 "norbootworking=setenv bootargs $workingbootargs"                       \
 536         " console=$consoledev,$baudrate $othbootargs; "                 \
 537         "run norloadworking; "                                          \
 538         "bootm $kerneladdr - $dtbaddr\0"                                \
 539 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 540         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 541         "cramfsload $dtbaddr $dtbfile; "                                \
 542         "cramfsload $kerneladdr $kernelfile\0"                          \
 543 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 544         "setenv cramfsaddr $nor_workingaddr; "                          \
 545         "cramfsload $dtbaddr $dtbfile; "                                \
 546         "cramfsload $kerneladdr $kernelfile\0"                          \
 547 "prog_spi_mbr=run spi__mbr\0"                                           \
 548 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 549 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 550         "run spi__cramfs\0"                                             \
 551 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 552         " console=$consoledev,$baudrate $othbootargs; "                 \
 553         "tftp $rootfsaddr $rootfsfile; "                                \
 554         "tftp $loadaddr $kernelfile; "                                  \
 555         "tftp $dtbaddr $dtbfile; "                                      \
 556         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 557 "ramdisk_size=120000\0"                                                 \
 558 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 559 "recoveryaddr=0x02F00000\0"                                             \
 560 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 561 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 562         "mw.l 0xffe0f008 0x00400000\0"                                  \
 563 "rootfsaddr=0x02F00000\0"                                               \
 564 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 565 "rootpath=/opt/nfsroot\0"                                               \
 566 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 567         "protect off 0xeC000000 +$filesize; "                           \
 568         "erase 0xEC000000 +$filesize; "                                 \
 569         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 570         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 571         "protect on 0xeC000000 +$filesize\0"                            \
 572 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 573         "protect off 0xeFF80000 +$filesize; "                           \
 574         "erase 0xEFF80000 +$filesize; "                                 \
 575         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 576         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 577         "protect on 0xeFF80000 +$filesize\0"                            \
 578 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 579         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 580         "sf write $loadaddr 0x8000 $filesize\0"                         \
 581 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 582         "protect off 0xec0a0000 +$filesize; "                           \
 583         "erase 0xeC0A0000 +$filesize; "                                 \
 584         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 585         "protect on 0xec0a0000 +$filesize\0"                            \
 586 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 587         "sf probe 1; sf erase 0 +$filesize; "                           \
 588         "sf write $loadaddr 0 $filesize\0"                              \
 589 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 590         "sf probe 0; sf erase 0 +$filesize; "                           \
 591         "sf write $loadaddr 0 $filesize\0"                              \
 592 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 593         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 594         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 595         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 596         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 597         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 598 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 599 "ubootaddr=0x01000000\0"                                                \
 600 "ubootfile=u-boot.bin\0"                                                \
 601 "ubootd=u-boot4dongle.bin\0"                                            \
 602 "upgrade=run flashworking\0"                                            \
 603 "usb_phy_type=ulpi\0 "                                                  \
 604 "workingaddr=0x02F00000\0"                                              \
 605 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 606
 607 #else
 608
 609 #if defined(CONFIG_UCP1020T1)
 610
 611 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 612 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 613 "bootfile=uImage\0"                                                     \
 614 "consoledev=ttyS0\0"                                                    \
 615 "cramfsfile=image.cramfs\0"                                             \
 616 "dtbaddr=0x00c00000\0"                                                  \
 617 "dtbfile=image.dtb\0"                                                   \
 618 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 619 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 620 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 621 "fileaddr=0x01000000\0"                                                 \
 622 "filesize=0x00080000\0"                                                 \
 623 "flashmbr=sf probe 0; "                                                 \
 624         "tftp $loadaddr $mbr; "                                         \
 625         "sf erase $mbr_offset +$filesize; "                             \
 626         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 627 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 628         "protect off $nor_recoveryaddr +$filesize; "                    \
 629         "erase $nor_recoveryaddr +$filesize; "                          \
 630         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 631         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 632 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 633         "protect off $nor_ubootaddr +$filesize; "                       \
 634         "erase $nor_ubootaddr +$filesize; "                             \
 635         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 636         "protect on $nor_ubootaddr +$filesize\0 "                       \
 637 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 638         "protect off $nor_workingaddr +$filesize; "                     \
 639         "erase $nor_workingaddr +$filesize; "                           \
 640         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 641         "protect on $nor_workingaddr +$filesize\0 "                     \
 642 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 643 "kerneladdr=0x01100000\0"                                               \
 644 "kernelfile=uImage\0"                                                   \
 645 "loadaddr=0x01000000\0"                                                 \
 646 "mbr=uCP1020.mbr\0"                                                     \
 647 "mbr_offset=0x00000000\0"                                               \
 648 "netdev=eth0\0"                                                         \
 649 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 650 "nor_ubootaddr=0xEFF80000\0"                                            \
 651 "nor_workingaddr=0xECFA0000\0"                                          \
 652 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 653         " console=$consoledev,$baudrate $othbootargs; "                 \
 654         "run norloadrecovery; "                                         \
 655         "bootm $kerneladdr - $dtbaddr\0"                                \
 656 "norbootworking=setenv bootargs $workingbootargs"                       \
 657         " console=$consoledev,$baudrate $othbootargs; "                 \
 658         "run norloadworking; "                                          \
 659         "bootm $kerneladdr - $dtbaddr\0"                                \
 660 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 661         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 662         "cramfsload $dtbaddr $dtbfile; "                                \
 663         "cramfsload $kerneladdr $kernelfile\0"                          \
 664 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 665         "setenv cramfsaddr $nor_workingaddr; "                          \
 666         "cramfsload $dtbaddr $dtbfile; "                                \
 667         "cramfsload $kerneladdr $kernelfile\0"                          \
 668 "othbootargs=quiet\0"                                                   \
 669 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 670         " console=$consoledev,$baudrate $othbootargs; "                 \
 671         "tftp $rootfsaddr $rootfsfile; "                                \
 672         "tftp $loadaddr $kernelfile; "                                  \
 673         "tftp $dtbaddr $dtbfile; "                                      \
 674         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 675 "ramdisk_size=120000\0"                                                 \
 676 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 677 "recoveryaddr=0x02F00000\0"                                             \
 678 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 679 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 680         "mw.l 0xffe0f008 0x00400000\0"                                  \
 681 "rootfsaddr=0x02F00000\0"                                               \
 682 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 683 "rootpath=/opt/nfsroot\0"                                               \
 684 "silent=1\0"                                                            \
 685 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 686         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 687         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 688         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 689         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 690         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 691 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 692 "ubootaddr=0x01000000\0"                                                \
 693 "ubootfile=u-boot.bin\0"                                                \
 694 "upgrade=run flashworking\0"                                            \
 695 "workingaddr=0x02F00000\0"                                              \
 696 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 697
 698 #else /* For Arcturus Modules */
 699
 700 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 701 "bootcmd=run norkernel\0"                                               \
 702 "bootfile=uImage\0"                                                     \
 703 "consoledev=ttyS0\0"                                                    \
 704 "dtbaddr=0x00c00000\0"                                                  \
 705 "dtbfile=image.dtb\0"                                                   \
 706 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 707 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 708 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 709 "fileaddr=0x01000000\0"                                                 \
 710 "filesize=0x00080000\0"                                                 \
 711 "flashmbr=sf probe 0; "                                                 \
 712         "tftp $loadaddr $mbr; "                                         \
 713         "sf erase $mbr_offset +$filesize; "                             \
 714         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 715 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 716         "protect off $nor_ubootaddr0 +$filesize; "                      \
 717         "erase $nor_ubootaddr0 +$filesize; "                            \
 718         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 719         "protect on $nor_ubootaddr0 +$filesize; "                       \
 720         "protect off $nor_ubootaddr1 +$filesize; "                      \
 721         "erase $nor_ubootaddr1 +$filesize; "                            \
 722         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 723         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 724 "format0=protect off $part0base +$part0size; "                          \
 725         "erase $part0base +$part0size\0"                                \
 726 "format1=protect off $part1base +$part1size; "                          \
 727         "erase $part1base +$part1size\0"                                \
 728 "format2=protect off $part2base +$part2size; "                          \
 729         "erase $part2base +$part2size\0"                                \
 730 "format3=protect off $part3base +$part3size; "                          \
 731         "erase $part3base +$part3size\0"                                \
 732 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 733 "kerneladdr=0x01100000\0"                                               \
 734 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 735 "kernelfile=uImage\0"                                                   \
 736 "loadaddr=0x01000000\0"                                                 \
 737 "mbr=uCP1020.mbr\0"                                                     \
 738 "mbr_offset=0x00000000\0"                                               \
 739 "netdev=eth0\0"                                                         \
 740 "nor_ubootaddr0=0xEC000000\0"                                           \
 741 "nor_ubootaddr1=0xEFF80000\0"                                           \
 742 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 743         "run norkernelload; "                                           \
 744         "bootm $kerneladdr - $dtbaddr\0"                                \
 745 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 746         "setenv cramfsaddr $part0base; "                                \
 747         "cramfsload $dtbaddr $dtbfile; "                                \
 748         "cramfsload $kerneladdr $kernelfile\0"                          \
 749 "part0base=0xEC100000\0"                                                \
 750 "part0size=0x00700000\0"                                                \
 751 "part1base=0xEC800000\0"                                                \
 752 "part1size=0x02000000\0"                                                \
 753 "part2base=0xEE800000\0"                                                \
 754 "part2size=0x00800000\0"                                                \
 755 "part3base=0xEF000000\0"                                                \
 756 "part3size=0x00F80000\0"                                                \
 757 "partENVbase=0xEC080000\0"                                              \
 758 "partENVsize=0x00080000\0"                                              \
 759 "program0=tftp part0-000000.bin; "                                      \
 760         "protect off $part0base +$filesize; "                           \
 761         "erase $part0base +$filesize; "                                 \
 762         "cp.b $loadaddr $part0base $filesize; "                         \
 763         "echo Verifying...; "                                           \
 764         "cmp.b $loadaddr $part0base $filesize\0"                        \
 765 "program1=tftp part1-000000.bin; "                                      \
 766         "protect off $part1base +$filesize; "                           \
 767         "erase $part1base +$filesize; "                                 \
 768         "cp.b $loadaddr $part1base $filesize; "                         \
 769         "echo Verifying...; "                                           \
 770         "cmp.b $loadaddr $part1base $filesize\0"                        \
 771 "program2=tftp part2-000000.bin; "                                      \
 772         "protect off $part2base +$filesize; "                           \
 773         "erase $part2base +$filesize; "                                 \
 774         "cp.b $loadaddr $part2base $filesize; "                         \
 775         "echo Verifying...; "                                           \
 776         "cmp.b $loadaddr $part2base $filesize\0"                        \
 777 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 778         "  console=$consoledev,$baudrate $othbootargs; "                \
 779         "tftp $rootfsaddr $rootfsfile; "                                \
 780         "tftp $loadaddr $kernelfile; "                                  \
 781         "tftp $dtbaddr $dtbfile; "                                      \
 782         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 783 "ramdisk_size=120000\0"                                                 \
 784 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 785 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 786         "mw.l 0xffe0f008 0x00400000\0"                                  \
 787 "rootfsaddr=0x02F00000\0"                                               \
 788 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 789 "rootpath=/opt/nfsroot\0"                                               \
 790 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 791         "sf probe 0; sf erase 0 +$filesize; "                           \
 792         "sf write $loadaddr 0 $filesize\0"                              \
 793 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 794         "protect off 0xeC000000 +$filesize; "                           \
 795         "erase 0xEC000000 +$filesize; "                                 \
 796         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 797         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 798         "protect on 0xeC000000 +$filesize\0"                            \
 799 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 800         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 801         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 802         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 803         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 804         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 805 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 806 "ubootfile=u-boot.bin\0"                                                \
 807 "upgrade=run flashuboot\0"                                              \
 808 "usb_phy_type=ulpi\0 "                                                  \
 809 "boot_nfs= "                                                            \
 810         "setenv bootargs root=/dev/nfs rw "                             \
 811         "nfsroot=$serverip:$rootpath "                                  \
 812         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 813         "console=$consoledev,$baudrate $othbootargs;"                   \
 814         "tftp $loadaddr $bootfile;"                                     \
 815         "tftp $fdtaddr $fdtfile;"                                       \
 816         "bootm $loadaddr - $fdtaddr\0"                                  \
 817 "boot_hd = "                                                            \
 818         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 819         "console=$consoledev,$baudrate $othbootargs;"                   \
 820         "usb start;"                                                    \
 821         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 822         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 823         "bootm $loadaddr - $fdtaddr\0"                                  \
 824 "boot_usb_fat = "                                                       \
 825         "setenv bootargs root=/dev/ram rw "                             \
 826         "console=$consoledev,$baudrate $othbootargs "                   \
 827         "ramdisk_size=$ramdisk_size;"                                   \
 828         "usb start;"                                                    \
 829         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 830         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 831         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 832         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 833 "boot_usb_ext2 = "                                                      \
 834         "setenv bootargs root=/dev/ram rw "                             \
 835         "console=$consoledev,$baudrate $othbootargs "                   \
 836         "ramdisk_size=$ramdisk_size;"                                   \
 837         "usb start;"                                                    \
 838         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 839         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 840         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 841         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 842 "boot_nor = "                                                           \
 843         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 844         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 845         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 846 "boot_ram = "                                                           \
 847         "setenv bootargs root=/dev/ram rw "                             \
 848         "console=$consoledev,$baudrate $othbootargs "                   \
 849         "ramdisk_size=$ramdisk_size;"                                   \
 850         "tftp $ramdiskaddr $ramdiskfile;"                               \
 851         "tftp $loadaddr $bootfile;"                                     \
 852         "tftp $fdtaddr $fdtfile;"                                       \
 853         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
 854
 855 #endif
 856 #endif
 857
 858 #endif /* __CONFIG_H */