2 * (C) Copyright 2003-2014
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
19 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
20 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 * 0xFC000000 boot low (standard configuration with room for
26 * max 64 MByte Flash ROM)
27 * 0xFFF00000 boot high (for a backup copy of U-Boot)
28 * 0x00100000 boot from RAM (for testing only)
30 #ifndef CONFIG_SYS_TEXT_BASE
31 #define CONFIG_SYS_TEXT_BASE 0xFC000000
34 /* On a Cameron or on a FO300 board or ... */
35 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
36 && !defined(CONFIG_FO300)
37 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
40 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
42 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
45 * Serial console configuration
47 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
48 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
49 #define CONFIG_BOOTCOUNT_LIMIT 1
52 #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
53 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
55 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
56 /* switch is closed */
59 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
61 #endif /* CONFIG_FO300 */
63 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
64 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
65 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
66 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
67 #define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
68 #define CONFIG_BOARD_EARLY_INIT_R
69 #endif /* CONFIG_STK52XX */
73 * 0x40000000 - 0x4fffffff - PCI Memory
74 * 0x50000000 - 0x50ffffff - PCI IO Space
76 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
77 /* #define CONFIG_PCI_SCAN_SHOW 1 */
79 #define CONFIG_PCI_MEM_BUS 0x40000000
80 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
81 #define CONFIG_PCI_MEM_SIZE 0x10000000
83 #define CONFIG_PCI_IO_BUS 0x50000000
84 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
85 #define CONFIG_PCI_IO_SIZE 0x01000000
87 #define CONFIG_EEPRO100 1
88 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
89 #define CONFIG_NS8382X 1
90 #endif /* CONFIG_STK52XX */
95 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
96 #define CONFIG_VIDEO_SM501
97 #define CONFIG_VIDEO_SM501_32BPP
98 #define CONFIG_VIDEO_LOGO
102 #define CONFIG_VIDEO_BMP_LOGO
105 #define CONFIG_SPLASH_SCREEN
106 #endif /* #ifndef CONFIG_TQM5200S */
111 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
112 defined(CONFIG_STK52XX)
113 #define CONFIG_USB_OHCI_NEW
114 #define CONFIG_SYS_OHCI_BE_CONTROLLER
116 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
117 #define CONFIG_SYS_USB_OHCI_CPU_INIT
118 #define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
119 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
120 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
124 #ifndef CONFIG_CAM5200
126 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
127 CONFIG_SYS_POST_CPU | \
132 /* preserve space for the post_word at end of on-chip SRAM */
133 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
139 #define CONFIG_BOOTP_BOOTFILESIZE
140 #define CONFIG_BOOTP_BOOTPATH
141 #define CONFIG_BOOTP_GATEWAY
142 #define CONFIG_BOOTP_HOSTNAME
145 * Command line configuration.
147 #define CONFIG_CMD_DATE
148 #define CONFIG_CMD_EEPROM
149 #define CONFIG_CMD_JFFS2
150 #define CONFIG_CMD_REGINFO
153 #define CONFIG_CMD_PCI
154 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
157 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
158 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
159 #define CONFIG_CMD_IDE
162 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
163 defined(CONFIG_STK52XX)
164 #define CONFIG_CFG_USB
165 #define CONFIG_CFG_FAT
169 #define CONFIG_CMD_DIAG
172 #define CONFIG_TIMESTAMP /* display image timestamps */
174 #if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
175 # define CONFIG_SYS_LOWBOOT 1 /* Boot low */
182 #define CONFIG_PREBOOT "echo;" \
183 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
186 #undef CONFIG_BOOTARGS
188 #if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
190 "update=protect off FFF00000 +${filesize};" \
191 "erase FFF00000 +${filesize};" \
192 "cp.b 200000 FFF00000 ${filesize};" \
193 "protect on FFF00000 +${filesize}\0"
194 #else /* default lowboot configuration */
196 "update=protect off FC000000 +${filesize};" \
197 "erase FC000000 +${filesize};" \
198 "cp.b 200000 FC000000 ${filesize};" \
199 "protect on FC000000 +${filesize}\0"
202 #if defined(CONFIG_TQM5200)
203 #define CUSTOM_ENV_SETTINGS \
204 "hostname=tqm5200\0" \
205 "bootfile=/tftpboot/tqm5200/uImage\0" \
206 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
207 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
208 #elif defined(CONFIG_CAM5200)
209 #define CUSTOM_ENV_SETTINGS \
210 "bootfile=cam5200/uImage\0" \
211 "u-boot=cam5200/u-boot.bin\0" \
212 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
215 #if defined(CONFIG_TQM5200_B)
216 #define ENV_FLASH_LAYOUT \
217 "fdt_addr=FC100000\0" \
218 "kernel_addr=FC140000\0" \
219 "ramdisk_addr=FC600000\0"
220 #elif defined(CONFIG_CHARON)
221 #define ENV_FLASH_LAYOUT \
222 "fdt_addr=FDFC0000\0" \
223 "kernel_addr=FC0A0000\0" \
224 "ramdisk_addr=FC200000\0"
225 #else /* !CONFIG_TQM5200_B */
226 #define ENV_FLASH_LAYOUT \
227 "fdt_addr=FC0A0000\0" \
228 "kernel_addr=FC0C0000\0" \
229 "ramdisk_addr=FC300000\0"
232 #define CONFIG_EXTRA_ENV_SETTINGS \
234 "console=ttyPSC0\0" \
236 "kernel_addr_r=400000\0" \
237 "fdt_addr_r=600000\0" \
238 "rootpath=/opt/eldk/ppc_6xx\0" \
239 "ramargs=setenv bootargs root=/dev/ram rw\0" \
240 "nfsargs=setenv bootargs root=/dev/nfs rw " \
241 "nfsroot=${serverip}:${rootpath}\0" \
242 "addip=setenv bootargs ${bootargs} " \
243 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
244 ":${hostname}:${netdev}:off panic=1\0" \
245 "addcons=setenv bootargs ${bootargs} " \
246 "console=${console},${baudrate}\0" \
247 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
248 "flash_self_old=sete console ttyS0; " \
249 "run ramargs addip addcons addmtd; " \
250 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
251 "flash_self=run ramargs addip addcons;" \
252 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
253 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
254 "bootm ${kernel_addr}\0" \
255 "flash_nfs=run nfsargs addip addcons;" \
256 "bootm ${kernel_addr} - ${fdt_addr}\0" \
257 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
258 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
259 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
260 "tftp ${fdt_addr_r} ${fdt_file}; " \
261 "run nfsargs addip addcons addmtd; " \
262 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
263 CUSTOM_ENV_SETTINGS \
264 "load=tftp 200000 ${u-boot}\0" \
268 #define CONFIG_BOOTCOMMAND "run net_nfs"
271 * IPB Bus clocking configuration.
273 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
275 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
277 * PCI Bus clocking configuration
279 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
280 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
281 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
283 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
289 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
290 #ifdef CONFIG_TQM5200_REV100
291 #define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
293 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
297 * I2C clock frequency
299 * Please notice, that the resulting clock frequency could differ from the
300 * configured value. This is because the I2C clock is derived from system
301 * clock over a frequency divider with only a few divider values. U-Boot
302 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
303 * approximation allways lies below the configured value, never above.
305 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
306 #define CONFIG_SYS_I2C_SLAVE 0x7F
309 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
310 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
311 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
312 * same configuration could be used.
314 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
315 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
316 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
317 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
320 * HW-Monitor configuration on Mini-FAP
322 #if defined (CONFIG_MINIFAP)
323 #define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
326 /* List of I2C addresses to be verified by POST */
327 #if defined (CONFIG_MINIFAP)
328 #undef CONFIG_SYS_POST_I2C_ADDRS
329 #define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
330 CONFIG_SYS_I2C_HWMON_ADDR, \
331 CONFIG_SYS_I2C_SLAVE}
335 * Flash configuration
337 #define CONFIG_SYS_FLASH_BASE 0xFC000000
339 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
340 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
342 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
343 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
344 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
346 #define CONFIG_SYS_FLASH_ADDR0 0x555
347 #define CONFIG_SYS_FLASH_ADDR1 0x2AA
348 #define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
349 #define CONFIG_SYS_MAX_FLASH_SECT 128
351 /* use CFI flash driver */
352 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
353 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
354 #define CONFIG_FLASH_CFI_MTD /* with MTD support */
355 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
356 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
358 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
361 #define CONFIG_SYS_FLASH_EMPTY_INFO
362 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
363 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
365 #if defined (CONFIG_CAM5200)
366 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
367 #elif defined(CONFIG_TQM5200_B)
368 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
370 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
373 /* Dynamic MTD partition support */
374 #define CONFIG_CMD_MTDPARTS
375 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
376 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
378 #if defined(CONFIG_STK52XX)
379 # if defined(CONFIG_TQM5200_B)
380 # if defined(CONFIG_SYS_LOWBOOT)
381 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
388 # else /* highboot */
389 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
395 # endif /* CONFIG_SYS_LOWBOOT */
396 # else /* !CONFIG_TQM5200_B */
397 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
404 # endif /* CONFIG_TQM5200_B */
405 #elif defined (CONFIG_CAM5200)
406 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
410 #elif defined (CONFIG_CHARON)
411 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
417 #elif defined (CONFIG_FO300)
418 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
425 # error "Unknown Carrier Board"
426 #endif /* CONFIG_STK52XX */
429 * Environment settings
431 #define CONFIG_ENV_IS_IN_FLASH 1
432 #define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
433 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
434 #define CONFIG_ENV_SECT_SIZE 0x40000
436 #define CONFIG_ENV_SECT_SIZE 0x20000
437 #endif /* CONFIG_TQM5200_B */
438 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
439 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
444 #define CONFIG_SYS_MBAR 0xF0000000
445 #define CONFIG_SYS_SDRAM_BASE 0x00000000
446 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
448 /* Use ON-Chip SRAM until RAM will be available */
449 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
451 /* preserve space for the post_word at end of on-chip SRAM */
452 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
454 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
457 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
458 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
460 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
461 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
462 # define CONFIG_SYS_RAMBOOT 1
465 #if defined (CONFIG_CAM5200)
466 # define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
467 #elif defined(CONFIG_TQM5200_B)
468 # define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
470 # define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
473 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
474 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
477 * Ethernet configuration
479 #define CONFIG_MPC5xxx_FEC 1
480 #define CONFIG_MPC5xxx_FEC_MII100
482 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
484 /* #define CONFIG_MPC5xxx_FEC_MII10 */
485 #define CONFIG_PHY_ADDR 0x00
490 * use CS1: Bit 0 (mask: 0x80000000):
491 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
492 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
493 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
494 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
495 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
496 * Use for REV200 STK52XX boards and FO300 boards. Do not use
497 * with REV100 modules (because, there I2C1 is used as I2C bus).
498 * use ATA: Bits 6-7 (mask 0x03000000):
499 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
500 * Use for CAM5200 board.
501 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
502 * use PSC6: Bits 9-11 (mask 0x00700000):
503 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
504 * UART, CODEC or IrDA.
505 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
506 * enable extended POST tests.
507 * Use for MINI-FAP and TQM5200_IB boards.
508 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
509 * Extended POST test is not available.
510 * Use for STK52xx, FO300 and CAM5200 boards.
511 * WARNING: When the extended POST is enabled, these bits will
512 * be overridden by this code as GPIOs!
513 * use PCI_DIS: Bit 16 (mask 0x00008000):
514 * 1 -> disable PCI controller (on CAM5200 board).
515 * use USB: Bits 18-19 (mask 0x00003000):
516 * 10 -> two UARTs (on FO300 and CAM5200).
517 * use PSC3: Bits 20-23 (mask: 0x00000f00):
518 * 0000 -> All PSC3 pins are GPIOs.
519 * 1100 -> UART/SPI (on FO300 board).
520 * 0100 -> UART (on CAM5200 board).
521 * use PSC2: Bits 25:27 (mask: 0x00000030):
522 * 000 -> All PSC2 pins are GPIOs.
523 * 100 -> UART (on CAM5200 board).
524 * 001 -> CAN1/2 on PSC2 pins.
525 * Use for REV100 STK52xx boards
526 * 01x -> Use AC97 (on FO300 board).
527 * use PSC1: Bits 29-31 (mask: 0x00000007):
528 * 100 -> UART (on all boards).
530 #if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
531 #if defined (CONFIG_MINIFAP)
532 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
533 #elif defined (CONFIG_STK52XX)
534 # if defined (CONFIG_STK52XX_REV100)
535 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
536 # else /* STK52xx REV200 and above */
537 # if defined (CONFIG_TQM5200_REV100)
538 # error TQM5200 REV100 not supported on STK52XX REV200 or above
539 # else/* TQM5200 REV200 and above */
540 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
543 #elif defined (CONFIG_FO300)
544 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
545 #elif defined (CONFIG_CAM5200)
546 # define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
547 #else /* TMQ5200 Inbetriebnahme-Board */
548 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
555 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
556 # define CONFIG_RTC_M41T11 1
557 # define CONFIG_SYS_I2C_RTC_ADDR 0x68
558 # define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
561 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
565 * Miscellaneous configurable options
567 #define CONFIG_SYS_LONGHELP /* undef to save memory */
569 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
571 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
572 #if defined(CONFIG_CMD_KGDB)
573 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
576 #if defined(CONFIG_CMD_KGDB)
577 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
579 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
581 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
582 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
583 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
585 /* Enable an alternate, more extensive memory test */
586 #define CONFIG_SYS_ALT_MEMTEST
588 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
589 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
591 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
594 * Various low-level settings
596 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
597 #define CONFIG_SYS_HID0_FINAL HID0_ICE
599 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
600 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
601 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
602 #define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
604 #define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
606 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
607 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
609 #define CONFIG_LAST_STAGE_INIT
612 * SRAM - Do not map below 2 GB in address space, because this area is used
613 * for SDRAM autosizing.
615 #define CONFIG_SYS_CS2_START 0xE5000000
616 #define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
617 #define CONFIG_SYS_CS2_CFG 0x0004D930
620 * Grafic controller - Do not map below 2 GB in address space, because this
621 * area is used for SDRAM autosizing.
623 #define SM501_FB_BASE 0xE0000000
624 #define CONFIG_SYS_CS1_START (SM501_FB_BASE)
625 #define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
626 #define CONFIG_SYS_CS1_CFG 0x8F48FF70
627 #define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
629 #define CONFIG_SYS_CS_BURST 0x00000000
630 #define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
632 #if defined(CONFIG_CAM5200)
633 #define CONFIG_SYS_CS4_START 0xB0000000
634 #define CONFIG_SYS_CS4_SIZE 0x00010000
635 #define CONFIG_SYS_CS4_CFG 0x01019C10
637 #define CONFIG_SYS_CS5_START 0xD0000000
638 #define CONFIG_SYS_CS5_SIZE 0x01208000
639 #define CONFIG_SYS_CS5_CFG 0x1414BF10
642 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
644 /*-----------------------------------------------------------------------
646 *-----------------------------------------------------------------------
648 #define CONFIG_USB_CLOCK 0x0001BBBB
649 #define CONFIG_USB_CONFIG 0x00001000
651 /*-----------------------------------------------------------------------
652 * IDE/ATA stuff Supports IDE harddisk
653 *-----------------------------------------------------------------------
656 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
658 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
659 #undef CONFIG_IDE_LED /* LED for ide not supported */
661 #define CONFIG_IDE_RESET /* reset for ide supported */
662 #define CONFIG_IDE_PREINIT
664 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
665 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
667 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
669 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
671 /* Offset for data I/O */
672 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
674 /* Offset for normal register accesses */
675 #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
677 /* Offset for alternate registers */
678 #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
680 /* Interval between registers */
681 #define CONFIG_SYS_ATA_STRIDE 4
683 /* Support ATAPI devices */
684 #define CONFIG_ATAPI 1
686 /*-----------------------------------------------------------------------
687 * Open firmware flat tree support
688 *-----------------------------------------------------------------------
690 #define OF_CPU "PowerPC,5200@0"
691 #define OF_SOC "soc5200@f0000000"
692 #define OF_TBCLK (bd->bi_busfreq / 4)
693 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
695 #endif /* __CONFIG_H */