include/configs/MVBC_P.h

   1 /*
   2  * (C) Copyright 2003-2004
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * (C) Copyright 2004-2008
   6  * Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 #include <version.h>
  31
  32 #define CONFIG_MPC5xxx  1
  33 #define CONFIG_MPC5200  1
  34
  35 #ifndef CONFIG_SYS_TEXT_BASE
  36 #define CONFIG_SYS_TEXT_BASE    0xFF800000
  37 #endif
  38
  39 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000
  40
  41 #define BOOTFLAG_COLD           0x01
  42 #define BOOTFLAG_WARM           0x02
  43
  44 #define CONFIG_MISC_INIT_R      1
  45
  46 #define CONFIG_SYS_CACHELINE_SIZE       32
  47 #ifdef CONFIG_CMD_KGDB
  48 #define CONFIG_SYS_CACHELINE_SHIFT      5
  49 #endif
  50
  51 #define CONFIG_PSC_CONSOLE      1
  52 #define CONFIG_BAUDRATE         115200
  53 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200, 230400}
  54
  55 #define CONFIG_PCI              1
  56 #define CONFIG_PCI_PNP          1
  57 #undef  CONFIG_PCI_SCAN_SHOW
  58 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
  59
  60 #define CONFIG_PCI_MEM_BUS      0x40000000
  61 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  62 #define CONFIG_PCI_MEM_SIZE     0x10000000
  63
  64 #define CONFIG_PCI_IO_BUS       0x50000000
  65 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  66 #define CONFIG_PCI_IO_SIZE      0x01000000
  67
  68 #define CONFIG_SYS_XLB_PIPELINING       1
  69 #define CONFIG_HIGH_BATS        1
  70
  71 #define MV_CI                   mvBlueCOUGAR-P
  72 #define MV_VCI                  mvBlueCOUGAR-P
  73 #define MV_FPGA_DATA            0xff860000
  74 #define MV_FPGA_SIZE            0
  75 #define MV_KERNEL_ADDR          0xffd00000
  76 #define MV_INITRD_ADDR          0xff900000
  77 #define MV_INITRD_LENGTH        0x00400000
  78 #define MV_SCRATCH_ADDR         0x00000000
  79 #define MV_SCRATCH_LENGTH       MV_INITRD_LENGTH
  80 #define MV_SCRIPT_ADDR          0xff840000
  81 #define MV_SCRIPT_ADDR2         0xff850000
  82 #define MV_DTB_ADDR             0xfffc0000
  83
  84 #define CONFIG_SHOW_BOOT_PROGRESS 1
  85
  86 #define MV_KERNEL_ADDR_RAM      0x00100000
  87 #define MV_DTB_ADDR_RAM         0x00600000
  88 #define MV_INITRD_ADDR_RAM      0x01000000
  89
  90 /* pass open firmware flat tree */
  91 #define CONFIG_OF_LIBFDT        1
  92 #define CONFIG_OF_BOARD_SETUP   1
  93
  94 #define OF_CPU                  "PowerPC,5200@0"
  95 #define OF_SOC                  "soc5200@f0000000"
  96 #define OF_TBCLK                (bd->bi_busfreq / 4)
  97 #define MV_DTB_NAME             mvbc-p.dtb
  98 #define CONFIG_OF_STDOUT_VIA_ALIAS      1
  99
 100 /*
 101  * Supported commands
 102  */
 103 #include <config_cmd_default.h>
 104
 105 #define CONFIG_CMD_CACHE
 106 #define CONFIG_CMD_NET
 107 #define CONFIG_CMD_PING
 108 #define CONFIG_CMD_DHCP
 109 #define CONFIG_CMD_SDRAM
 110 #define CONFIG_CMD_PCI
 111 #define CONFIG_CMD_FPGA
 112 #define CONFIG_CMD_I2C
 113
 114 #undef CONFIG_WATCHDOG
 115
 116 #define CONFIG_BOOTP_VENDOREX
 117 #define CONFIG_BOOTP_SUBNETMASK
 118 #define CONFIG_BOOTP_GATEWAY
 119 #define CONFIG_BOOTP_DNS
 120 #define CONFIG_BOOTP_DNS2
 121 #define CONFIG_BOOTP_HOSTNAME
 122 #define CONFIG_BOOTP_BOOTFILESIZE
 123 #define CONFIG_BOOTP_BOOTPATH
 124 #define CONFIG_BOOTP_NTPSERVER
 125 #define CONFIG_BOOTP_RANDOM_DELAY
 126 #define CONFIG_BOOTP_SEND_HOSTNAME
 127
 128 /*
 129  * Autoboot
 130  */
 131 #define CONFIG_BOOTDELAY                2
 132 #define CONFIG_AUTOBOOT_KEYED
 133 #define CONFIG_AUTOBOOT_STOP_STR        "s"
 134 #define CONFIG_ZERO_BOOTDELAY_CHECK
 135 #define CONFIG_RESET_TO_RETRY           1000
 136
 137 #define CONFIG_BOOTCOMMAND      "if imi ${script_addr}; \
 138                                         then source ${script_addr};     \
 139                                         else source ${script_addr2};    \
 140                                 fi;"
 141
 142 #define CONFIG_BOOTARGS         "root=/dev/ram ro rootfstype=squashfs"
 143 #define CONFIG_ENV_OVERWRITE
 144
 145 #define XMK_STR(x)      #x
 146 #define MK_STR(x)       XMK_STR(x)
 147
 148 #define CONFIG_EXTRA_ENV_SETTINGS                               \
 149         "console_nr=0\0"                                        \
 150         "console=yes\0"                                         \
 151         "stdin=serial\0"                                        \
 152         "stdout=serial\0"                                       \
 153         "stderr=serial\0"                                       \
 154         "fpga=0\0"                                              \
 155         "fpgadata=" MK_STR(MV_FPGA_DATA) "\0"                   \
 156         "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0"               \
 157         "script_addr=" MK_STR(MV_SCRIPT_ADDR) "\0"              \
 158         "script_addr2=" MK_STR(MV_SCRIPT_ADDR2) "\0"            \
 159         "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0"           \
 160         "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0"   \
 161         "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0"           \
 162         "mv_initrd_addr_ram=" MK_STR(MV_INITRD_ADDR_RAM) "\0"   \
 163         "mv_initrd_length=" MK_STR(MV_INITRD_LENGTH) "\0"       \
 164         "mv_dtb_addr=" MK_STR(MV_DTB_ADDR) "\0"                 \
 165         "mv_dtb_addr_ram=" MK_STR(MV_DTB_ADDR_RAM) "\0"         \
 166         "dtb_name=" MK_STR(MV_DTB_NAME) "\0"                    \
 167         "mv_scratch_addr=" MK_STR(MV_SCRATCH_ADDR) "\0"         \
 168         "mv_scratch_length=" MK_STR(MV_SCRATCH_LENGTH) "\0"     \
 169         "mv_version=" U_BOOT_VERSION "\0"                       \
 170         "dhcp_client_id=" MK_STR(MV_CI) "\0"                    \
 171         "dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0"     \
 172         "netretry=no\0"                                         \
 173         "use_static_ipaddr=no\0"                                \
 174         "static_ipaddr=192.168.90.10\0"                         \
 175         "static_netmask=255.255.255.0\0"                        \
 176         "static_gateway=0.0.0.0\0"                              \
 177         "initrd_name=uInitrd.mvbc-p-rfs\0"                      \
 178         "zcip=no\0"                                             \
 179         "netboot=yes\0"                                         \
 180         "mvtest=Ff\0"                                           \
 181         "tried_bootfromflash=no\0"                              \
 182         "tried_bootfromnet=no\0"                                \
 183         "use_dhcp=yes\0"                                        \
 184         "gev_start=yes\0"                                       \
 185         "mvbcdma_debug=0\0"                                     \
 186         "mvbcia_debug=0\0"                                      \
 187         "propdev_debug=0\0"                                     \
 188         "gevss_debug=0\0"                                       \
 189         "watchdog=1\0"                                          \
 190         "sensor_cnt=1\0"                                        \
 191         ""
 192
 193 #undef XMK_STR
 194 #undef MK_STR
 195
 196 /*
 197  * IPB Bus clocking configuration.
 198  */
 199 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
 200 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
 201
 202 /*
 203  * Flash configuration
 204  */
 205 #undef  CONFIG_FLASH_16BIT
 206 #define CONFIG_SYS_FLASH_CFI
 207 #define CONFIG_FLASH_CFI_DRIVER
 208 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
 209 #define CONFIG_SYS_FLASH_EMPTY_INFO
 210
 211 #define CONFIG_SYS_FLASH_ERASE_TOUT     50000
 212 #define CONFIG_SYS_FLASH_WRITE_TOUT     1000
 213
 214 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 215 #define CONFIG_SYS_MAX_FLASH_SECT       256
 216
 217 #define CONFIG_SYS_LOWBOOT
 218 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_TEXT_BASE
 219 #define CONFIG_SYS_FLASH_SIZE           0x00800000
 220
 221 /*
 222  * Environment settings
 223  */
 224 #define CONFIG_ENV_IS_IN_FLASH
 225 #undef  CONFIG_SYS_FLASH_PROTECTION
 226
 227 #define CONFIG_ENV_ADDR         0xFFFE0000
 228 #define CONFIG_ENV_SIZE         0x10000
 229 #define CONFIG_ENV_SECT_SIZE    0x10000
 230 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR+CONFIG_ENV_SIZE)
 231 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 232
 233 /*
 234  * Memory map
 235  */
 236 #define CONFIG_SYS_MBAR         0xF0000000
 237 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 238 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 239
 240 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 241 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
 242
 243 #define CONFIG_SYS_GBL_DATA_SIZE        128
 244 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 245 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 246
 247 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 248 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 249 #define CONFIG_SYS_RAMBOOT              1
 250 #endif
 251
 252 /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
 253 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
 254 #define CONFIG_SYS_MALLOC_LEN           (512 << 10)
 255 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
 256
 257 /*
 258  * I2C configuration
 259  */
 260 #define CONFIG_HARD_I2C         1
 261 #define CONFIG_SYS_I2C_MODULE   1
 262 #define CONFIG_SYS_I2C_SPEED    86000
 263 #define CONFIG_SYS_I2C_SLAVE    0x7F
 264
 265 /*
 266  * Ethernet configuration
 267  */
 268 #define CONFIG_NET_MULTI
 269 #define CONFIG_NET_RETRY_COUNT 5
 270
 271 #define CONFIG_E1000
 272 #define CONFIG_E1000_FALLBACK_MAC       { 0xb6, 0xb4, 0x45, 0xeb, 0xfb, 0xc0 }
 273 #undef CONFIG_MPC5xxx_FEC
 274 #undef CONFIG_PHY_ADDR
 275 #define CONFIG_NETDEV           eth0
 276
 277 /*
 278  * Miscellaneous configurable options
 279  */
 280 #define CONFIG_SYS_HUSH_PARSER
 281 #define CONFIG_CMDLINE_EDITING
 282 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 283 #undef  CONFIG_SYS_LONGHELP
 284 #define CONFIG_SYS_PROMPT               "=> "
 285 #ifdef CONFIG_CMD_KGDB
 286 #define CONFIG_SYS_CBSIZE               1024
 287 #else
 288 #define CONFIG_SYS_CBSIZE               256
 289 #endif
 290 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 291 #define CONFIG_SYS_MAXARGS              16
 292 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 293
 294 #define CONFIG_SYS_MEMTEST_START        0x00800000
 295 #define CONFIG_SYS_MEMTEST_END          0x02f00000
 296
 297 #define CONFIG_SYS_HZ                   1000
 298
 299 /* default load address */
 300 #define CONFIG_SYS_LOAD_ADDR            0x02000000
 301 /* default location for tftp and bootm */
 302 #define CONFIG_LOADADDR         0x00200000
 303
 304 /*
 305  * Various low-level settings
 306  */
 307 #define CONFIG_SYS_GPS_PORT_CONFIG      0x20000004
 308
 309 #define CONFIG_SYS_HID0_INIT            (HID0_ICE | HID0_ICFI)
 310 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 311
 312 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 313 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 314 #define CONFIG_SYS_BOOTCS_CFG           0x00047800
 315 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 316 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 317
 318 #define CONFIG_SYS_CS_BURST             0x000000f0
 319 #define CONFIG_SYS_CS_DEADCYCLE 0x33333303
 320
 321 #define CONFIG_SYS_RESET_ADDRESS        0x00000100
 322
 323 #undef FPGA_DEBUG
 324 #undef CONFIG_SYS_FPGA_PROG_FEEDBACK
 325 #define CONFIG_FPGA             CONFIG_SYS_ALTERA_CYCLON2
 326 #define CONFIG_FPGA_ALTERA      1
 327 #define CONFIG_FPGA_CYCLON2     1
 328 #define CONFIG_FPGA_COUNT       1
 329
 330 #endif