include/configs/M53017EVB.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the Freescale MCF53017EVB.
   4  *
   5  * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
   6  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   7  */
   8
   9 /*
  10  * board/config.h - configuration options, board specific
  11  */
  12
  13 #ifndef _M53017EVB_H
  14 #define _M53017EVB_H
  15
  16 /*
  17  * High Level Configuration Options
  18  * (easy to change)
  19  */
  20
  21 #define CONFIG_SYS_UART_PORT            (0)
  22
  23 #define CONFIG_WATCHDOG_TIMEOUT         5000
  24
  25 #ifdef CONFIG_MCFFEC
  26 #       define CONFIG_SYS_DISCOVER_PHY
  27 #       define CONFIG_SYS_TX_ETH_BUFFER 8
  28 #       define CONFIG_SYS_FEC_BUF_USE_SRAM
  29
  30 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  31 #       ifndef CONFIG_SYS_DISCOVER_PHY
  32 #               define FECDUPLEX        FULL
  33 #               define FECSPEED         _100BASET
  34 #       endif                   /* CONFIG_SYS_DISCOVER_PHY */
  35 #endif
  36
  37 #define CONFIG_SYS_RTC_CNT              (0x8000)
  38 #define CONFIG_SYS_RTC_SETUP            (RTC_OCEN_OSCBYP | RTC_OCEN_CLKEN)
  39
  40 /* I2C */
  41
  42 #ifdef CONFIG_MCFFEC
  43 #       define CONFIG_IPADDR    192.162.1.2
  44 #       define CONFIG_NETMASK   255.255.255.0
  45 #       define CONFIG_SERVERIP  192.162.1.1
  46 #       define CONFIG_GATEWAYIP 192.162.1.1
  47 #endif                          /* FEC_ENET */
  48
  49 #define CONFIG_HOSTNAME         "M53017"
  50 #define CONFIG_EXTRA_ENV_SETTINGS               \
  51         "netdev=eth0\0"                         \
  52         "loadaddr=40010000\0"                   \
  53         "u-boot=u-boot.bin\0"                   \
  54         "load=tftp ${loadaddr) ${u-boot}\0"     \
  55         "upd=run load; run prog\0"              \
  56         "prog=prot off 0 3ffff;"                \
  57         "era 0 3ffff;"                          \
  58         "cp.b ${loadaddr} 0 ${filesize};"       \
  59         "save\0"                                \
  60         ""
  61
  62 #define CONFIG_PRAM             512     /* 512 KB */
  63
  64 #define CONFIG_SYS_CLK          80000000
  65 #define CONFIG_SYS_CPU_CLK      CONFIG_SYS_CLK * 3
  66
  67 #define CONFIG_SYS_MBAR         0xFC000000
  68
  69 /*
  70  * Low Level Configuration Settings
  71  * (address mappings, register initial values, etc.)
  72  * You should know what you are doing if you make changes here.
  73  */
  74 /*
  75  * Definitions for initial stack pointer and data area (in DPRAM)
  76  */
  77 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
  78 #define CONFIG_SYS_INIT_RAM_SIZE                0x20000 /* Size of used area in internal SRAM */
  79 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
  80
  81 /*
  82  * Start addresses for the final memory configuration
  83  * (Set up by the startup code)
  84  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  85  */
  86 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  87 #define CONFIG_SYS_SDRAM_SIZE           64      /* SDRAM size in MB */
  88 #define CONFIG_SYS_SDRAM_CFG1           0x43711630
  89 #define CONFIG_SYS_SDRAM_CFG2           0x56670000
  90 #define CONFIG_SYS_SDRAM_CTRL           0xE1092000
  91 #define CONFIG_SYS_SDRAM_EMOD           0x80010000
  92 #define CONFIG_SYS_SDRAM_MODE           0x00CD0000
  93
  94 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor */
  95
  96 /*
  97  * For booting Linux, the board info and command line data
  98  * have to be in the first 8 MB of memory, since this is
  99  * the maximum mapped by the Linux kernel during initialization ??
 100  */
 101 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 102 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 103
 104 /*-----------------------------------------------------------------------
 105  * FLASH organization
 106  */
 107 #ifdef CONFIG_SYS_FLASH_CFI
 108 #       define CONFIG_FLASH_SPANSION_S29WS_N    1
 109 #       define CONFIG_SYS_FLASH_SIZE            0x1000000       /* Max size that the board might have */
 110 #       define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 111 #endif
 112
 113 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
 114
 115 /* Configuration for environment
 116  * Environment is embedded in u-boot in the second sector of the flash
 117  */
 118
 119 #define LDS_BOARD_TEXT \
 120         . = DEFINED(env_offset) ? env_offset : .; \
 121         env/embedded.o(.text*)
 122
 123 /*-----------------------------------------------------------------------
 124  * Cache Configuration
 125  */
 126
 127 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 128                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 129 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 130                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 131 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINVA)
 132 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 133                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 134                                          CF_ACR_EN | CF_ACR_SM_ALL)
 135 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_EC | CF_CACR_CINVA | \
 136                                          CF_CACR_DCM_P)
 137
 138 /*-----------------------------------------------------------------------
 139  * Chipselect bank definitions
 140  */
 141 /*
 142  * CS0 - NOR Flash
 143  * CS1 - Ext SRAM
 144  * CS2 - Available
 145  * CS3 - Available
 146  * CS4 - Available
 147  * CS5 - Available
 148  */
 149 #define CONFIG_SYS_CS0_BASE             0
 150 #define CONFIG_SYS_CS0_MASK             0x00FF0001
 151 #define CONFIG_SYS_CS0_CTRL             0x00001FA0
 152
 153 #define CONFIG_SYS_CS1_BASE             0xC0000000
 154 #define CONFIG_SYS_CS1_MASK             0x00070001
 155 #define CONFIG_SYS_CS1_CTRL             0x00001FA0
 156
 157 #endif                          /* _M53017EVB_H */