ARM: mach-at91: Add compile time option to choose proper timer
[platform/kernel/u-boot.git] / include / configs / M5275EVB.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Configuation settings for the Motorola MC5275EVB board.
4  *
5  * By Arthur Shipkowski <art@videon-central.com>
6  * Copyright (C) 2005 Videon Central, Inc.
7  *
8  * Based off of M5272C3 board code by Josef Baumgartner
9  * <josef.baumgartner@telex.de>
10  */
11
12 /*
13  * board/config.h - configuration options, board specific
14  */
15
16 #ifndef _M5275EVB_H
17 #define _M5275EVB_H
18
19 /*
20  * High Level Configuration Options
21  * (easy to change)
22  */
23
24 #define CONFIG_MCFTMR
25
26 #define CONFIG_SYS_UART_PORT            (0)
27
28 /* Configuration for environment
29  * Environment is embedded in u-boot in the second sector of the flash
30  */
31
32 #define LDS_BOARD_TEXT \
33         . = DEFINED(env_offset) ? env_offset : .; \
34         env/embedded.o(.text);
35
36 /*
37  * BOOTP options
38  */
39 #define CONFIG_BOOTP_BOOTFILESIZE
40
41 /* Available command configuration */
42
43 #ifdef CONFIG_MCFFEC
44 #define CONFIG_MII_INIT         1
45 #define CONFIG_SYS_DISCOVER_PHY
46 #define CONFIG_SYS_RX_ETH_BUFFER        8
47 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
48 #define CONFIG_HAS_ETH1
49 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
50 #ifndef CONFIG_SYS_DISCOVER_PHY
51 #define FECDUPLEX               FULL
52 #define FECSPEED                _100BASET
53 #else
54 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
55 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
56 #endif
57 #endif
58 #endif
59
60 /* I2C */
61 #define CONFIG_SYS_IMMR         CONFIG_SYS_MBAR
62 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
63 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
64 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
65
66 #define CONFIG_BOOTCOMMAND      "bootm ffe40000"
67
68 #ifdef CONFIG_MCFFEC
69 #       define CONFIG_NET_RETRY_COUNT   5
70 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
71 #endif                          /* FEC_ENET */
72
73 #define CONFIG_EXTRA_ENV_SETTINGS               \
74         "netdev=eth0\0"                         \
75         "loadaddr=10000\0"                      \
76         "uboot=u-boot.bin\0"                    \
77         "load=tftp ${loadaddr} ${uboot}\0"      \
78         "upd=run load; run prog\0"              \
79         "prog=prot off ffe00000 ffe3ffff;"      \
80         "era ffe00000 ffe3ffff;"                \
81         "cp.b ${loadaddr} ffe00000 ${filesize};"\
82         "save\0"                                \
83         ""
84
85 #define CONFIG_SYS_CLK                  150000000
86
87 /*
88  * Low Level Configuration Settings
89  * (address mappings, register initial values, etc.)
90  * You should know what you are doing if you make changes here.
91  */
92
93 #define CONFIG_SYS_MBAR         0x40000000
94
95 /*-----------------------------------------------------------------------
96  * Definitions for initial stack pointer and data area (in DPRAM)
97  */
98 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
99 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
100 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
101 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
102
103 /*-----------------------------------------------------------------------
104  * Start addresses for the final memory configuration
105  * (Set up by the startup code)
106  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
107  */
108 #define CONFIG_SYS_SDRAM_BASE           0x00000000
109 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
110 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
111
112 #ifdef CONFIG_MONITOR_IS_IN_RAM
113 #define CONFIG_SYS_MONITOR_BASE 0x20000
114 #else
115 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
116 #endif
117
118 #define CONFIG_SYS_MONITOR_LEN          0x20000
119 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
120
121 /*
122  * For booting Linux, the board info and command line data
123  * have to be in the first 8 MB of memory, since this is
124  * the maximum mapped by the Linux kernel during initialization ??
125  */
126 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
127 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
128
129 /*-----------------------------------------------------------------------
130  * FLASH organization
131  */
132 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
133 #define CONFIG_SYS_MAX_FLASH_SECT       11      /* max number of sectors on one chip */
134 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
135
136 #define CONFIG_SYS_FLASH_SIZE           0x200000
137
138 /*-----------------------------------------------------------------------
139  * Cache Configuration
140  */
141
142 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
143                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
144 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
145                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
146 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
147 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
148                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
149                                          CF_ACR_EN | CF_ACR_SM_ALL)
150 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
151                                          CF_CACR_DISD | CF_CACR_INVI | \
152                                          CF_CACR_CEIB | CF_CACR_DCM | \
153                                          CF_CACR_EUSP)
154
155 /*-----------------------------------------------------------------------
156  * Memory bank definitions
157  */
158 #define CONFIG_SYS_CS0_BASE             0xffe00000
159 #define CONFIG_SYS_CS0_CTRL             0x00001980
160 #define CONFIG_SYS_CS0_MASK             0x001F0001
161
162 #define CONFIG_SYS_CS1_BASE             0x30000000
163 #define CONFIG_SYS_CS1_CTRL             0x00001900
164 #define CONFIG_SYS_CS1_MASK             0x00070001
165
166 /*-----------------------------------------------------------------------
167  * Port configuration
168  */
169 #define CONFIG_SYS_FECI2C               0x0FA0
170
171 #endif  /* _M5275EVB_H */