include/configs/M5275EVB.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the Motorola MC5275EVB board.
   4  *
   5  * By Arthur Shipkowski <art@videon-central.com>
   6  * Copyright (C) 2005 Videon Central, Inc.
   7  *
   8  * Based off of M5272C3 board code by Josef Baumgartner
   9  * <josef.baumgartner@telex.de>
  10  */
  11
  12 /*
  13  * board/config.h - configuration options, board specific
  14  */
  15
  16 #ifndef _M5275EVB_H
  17 #define _M5275EVB_H
  18
  19 /*
  20  * High Level Configuration Options
  21  * (easy to change)
  22  */
  23
  24 #define CONFIG_SYS_UART_PORT            (0)
  25
  26 /* Configuration for environment
  27  * Environment is embedded in u-boot in the second sector of the flash
  28  */
  29
  30 #define LDS_BOARD_TEXT \
  31         . = DEFINED(env_offset) ? env_offset : .; \
  32         env/embedded.o(.text);
  33
  34 /* Available command configuration */
  35
  36 /* I2C */
  37 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
  38 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
  39 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
  40
  41 #ifdef CONFIG_MCFFEC
  42 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
  43 #endif                          /* FEC_ENET */
  44
  45 #define CONFIG_EXTRA_ENV_SETTINGS               \
  46         "netdev=eth0\0"                         \
  47         "loadaddr=10000\0"                      \
  48         "uboot=u-boot.bin\0"                    \
  49         "load=tftp ${loadaddr} ${uboot}\0"      \
  50         "upd=run load; run prog\0"              \
  51         "prog=prot off ffe00000 ffe3ffff;"      \
  52         "era ffe00000 ffe3ffff;"                \
  53         "cp.b ${loadaddr} ffe00000 ${filesize};"\
  54         "save\0"                                \
  55         ""
  56
  57 #define CONFIG_SYS_CLK                  150000000
  58
  59 /*
  60  * Low Level Configuration Settings
  61  * (address mappings, register initial values, etc.)
  62  * You should know what you are doing if you make changes here.
  63  */
  64
  65 #define CONFIG_SYS_MBAR         0x40000000
  66
  67 /*-----------------------------------------------------------------------
  68  * Definitions for initial stack pointer and data area (in DPRAM)
  69  */
  70 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
  71 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
  72
  73 /*-----------------------------------------------------------------------
  74  * Start addresses for the final memory configuration
  75  * (Set up by the startup code)
  76  * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
  77  */
  78 #define CFG_SYS_SDRAM_BASE              0x00000000
  79 #define CFG_SYS_SDRAM_SIZE              16      /* SDRAM size in MB */
  80 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
  81
  82 /*
  83  * For booting Linux, the board info and command line data
  84  * have to be in the first 8 MB of memory, since this is
  85  * the maximum mapped by the Linux kernel during initialization ??
  86  */
  87 #define CONFIG_SYS_BOOTMAPSZ            (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
  88
  89 /*-----------------------------------------------------------------------
  90  * FLASH organization
  91  */
  92
  93 #define CONFIG_SYS_FLASH_SIZE           0x200000
  94
  95 /*-----------------------------------------------------------------------
  96  * Cache Configuration
  97  */
  98
  99 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 100                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 101 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 102                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 103 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 104 #define CONFIG_SYS_CACHE_ACR0           (CFG_SYS_SDRAM_BASE | \
 105                                          CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
 106                                          CF_ACR_EN | CF_ACR_SM_ALL)
 107 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 108                                          CF_CACR_DISD | CF_CACR_INVI | \
 109                                          CF_CACR_CEIB | CF_CACR_DCM | \
 110                                          CF_CACR_EUSP)
 111
 112 /*-----------------------------------------------------------------------
 113  * Memory bank definitions
 114  */
 115 #define CONFIG_SYS_CS0_BASE             0xffe00000
 116 #define CONFIG_SYS_CS0_CTRL             0x00001980
 117 #define CONFIG_SYS_CS0_MASK             0x001F0001
 118
 119 #define CONFIG_SYS_CS1_BASE             0x30000000
 120 #define CONFIG_SYS_CS1_CTRL             0x00001900
 121 #define CONFIG_SYS_CS1_MASK             0x00070001
 122
 123 #endif  /* _M5275EVB_H */