include/configs/M52277EVB.h

   1 /*
   2  * Configuation settings for the Freescale MCF52277 EVB board.
   3  *
   4  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
   5  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 /*
  11  * board/config.h - configuration options, board specific
  12  */
  13
  14 #ifndef _M52277EVB_H
  15 #define _M52277EVB_H
  16
  17 /*
  18  * High Level Configuration Options
  19  * (easy to change)
  20  */
  21 #define CONFIG_MCF5227x         /* define processor family */
  22 #define CONFIG_M52277           /* define processor type */
  23 #define CONFIG_M52277EVB        /* M52277EVB board */
  24
  25 #define CONFIG_MCFUART
  26 #define CONFIG_SYS_UART_PORT            (0)
  27 #define CONFIG_BAUDRATE                 115200
  28
  29 #undef CONFIG_WATCHDOG
  30
  31 #define CONFIG_TIMESTAMP        /* Print image info with timestamp */
  32
  33 /*
  34  * BOOTP options
  35  */
  36 #define CONFIG_BOOTP_BOOTFILESIZE
  37 #define CONFIG_BOOTP_BOOTPATH
  38 #define CONFIG_BOOTP_GATEWAY
  39 #define CONFIG_BOOTP_HOSTNAME
  40
  41 /* Command line configuration */
  42 #include <config_cmd_default.h>
  43
  44 #define CONFIG_CMD_CACHE
  45 #define CONFIG_CMD_DATE
  46 #define CONFIG_CMD_ELF
  47 #define CONFIG_CMD_FLASH
  48 #define CONFIG_CMD_I2C
  49 #define CONFIG_CMD_JFFS2
  50 #define CONFIG_CMD_LOADB
  51 #define CONFIG_CMD_LOADS
  52 #define CONFIG_CMD_MEMORY
  53 #define CONFIG_CMD_MISC
  54 #undef CONFIG_CMD_NET
  55 #undef CONFIG_CMD_NFS
  56 #define CONFIG_CMD_REGINFO
  57 #undef CONFIG_CMD_USB
  58 #undef CONFIG_CMD_BMP
  59 #define CONFIG_CMD_SPI
  60 #define CONFIG_CMD_SF
  61
  62 #define CONFIG_HOSTNAME                 M52277EVB
  63 #define CONFIG_SYS_UBOOT_END            0x3FFFF
  64 #define CONFIG_SYS_LOAD_ADDR2           0x40010007
  65 #ifdef CONFIG_SYS_STMICRO_BOOT
  66 /* ST Micro serial flash */
  67 #define CONFIG_EXTRA_ENV_SETTINGS               \
  68         "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0"     \
  69         "loadaddr=0x40010000\0"                 \
  70         "uboot=u-boot.bin\0"                    \
  71         "load=loadb ${loadaddr} ${baudrate};"   \
  72         "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0"   \
  73         "upd=run load; run prog\0"              \
  74         "prog=sf probe 0:2 10000 1;"            \
  75         "sf erase 0 30000;"                     \
  76         "sf write ${loadaddr} 0 30000;"         \
  77         "save\0"                                \
  78         ""
  79 #endif
  80 #ifdef CONFIG_SYS_SPANSION_BOOT
  81 #define CONFIG_EXTRA_ENV_SETTINGS               \
  82         "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0"     \
  83         "loadaddr=0x40010000\0"                 \
  84         "uboot=u-boot.bin\0"                    \
  85         "load=loadb ${loadaddr} ${baudrate}\0"  \
  86         "upd=run load; run prog\0"              \
  87         "prog=prot off " __stringify(CONFIG_SYS_FLASH_BASE)     \
  88         " " __stringify(CONFIG_SYS_UBOOT_END) ";"               \
  89         "era " __stringify(CONFIG_SYS_FLASH_BASE) " "           \
  90         __stringify(CONFIG_SYS_UBOOT_END) ";"                   \
  91         "cp.b ${loadaddr} " __stringify(CONFIG_SYS_FLASH_BASE)  \
  92         " ${filesize}; save\0"                  \
  93         "updsbf=run loadsbf; run progsbf\0"     \
  94         "loadsbf=loadb ${loadaddr} ${baudrate};"        \
  95         "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0"   \
  96         "progsbf=sf probe 0:2 10000 1;"         \
  97         "sf erase 0 30000;"                     \
  98         "sf write ${loadaddr} 0 30000;"         \
  99         ""
 100 #endif
 101
 102 #define CONFIG_BOOTDELAY                3       /* autoboot after 3 seconds */
 103 /* LCD */
 104 #ifdef CONFIG_CMD_BMP
 105 #define CONFIG_LCD
 106 #define CONFIG_SPLASH_SCREEN
 107 #define CONFIG_LCD_LOGO
 108 #define CONFIG_SHARP_LQ035Q7DH06
 109 #endif
 110
 111 /* USB */
 112 #ifdef CONFIG_CMD_USB
 113 #define CONFIG_USB_EHCI
 114 #define CONFIG_USB_STORAGE
 115 #define CONFIG_DOS_PARTITION
 116 #define CONFIG_MAC_PARTITION
 117 #define CONFIG_ISO_PARTITION
 118 #define CONFIG_SYS_USB_EHCI_REGS_BASE   0xFC0B0000
 119 #define CONFIG_SYS_USB_EHCI_CPU_INIT
 120 #endif
 121
 122 /* Realtime clock */
 123 #define CONFIG_MCFRTC
 124 #undef RTC_DEBUG
 125 #define CONFIG_SYS_RTC_OSCILLATOR       (32 * CONFIG_SYS_HZ)
 126
 127 /* Timer */
 128 #define CONFIG_MCFTMR
 129 #undef CONFIG_MCFPIT
 130
 131 /* I2c */
 132 #define CONFIG_FSL_I2C
 133 #define CONFIG_HARD_I2C         /* I2C with hardware support */
 134 #undef  CONFIG_SOFT_I2C         /* I2C bit-banged               */
 135 #define CONFIG_SYS_I2C_SPEED            80000   /* I2C speed and slave address  */
 136 #define CONFIG_SYS_I2C_SLAVE            0x7F
 137 #define CONFIG_SYS_I2C_OFFSET           0x58000
 138 #define CONFIG_SYS_IMMR                 CONFIG_SYS_MBAR
 139
 140 /* DSPI and Serial Flash */
 141 #define CONFIG_CF_SPI
 142 #define CONFIG_CF_DSPI
 143 #define CONFIG_HARD_SPI
 144 #define CONFIG_SYS_SBFHDR_SIZE          0x7
 145 #ifdef CONFIG_CMD_SPI
 146 #       define CONFIG_SYS_DSPI_CS2
 147 #       define CONFIG_SPI_FLASH
 148 #       define CONFIG_SPI_FLASH_STMICRO
 149
 150 #       define CONFIG_SYS_DSPI_CTAR0    (DSPI_CTAR_TRSZ(7) | \
 151                                          DSPI_CTAR_PCSSCK_1CLK | \
 152                                          DSPI_CTAR_PASC(0) | \
 153                                          DSPI_CTAR_PDT(0) | \
 154                                          DSPI_CTAR_CSSCK(0) | \
 155                                          DSPI_CTAR_ASC(0) | \
 156                                          DSPI_CTAR_DT(1))
 157 #endif
 158
 159 /* Input, PCI, Flexbus, and VCO */
 160 #define CONFIG_EXTRA_CLOCK
 161
 162 #define CONFIG_SYS_INPUT_CLKSRC 16000000
 163
 164 #define CONFIG_PRAM             2048    /* 2048 KB */
 165
 166 #define CONFIG_SYS_PROMPT       "-> "
 167 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 168
 169 #if defined(CONFIG_CMD_KGDB)
 170 #define CONFIG_SYS_CBSIZE       1024    /* Console I/O Buffer Size */
 171 #else
 172 #define CONFIG_SYS_CBSIZE       256     /* Console I/O Buffer Size */
 173 #endif
 174 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)        /* Print Buffer Size */
 175 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 176 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 177
 178 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_SDRAM_BASE + 0x10000)
 179
 180 #define CONFIG_SYS_HZ           1000
 181
 182 #define CONFIG_SYS_MBAR         0xFC000000
 183
 184 /*
 185  * Low Level Configuration Settings
 186  * (address mappings, register initial values, etc.)
 187  * You should know what you are doing if you make changes here.
 188  */
 189
 190 /*
 191  * Definitions for initial stack pointer and data area (in DPRAM)
 192  */
 193 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
 194 #define CONFIG_SYS_INIT_RAM_SIZE                0x8000  /* Size of used area in internal SRAM */
 195 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
 196 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32)
 197 #define CONFIG_SYS_INIT_SP_OFFSET       (CONFIG_SYS_GBL_DATA_OFFSET - 32)
 198 #define CONFIG_SYS_SBFHDR_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - 32)
 199
 200 /*
 201  * Start addresses for the final memory configuration
 202  * (Set up by the startup code)
 203  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 204  */
 205 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 206 #define CONFIG_SYS_SDRAM_SIZE           64      /* SDRAM size in MB */
 207 #define CONFIG_SYS_SDRAM_CFG1           0x43711630
 208 #define CONFIG_SYS_SDRAM_CFG2           0x56670000
 209 #define CONFIG_SYS_SDRAM_CTRL           0xE1092000
 210 #define CONFIG_SYS_SDRAM_EMOD           0x81810000
 211 #define CONFIG_SYS_SDRAM_MODE           0x00CD0000
 212 #define CONFIG_SYS_SDRAM_DRV_STRENGTH   0x00
 213
 214 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE + 0x400
 215 #define CONFIG_SYS_MEMTEST_END          ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
 216
 217 #ifdef CONFIG_CF_SBF
 218 #       define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_TEXT_BASE + 0x400)
 219 #else
 220 #       define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_FLASH_BASE + 0x400)
 221 #endif
 222 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 223 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor */
 224 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* Reserve 128 kB for malloc() */
 225
 226 /* Initial Memory map for Linux */
 227 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 228 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 229
 230 /*
 231  * Configuration for environment
 232  * Environment is not embedded in u-boot. First time runing may have env
 233  * crc error warning if there is no correct environment on the flash.
 234  */
 235 #ifdef CONFIG_CF_SBF
 236 #       define CONFIG_ENV_IS_IN_SPI_FLASH
 237 #       define CONFIG_ENV_SPI_CS        2
 238 #else
 239 #       define CONFIG_ENV_IS_IN_FLASH   1
 240 #endif
 241 #define CONFIG_ENV_OVERWRITE            1
 242
 243 /*-----------------------------------------------------------------------
 244  * FLASH organization
 245  */
 246 #ifdef CONFIG_SYS_STMICRO_BOOT
 247 #       define CONFIG_SYS_FLASH_BASE    CONFIG_SYS_CS0_BASE
 248 #       define CONFIG_SYS_FLASH0_BASE   CONFIG_SYS_CS0_BASE
 249 #       define CONFIG_ENV_OFFSET        0x30000
 250 #       define CONFIG_ENV_SIZE          0x1000
 251 #       define CONFIG_ENV_SECT_SIZE     0x10000
 252 #endif
 253 #ifdef CONFIG_SYS_SPANSION_BOOT
 254 #       define CONFIG_SYS_FLASH_BASE    CONFIG_SYS_CS0_BASE
 255 #       define CONFIG_SYS_FLASH0_BASE   CONFIG_SYS_CS0_BASE
 256 #       define CONFIG_ENV_ADDR          (CONFIG_SYS_FLASH_BASE + 0x40000)
 257 #       define CONFIG_ENV_SIZE          0x1000
 258 #       define CONFIG_ENV_SECT_SIZE     0x8000
 259 #endif
 260
 261 #define CONFIG_SYS_FLASH_CFI
 262 #ifdef CONFIG_SYS_FLASH_CFI
 263 #       define CONFIG_FLASH_CFI_DRIVER  1
 264 #       define CONFIG_SYS_FLASH_USE_BUFFER_WRITE        1
 265 #       define CONFIG_FLASH_SPANSION_S29WS_N    1
 266 #       define CONFIG_SYS_FLASH_SIZE            0x1000000       /* Max size that the board might have */
 267 #       define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
 268 #       define CONFIG_SYS_MAX_FLASH_BANKS       1       /* max number of memory banks */
 269 #       define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 270 #       define CONFIG_SYS_FLASH_PROTECTION      /* "Real" (hardware) sectors protection */
 271 #       define CONFIG_SYS_FLASH_CHECKSUM
 272 #       define CONFIG_SYS_FLASH_BANKS_LIST      { CONFIG_SYS_CS0_BASE }
 273 #endif
 274
 275 /*
 276  * This is setting for JFFS2 support in u-boot.
 277  * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
 278  */
 279 #ifdef CONFIG_CMD_JFFS2
 280 #       define CONFIG_JFFS2_DEV         "nor0"
 281 #       define CONFIG_JFFS2_PART_SIZE   (0x01000000 - 0x40000)
 282 #       define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000)
 283 #endif
 284
 285 /*-----------------------------------------------------------------------
 286  * Cache Configuration
 287  */
 288 #define CONFIG_SYS_CACHELINE_SIZE       16
 289
 290 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 291                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 292 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 293                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 294 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 295 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 296                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 297                                          CF_ACR_EN | CF_ACR_SM_ALL)
 298 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 299                                          CF_CACR_DISD | CF_CACR_INVI | \
 300                                          CF_CACR_CEIB | CF_CACR_DCM | \
 301                                          CF_CACR_EUSP)
 302
 303 /*-----------------------------------------------------------------------
 304  * Memory bank definitions
 305  */
 306 /*
 307  * CS0 - NOR Flash
 308  * CS1 - Available
 309  * CS2 - Available
 310  * CS3 - Available
 311  * CS4 - Available
 312  * CS5 - Available
 313  */
 314
 315 #ifdef CONFIG_CF_SBF
 316 #define CONFIG_SYS_CS0_BASE             0x04000000
 317 #define CONFIG_SYS_CS0_MASK             0x00FF0001
 318 #define CONFIG_SYS_CS0_CTRL             0x00001FA0
 319 #else
 320 #define CONFIG_SYS_CS0_BASE             0x00000000
 321 #define CONFIG_SYS_CS0_MASK             0x00FF0001
 322 #define CONFIG_SYS_CS0_CTRL             0x00001FA0
 323 #endif
 324
 325 #endif                          /* _M52277EVB_H */