drivers/usb_ohci.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * See file CREDITS for list of people who contributed to this
  21  * project.
  22  *
  23  * This program is free software; you can redistribute it and/or
  24  * modify it under the terms of the GNU General Public License as
  25  * published by the Free Software Foundation; either version 2 of
  26  * the License, or (at your option) any later version.
  27  *
  28  * This program is distributed in the hope that it will be useful,
  29  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31  * GNU General Public License for more details.
  32  *
  33  * You should have received a copy of the GNU General Public License
  34  * along with this program; if not, write to the Free Software
  35  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36  * MA 02111-1307 USA
  37  *
  38  */
  39 /*
  40  * IMPORTANT NOTES
  41  * 1 - Read doc/README.generic_usb_ohci
  42  * 2 - this driver is intended for use with USB Mass Storage Devices
  43  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  44  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  45  *     to activate workaround for bug #41 or this driver will NOT work!
  46  */
  47
  48 #include <common.h>
  49
  50 #ifdef CONFIG_USB_OHCI_NEW
  51
  52 #include <asm/byteorder.h>
  53
  54 #if defined(CONFIG_PCI_OHCI)
  55 # include <pci.h>
  56 #endif
  57
  58 #include <malloc.h>
  59 #include <usb.h>
  60 #include "usb_ohci.h"
  61
  62 #if defined(CONFIG_ARM920T) || \
  63     defined(CONFIG_S3C2400) || \
  64     defined(CONFIG_S3C2410) || \
  65     defined(CONFIG_440EP) || \
  66     defined(CONFIG_PCI_OHCI) || \
  67     defined(CONFIG_MPC5200)
  68 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  69 #endif
  70
  71 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  72 #undef DEBUG
  73 #undef SHOW_INFO
  74 #undef OHCI_FILL_TRACE
  75
  76 /* For initializing controller (mask in an HCFS mode too) */
  77 #define OHCI_CONTROL_INIT \
  78         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  79
  80 /*
  81  * e.g. PCI controllers need this
  82  */
  83 #ifdef CFG_OHCI_SWAP_REG_ACCESS
  84 # define readl(a) __swap_32(*((vu_long *)(a)))
  85 # define writel(a, b) (*((vu_long *)(b)) = __swap_32((vu_long)a))
  86 #else
  87 # define readl(a) (*((vu_long *)(a)))
  88 # define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
  89 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
  90
  91 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  92
  93 #ifdef CONFIG_PCI_OHCI
  94 static struct pci_device_id ohci_pci_ids[] = {
  95         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  96         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  97         /* Please add supported PCI OHCI controller ids here */
  98         {0, 0}
  99 };
 100 #endif
 101
 102 #ifdef DEBUG
 103 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
 104 #else
 105 #define dbg(format, arg...) do {} while(0)
 106 #endif /* DEBUG */
 107 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
 108 #undef SHOW_INFO
 109 #ifdef SHOW_INFO
 110 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
 111 #else
 112 #define info(format, arg...) do {} while(0)
 113 #endif
 114
 115 #ifdef CFG_OHCI_BE_CONTROLLER
 116 # define m16_swap(x) cpu_to_be16(x)
 117 # define m32_swap(x) cpu_to_be32(x)
 118 #else
 119 # define m16_swap(x) cpu_to_le16(x)
 120 # define m32_swap(x) cpu_to_le32(x)
 121 #endif /* CFG_OHCI_BE_CONTROLLER */
 122
 123 /* global ohci_t */
 124 static ohci_t gohci;
 125 /* this must be aligned to a 256 byte boundary */
 126 struct ohci_hcca ghcca[1];
 127 /* a pointer to the aligned storage */
 128 struct ohci_hcca *phcca;
 129 /* this allocates EDs for all possible endpoints */
 130 struct ohci_device ohci_dev;
 131 /* RHSC flag */
 132 int got_rhsc;
 133 /* device which was disconnected */
 134 struct usb_device *devgone;
 135
 136 /*-------------------------------------------------------------------------*/
 137
 138 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
 139  * The erratum (#4) description is incorrect.  AMD's workaround waits
 140  * till some bits (mostly reserved) are clear; ok for all revs.
 141  */
 142 #define OHCI_QUIRK_AMD756 0xabcd
 143 #define read_roothub(hc, register, mask) ({ \
 144         u32 temp = readl (&hc->regs->roothub.register); \
 145         if (hc->flags & OHCI_QUIRK_AMD756) \
 146                 while (temp & mask) \
 147                         temp = readl (&hc->regs->roothub.register); \
 148         temp; })
 149
 150 static u32 roothub_a (struct ohci *hc)
 151         { return read_roothub (hc, a, 0xfc0fe000); }
 152 static inline u32 roothub_b (struct ohci *hc)
 153         { return readl (&hc->regs->roothub.b); }
 154 static inline u32 roothub_status (struct ohci *hc)
 155         { return readl (&hc->regs->roothub.status); }
 156 static u32 roothub_portstatus (struct ohci *hc, int i)
 157         { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
 158
 159 /* forward declaration */
 160 static int hc_interrupt (void);
 161 static void
 162 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
 163         int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
 164
 165 /*-------------------------------------------------------------------------*
 166  * URB support functions
 167  *-------------------------------------------------------------------------*/
 168
 169 /* free HCD-private data associated with this URB */
 170
 171 static void urb_free_priv (urb_priv_t * urb)
 172 {
 173         int             i;
 174         int             last;
 175         struct td       * td;
 176
 177         last = urb->length - 1;
 178         if (last >= 0) {
 179                 for (i = 0; i <= last; i++) {
 180                         td = urb->td[i];
 181                         if (td) {
 182                                 td->usb_dev = NULL;
 183                                 urb->td[i] = NULL;
 184                         }
 185                 }
 186         }
 187         free(urb);
 188 }
 189
 190 /*-------------------------------------------------------------------------*/
 191
 192 #ifdef DEBUG
 193 static int sohci_get_current_frame_number (struct usb_device * dev);
 194
 195 /* debug| print the main components of an URB
 196  * small: 0) header + data packets 1) just header */
 197
 198 static void pkt_print (urb_priv_t *purb, struct usb_device * dev,
 199         unsigned long pipe, void * buffer,
 200         int transfer_len, struct devrequest * setup, char * str, int small)
 201 {
 202         dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
 203                         str,
 204                         sohci_get_current_frame_number (dev),
 205                         usb_pipedevice (pipe),
 206                         usb_pipeendpoint (pipe),
 207                         usb_pipeout (pipe)? 'O': 'I',
 208                         usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
 209                                 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
 210                         (purb ? purb->actual_length : 0),
 211                         transfer_len, dev->status);
 212 #ifdef  OHCI_VERBOSE_DEBUG
 213         if (!small) {
 214                 int i, len;
 215
 216                 if (usb_pipecontrol (pipe)) {
 217                         printf (__FILE__ ": cmd(8):");
 218                         for (i = 0; i < 8 ; i++)
 219                                 printf (" %02x", ((__u8 *) setup) [i]);
 220                         printf ("\n");
 221                 }
 222                 if (transfer_len > 0 && buffer) {
 223                         printf (__FILE__ ": data(%d/%d):",
 224                                 (purb ? purb->actual_length : 0),
 225                                 transfer_len);
 226                         len = usb_pipeout (pipe)?
 227                                         transfer_len:
 228                                         (purb ? purb->actual_length : 0);
 229                         for (i = 0; i < 16 && i < len; i++)
 230                                 printf (" %02x", ((__u8 *) buffer) [i]);
 231                         printf ("%s\n", i < len? "...": "");
 232                 }
 233         }
 234 #endif
 235 }
 236
 237 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
 238 void ep_print_int_eds (ohci_t *ohci, char * str) {
 239         int i, j;
 240          __u32 * ed_p;
 241         for (i= 0; i < 32; i++) {
 242                 j = 5;
 243                 ed_p = &(ohci->hcca->int_table [i]);
 244                 if (*ed_p == 0)
 245                     continue;
 246                 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 247                 while (*ed_p != 0 && j--) {
 248                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 249                         printf (" ed: %4x;", ed->hwINFO);
 250                         ed_p = &ed->hwNextED;
 251                 }
 252                 printf ("\n");
 253         }
 254 }
 255
 256 static void ohci_dump_intr_mask (char *label, __u32 mask)
 257 {
 258         dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 259                 label,
 260                 mask,
 261                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 262                 (mask & OHCI_INTR_OC) ? " OC" : "",
 263                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 264                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 265                 (mask & OHCI_INTR_UE) ? " UE" : "",
 266                 (mask & OHCI_INTR_RD) ? " RD" : "",
 267                 (mask & OHCI_INTR_SF) ? " SF" : "",
 268                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 269                 (mask & OHCI_INTR_SO) ? " SO" : ""
 270                 );
 271 }
 272
 273 static void maybe_print_eds (char *label, __u32 value)
 274 {
 275         ed_t *edp = (ed_t *)value;
 276
 277         if (value) {
 278                 dbg ("%s %08x", label, value);
 279                 dbg ("%08x", edp->hwINFO);
 280                 dbg ("%08x", edp->hwTailP);
 281                 dbg ("%08x", edp->hwHeadP);
 282                 dbg ("%08x", edp->hwNextED);
 283         }
 284 }
 285
 286 static char * hcfs2string (int state)
 287 {
 288         switch (state) {
 289                 case OHCI_USB_RESET:    return "reset";
 290                 case OHCI_USB_RESUME:   return "resume";
 291                 case OHCI_USB_OPER:     return "operational";
 292                 case OHCI_USB_SUSPEND:  return "suspend";
 293         }
 294         return "?";
 295 }
 296
 297 /* dump control and status registers */
 298 static void ohci_dump_status (ohci_t *controller)
 299 {
 300         struct ohci_regs        *regs = controller->regs;
 301         __u32                   temp;
 302
 303         temp = readl (&regs->revision) & 0xff;
 304         if (temp != 0x10)
 305                 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
 306
 307         temp = readl (&regs->control);
 308         dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 309                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 310                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 311                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 312                 hcfs2string (temp & OHCI_CTRL_HCFS),
 313                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 314                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 315                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 316                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 317                 temp & OHCI_CTRL_CBSR
 318                 );
 319
 320         temp = readl (&regs->cmdstatus);
 321         dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 322                 (temp & OHCI_SOC) >> 16,
 323                 (temp & OHCI_OCR) ? " OCR" : "",
 324                 (temp & OHCI_BLF) ? " BLF" : "",
 325                 (temp & OHCI_CLF) ? " CLF" : "",
 326                 (temp & OHCI_HCR) ? " HCR" : ""
 327                 );
 328
 329         ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
 330         ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
 331
 332         maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
 333
 334         maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
 335         maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
 336
 337         maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
 338         maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
 339
 340         maybe_print_eds ("donehead", readl (&regs->donehead));
 341 }
 342
 343 static void ohci_dump_roothub (ohci_t *controller, int verbose)
 344 {
 345         __u32                   temp, ndp, i;
 346
 347         temp = roothub_a (controller);
 348         ndp = (temp & RH_A_NDP);
 349 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 350         ndp = (ndp == 2) ? 1:0;
 351 #endif
 352         if (verbose) {
 353                 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 354                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 355                         (temp & RH_A_NOCP) ? " NOCP" : "",
 356                         (temp & RH_A_OCPM) ? " OCPM" : "",
 357                         (temp & RH_A_DT) ? " DT" : "",
 358                         (temp & RH_A_NPS) ? " NPS" : "",
 359                         (temp & RH_A_PSM) ? " PSM" : "",
 360                         ndp
 361                         );
 362                 temp = roothub_b (controller);
 363                 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
 364                         temp,
 365                         (temp & RH_B_PPCM) >> 16,
 366                         (temp & RH_B_DR)
 367                         );
 368                 temp = roothub_status (controller);
 369                 dbg ("roothub.status: %08x%s%s%s%s%s%s",
 370                         temp,
 371                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 372                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 373                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 374                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 375                         (temp & RH_HS_OCI) ? " OCI" : "",
 376                         (temp & RH_HS_LPS) ? " LPS" : ""
 377                         );
 378         }
 379
 380         for (i = 0; i < ndp; i++) {
 381                 temp = roothub_portstatus (controller, i);
 382                 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 383                         i,
 384                         temp,
 385                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 386                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 387                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 388                         (temp & RH_PS_PESC) ? " PESC" : "",
 389                         (temp & RH_PS_CSC) ? " CSC" : "",
 390
 391                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 392                         (temp & RH_PS_PPS) ? " PPS" : "",
 393                         (temp & RH_PS_PRS) ? " PRS" : "",
 394                         (temp & RH_PS_POCI) ? " POCI" : "",
 395                         (temp & RH_PS_PSS) ? " PSS" : "",
 396
 397                         (temp & RH_PS_PES) ? " PES" : "",
 398                         (temp & RH_PS_CCS) ? " CCS" : ""
 399                         );
 400         }
 401 }
 402
 403 static void ohci_dump (ohci_t *controller, int verbose)
 404 {
 405         dbg ("OHCI controller usb-%s state", controller->slot_name);
 406
 407         /* dumps some of the state we know about */
 408         ohci_dump_status (controller);
 409         if (verbose)
 410                 ep_print_int_eds (controller, "hcca");
 411         dbg ("hcca frame #%04x", controller->hcca->frame_no);
 412         ohci_dump_roothub (controller, 1);
 413
 414 #endif /* DEBUG */
 415
 416 /*-------------------------------------------------------------------------*
 417  * Interface functions (URB)
 418  *-------------------------------------------------------------------------*/
 419
 420 /* get a transfer request */
 421
 422 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
 423 {
 424         ohci_t *ohci;
 425         ed_t * ed;
 426         urb_priv_t *purb_priv = urb;
 427         int i, size = 0;
 428         struct usb_device *dev = urb->dev;
 429         unsigned long pipe = urb->pipe;
 430         void *buffer = urb->transfer_buffer;
 431         int transfer_len = urb->transfer_buffer_length;
 432         int interval = urb->interval;
 433
 434         ohci = &gohci;
 435
 436         /* when controller's hung, permit only roothub cleanup attempts
 437          * such as powering down ports */
 438         if (ohci->disabled) {
 439                 err("sohci_submit_job: EPIPE");
 440                 return -1;
 441         }
 442
 443         /* we're about to begin a new transaction here so mark the URB unfinished */
 444         urb->finished = 0;
 445
 446         /* every endpoint has a ed, locate and fill it */
 447         if (!(ed = ep_add_ed (dev, pipe, interval, 1))) {
 448                 err("sohci_submit_job: ENOMEM");
 449                 return -1;
 450         }
 451
 452         /* for the private part of the URB we need the number of TDs (size) */
 453         switch (usb_pipetype (pipe)) {
 454                 case PIPE_BULK: /* one TD for every 4096 Byte */
 455                         size = (transfer_len - 1) / 4096 + 1;
 456                         break;
 457                 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 458                         size = (transfer_len == 0)? 2:
 459                                                 (transfer_len - 1) / 4096 + 3;
 460                         break;
 461                 case PIPE_INTERRUPT: /* 1 TD */
 462                         size = 1;
 463                         break;
 464         }
 465
 466         ed->purb = urb;
 467
 468         if (size >= (N_URB_TD - 1)) {
 469                 err("need %d TDs, only have %d", size, N_URB_TD);
 470                 return -1;
 471         }
 472         purb_priv->pipe = pipe;
 473
 474         /* fill the private part of the URB */
 475         purb_priv->length = size;
 476         purb_priv->ed = ed;
 477         purb_priv->actual_length = 0;
 478
 479         /* allocate the TDs */
 480         /* note that td[0] was allocated in ep_add_ed */
 481         for (i = 0; i < size; i++) {
 482                 purb_priv->td[i] = td_alloc (dev);
 483                 if (!purb_priv->td[i]) {
 484                         purb_priv->length = i;
 485                         urb_free_priv (purb_priv);
 486                         err("sohci_submit_job: ENOMEM");
 487                         return -1;
 488                 }
 489         }
 490
 491         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 492                 urb_free_priv (purb_priv);
 493                 err("sohci_submit_job: EINVAL");
 494                 return -1;
 495         }
 496
 497         /* link the ed into a chain if is not already */
 498         if (ed->state != ED_OPER)
 499                 ep_link (ohci, ed);
 500
 501         /* fill the TDs and link it to the ed */
 502         td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
 503
 504         return 0;
 505 }
 506
 507 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 508 {
 509         struct ohci_regs *regs = hc->regs;
 510
 511         switch (usb_pipetype (urb->pipe)) {
 512         case PIPE_INTERRUPT:
 513                 /* implicitly requeued */
 514                 if (urb->dev->irq_handle &&
 515                                 (urb->dev->irq_act_len = urb->actual_length)) {
 516                         writel (OHCI_INTR_WDH, &regs->intrenable);
 517                         readl (&regs->intrenable); /* PCI posting flush */
 518                         urb->dev->irq_handle(urb->dev);
 519                         writel (OHCI_INTR_WDH, &regs->intrdisable);
 520                         readl (&regs->intrdisable); /* PCI posting flush */
 521                 }
 522                 urb->actual_length = 0;
 523                 td_submit_job (
 524                                 urb->dev,
 525                                 urb->pipe,
 526                                 urb->transfer_buffer,
 527                                 urb->transfer_buffer_length,
 528                                 NULL,
 529                                 urb,
 530                                 urb->interval);
 531                 break;
 532         case PIPE_CONTROL:
 533         case PIPE_BULK:
 534                 break;
 535         default:
 536                 return 0;
 537         }
 538         return 1;
 539 }
 540
 541 /*-------------------------------------------------------------------------*/
 542
 543 #ifdef DEBUG
 544 /* tell us the current USB frame number */
 545
 546 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
 547 {
 548         ohci_t *ohci = &gohci;
 549
 550         return m16_swap (ohci->hcca->frame_no);
 551 }
 552 #endif
 553
 554 /*-------------------------------------------------------------------------*
 555  * ED handling functions
 556  *-------------------------------------------------------------------------*/
 557
 558 /* search for the right branch to insert an interrupt ed into the int tree
 559  * do some load ballancing;
 560  * returns the branch and
 561  * sets the interval to interval = 2^integer (ld (interval)) */
 562
 563 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
 564 {
 565         int i, branch = 0;
 566
 567         /* search for the least loaded interrupt endpoint
 568          * branch of all 32 branches
 569          */
 570         for (i = 0; i < 32; i++)
 571                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 572                         branch = i;
 573
 574         branch = branch % interval;
 575         for (i = branch; i < 32; i += interval)
 576                 ohci->ohci_int_load [i] += load;
 577
 578         return branch;
 579 }
 580
 581 /*-------------------------------------------------------------------------*/
 582
 583 /*  2^int( ld (inter)) */
 584
 585 static int ep_2_n_interval (int inter)
 586 {
 587         int i;
 588         for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
 589         return 1 << i;
 590 }
 591
 592 /*-------------------------------------------------------------------------*/
 593
 594 /* the int tree is a binary tree
 595  * in order to process it sequentially the indexes of the branches have to be mapped
 596  * the mapping reverses the bits of a word of num_bits length */
 597
 598 static int ep_rev (int num_bits, int word)
 599 {
 600         int i, wout = 0;
 601
 602         for (i = 0; i < num_bits; i++)
 603                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 604         return wout;
 605 }
 606
 607 /*-------------------------------------------------------------------------*
 608  * ED handling functions
 609  *-------------------------------------------------------------------------*/
 610
 611 /* link an ed into one of the HC chains */
 612
 613 static int ep_link (ohci_t *ohci, ed_t *edi)
 614 {
 615         volatile ed_t *ed = edi;
 616         int int_branch;
 617         int i;
 618         int inter;
 619         int interval;
 620         int load;
 621         __u32 * ed_p;
 622
 623         ed->state = ED_OPER;
 624         ed->int_interval = 0;
 625
 626         switch (ed->type) {
 627         case PIPE_CONTROL:
 628                 ed->hwNextED = 0;
 629                 if (ohci->ed_controltail == NULL) {
 630                         writel (ed, &ohci->regs->ed_controlhead);
 631                 } else {
 632                         ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
 633                 }
 634                 ed->ed_prev = ohci->ed_controltail;
 635                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 636                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 637                         ohci->hc_control |= OHCI_CTRL_CLE;
 638                         writel (ohci->hc_control, &ohci->regs->control);
 639                 }
 640                 ohci->ed_controltail = edi;
 641                 break;
 642
 643         case PIPE_BULK:
 644                 ed->hwNextED = 0;
 645                 if (ohci->ed_bulktail == NULL) {
 646                         writel (ed, &ohci->regs->ed_bulkhead);
 647                 } else {
 648                         ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
 649                 }
 650                 ed->ed_prev = ohci->ed_bulktail;
 651                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 652                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 653                         ohci->hc_control |= OHCI_CTRL_BLE;
 654                         writel (ohci->hc_control, &ohci->regs->control);
 655                 }
 656                 ohci->ed_bulktail = edi;
 657                 break;
 658
 659         case PIPE_INTERRUPT:
 660                 load = ed->int_load;
 661                 interval = ep_2_n_interval (ed->int_period);
 662                 ed->int_interval = interval;
 663                 int_branch = ep_int_ballance (ohci, interval, load);
 664                 ed->int_branch = int_branch;
 665
 666                 for (i = 0; i < ep_rev (6, interval); i += inter) {
 667                         inter = 1;
 668                         for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
 669                                 (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
 670                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 671                                         inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
 672                         ed->hwNextED = *ed_p;
 673                         *ed_p = m32_swap((unsigned long)ed);
 674                 }
 675                 break;
 676         }
 677         return 0;
 678 }
 679
 680 /*-------------------------------------------------------------------------*/
 681
 682 /* scan the periodic table to find and unlink this ED */
 683 static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
 684                 unsigned index, unsigned period)
 685 {
 686         for (; index < NUM_INTS; index += period) {
 687                 __u32   *ed_p = &ohci->hcca->int_table [index];
 688
 689                 /* ED might have been unlinked through another path */
 690                 while (*ed_p != 0) {
 691                         if (((struct ed *)m32_swap ((unsigned long)ed_p)) == ed) {
 692                                 *ed_p = ed->hwNextED;
 693                                 break;
 694                         }
 695                         ed_p = & (((struct ed *)m32_swap ((unsigned long)ed_p))->hwNextED);
 696                 }
 697         }
 698 }
 699
 700 /* unlink an ed from one of the HC chains.
 701  * just the link to the ed is unlinked.
 702  * the link from the ed still points to another operational ed or 0
 703  * so the HC can eventually finish the processing of the unlinked ed */
 704
 705 static int ep_unlink (ohci_t *ohci, ed_t *edi)
 706 {
 707         volatile ed_t *ed = edi;
 708         int i;
 709
 710         ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
 711
 712         switch (ed->type) {
 713         case PIPE_CONTROL:
 714                 if (ed->ed_prev == NULL) {
 715                         if (!ed->hwNextED) {
 716                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 717                                 writel (ohci->hc_control, &ohci->regs->control);
 718                         }
 719                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
 720                 } else {
 721                         ed->ed_prev->hwNextED = ed->hwNextED;
 722                 }
 723                 if (ohci->ed_controltail == ed) {
 724                         ohci->ed_controltail = ed->ed_prev;
 725                 } else {
 726                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 727                 }
 728                 break;
 729
 730         case PIPE_BULK:
 731                 if (ed->ed_prev == NULL) {
 732                         if (!ed->hwNextED) {
 733                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 734                                 writel (ohci->hc_control, &ohci->regs->control);
 735                         }
 736                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
 737                 } else {
 738                         ed->ed_prev->hwNextED = ed->hwNextED;
 739                 }
 740                 if (ohci->ed_bulktail == ed) {
 741                         ohci->ed_bulktail = ed->ed_prev;
 742                 } else {
 743                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 744                 }
 745                 break;
 746
 747         case PIPE_INTERRUPT:
 748                 periodic_unlink (ohci, ed, 0, 1);
 749                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 750                     ohci->ohci_int_load[i] -= ed->int_load;
 751                 break;
 752         }
 753         ed->state = ED_UNLINK;
 754         return 0;
 755 }
 756
 757 /*-------------------------------------------------------------------------*/
 758
 759 /* add/reinit an endpoint; this should be done once at the
 760  * usb_set_configuration command, but the USB stack is a little bit
 761  * stateless so we do it at every transaction if the state of the ed
 762  * is ED_NEW then a dummy td is added and the state is changed to
 763  * ED_UNLINK in all other cases the state is left unchanged the ed
 764  * info fields are setted anyway even though most of them should not
 765  * change
 766  */
 767 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe,
 768                 int interval, int load)
 769 {
 770         td_t *td;
 771         ed_t *ed_ret;
 772         volatile ed_t *ed;
 773
 774         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
 775                         (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
 776
 777         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 778                 err("ep_add_ed: pending delete");
 779                 /* pending delete request */
 780                 return NULL;
 781         }
 782
 783         if (ed->state == ED_NEW) {
 784                 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
 785                 /* dummy td; end of td list for ed */
 786                 td = td_alloc (usb_dev);
 787                 ed->hwTailP = m32_swap ((unsigned long)td);
 788                 ed->hwHeadP = ed->hwTailP;
 789                 ed->state = ED_UNLINK;
 790                 ed->type = usb_pipetype (pipe);
 791                 ohci_dev.ed_cnt++;
 792         }
 793
 794         ed->hwINFO = m32_swap (usb_pipedevice (pipe)
 795                         | usb_pipeendpoint (pipe) << 7
 796                         | (usb_pipeisoc (pipe)? 0x8000: 0)
 797                         | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
 798                         | usb_pipeslow (pipe) << 13
 799                         | usb_maxpacket (usb_dev, pipe) << 16);
 800
 801         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 802                 ed->int_period = interval;
 803                 ed->int_load = load;
 804         }
 805
 806         return ed_ret;
 807 }
 808
 809 /*-------------------------------------------------------------------------*
 810  * TD handling functions
 811  *-------------------------------------------------------------------------*/
 812
 813 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 814
 815 static void td_fill (ohci_t *ohci, unsigned int info,
 816         void *data, int len,
 817         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 818 {
 819         volatile td_t  *td, *td_pt;
 820 #ifdef OHCI_FILL_TRACE
 821         int i;
 822 #endif
 823
 824         if (index > urb_priv->length) {
 825                 err("index > length");
 826                 return;
 827         }
 828         /* use this td as the next dummy */
 829         td_pt = urb_priv->td [index];
 830         td_pt->hwNextTD = 0;
 831
 832         /* fill the old dummy TD */
 833         td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
 834
 835         td->ed = urb_priv->ed;
 836         td->next_dl_td = NULL;
 837         td->index = index;
 838         td->data = (__u32)data;
 839 #ifdef OHCI_FILL_TRACE
 840         if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
 841                 for (i = 0; i < len; i++)
 842                 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
 843                 printf("\n");
 844         }
 845 #endif
 846         if (!len)
 847                 data = 0;
 848
 849         td->hwINFO = m32_swap (info);
 850         td->hwCBP = m32_swap ((unsigned long)data);
 851         if (data)
 852                 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
 853         else
 854                 td->hwBE = 0;
 855         td->hwNextTD = m32_swap ((unsigned long)td_pt);
 856
 857         /* append to queue */
 858         td->ed->hwTailP = td->hwNextTD;
 859 }
 860
 861 /*-------------------------------------------------------------------------*/
 862
 863 /* prepare all TDs of a transfer */
 864
 865 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
 866         int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
 867 {
 868         ohci_t *ohci = &gohci;
 869         int data_len = transfer_len;
 870         void *data;
 871         int cnt = 0;
 872         __u32 info = 0;
 873         unsigned int toggle = 0;
 874
 875         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
 876         if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 877                 toggle = TD_T_TOGGLE;
 878         } else {
 879                 toggle = TD_T_DATA0;
 880                 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
 881         }
 882         urb->td_cnt = 0;
 883         if (data_len)
 884                 data = buffer;
 885         else
 886                 data = 0;
 887
 888         switch (usb_pipetype (pipe)) {
 889         case PIPE_BULK:
 890                 info = usb_pipeout (pipe)?
 891                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 892                 while(data_len > 4096) {
 893                         td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
 894                         data += 4096; data_len -= 4096; cnt++;
 895                 }
 896                 info = usb_pipeout (pipe)?
 897                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 898                 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
 899                 cnt++;
 900
 901                 if (!ohci->sleeping)
 902                         writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
 903                 break;
 904
 905         case PIPE_CONTROL:
 906                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 907                 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
 908                 if (data_len > 0) {
 909                         info = usb_pipeout (pipe)?
 910                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 911                         /* NOTE:  mishandles transfers >8K, some >4K */
 912                         td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 913                 }
 914                 info = usb_pipeout (pipe)?
 915                         TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
 916                 td_fill (ohci, info, data, 0, dev, cnt++, urb);
 917                 if (!ohci->sleeping)
 918                         writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
 919                 break;
 920
 921         case PIPE_INTERRUPT:
 922                 info = usb_pipeout (urb->pipe)?
 923                         TD_CC | TD_DP_OUT | toggle:
 924                         TD_CC | TD_R | TD_DP_IN | toggle;
 925                 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 926                 break;
 927         }
 928         if (urb->length != cnt)
 929                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 930 }
 931
 932 /*-------------------------------------------------------------------------*
 933  * Done List handling functions
 934  *-------------------------------------------------------------------------*/
 935
 936 /* calculate the transfer length and update the urb */
 937
 938 static void dl_transfer_length(td_t * td)
 939 {
 940         __u32 tdINFO, tdBE, tdCBP;
 941         urb_priv_t *lurb_priv = td->ed->purb;
 942
 943         tdINFO = m32_swap (td->hwINFO);
 944         tdBE   = m32_swap (td->hwBE);
 945         tdCBP  = m32_swap (td->hwCBP);
 946
 947         if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
 948             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 949                 if (tdBE != 0) {
 950                         if (td->hwCBP == 0)
 951                                 lurb_priv->actual_length += tdBE - td->data + 1;
 952                         else
 953                                 lurb_priv->actual_length += tdCBP - td->data;
 954                 }
 955         }
 956 }
 957
 958 /*-------------------------------------------------------------------------*/
 959
 960 /* replies to the request have to be on a FIFO basis so
 961  * we reverse the reversed done-list */
 962
 963 static td_t * dl_reverse_done_list (ohci_t *ohci)
 964 {
 965         __u32 td_list_hc;
 966         td_t *td_rev = NULL;
 967         td_t *td_list = NULL;
 968         urb_priv_t *lurb_priv = NULL;
 969
 970         td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
 971         ohci->hcca->done_head = 0;
 972
 973         while (td_list_hc) {
 974                 td_list = (td_t *)td_list_hc;
 975
 976                 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
 977                         lurb_priv = td_list->ed->purb;
 978                         dbg(" USB-error/status: %x : %p",
 979                                         TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
 980                         if (td_list->ed->hwHeadP & m32_swap (0x1)) {
 981                                 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
 982                                         td_list->ed->hwHeadP =
 983                                                 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
 984                                                                         (td_list->ed->hwHeadP & m32_swap (0x2));
 985                                         lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
 986                                 } else
 987                                         td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
 988                         }
 989 #ifdef CONFIG_MPC5200
 990                         td_list->hwNextTD = 0;
 991 #endif
 992                 }
 993
 994                 td_list->next_dl_td = td_rev;
 995                 td_rev = td_list;
 996                 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
 997         }
 998         return td_list;
 999 }
1000
1001 /*-------------------------------------------------------------------------*/
1002
1003 /* td done list */
1004 static int dl_done_list (ohci_t *ohci, td_t *td_list)
1005 {
1006         td_t *td_list_next = NULL;
1007         ed_t *ed;
1008         int cc = 0;
1009         int stat = 0;
1010         /* urb_t *urb; */
1011         urb_priv_t *lurb_priv;
1012         __u32 tdINFO, edHeadP, edTailP;
1013
1014         while (td_list) {
1015                 td_list_next = td_list->next_dl_td;
1016
1017                 tdINFO = m32_swap (td_list->hwINFO);
1018
1019                 ed = td_list->ed;
1020                 lurb_priv = ed->purb;
1021
1022                 dl_transfer_length(td_list);
1023
1024                 /* error code of transfer */
1025                 cc = TD_CC_GET (tdINFO);
1026                 if (cc != 0) {
1027                         dbg("ConditionCode %#x", cc);
1028                         stat = cc_to_error[cc];
1029                 }
1030
1031                 /* see if this done list makes for all TD's of current URB,
1032                  * and mark the URB finished if so */
1033                 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
1034 #if 1
1035                         if ((ed->state & (ED_OPER | ED_UNLINK)) &&
1036                             (lurb_priv->state != URB_DEL))
1037 #else
1038                         if ((ed->state & (ED_OPER | ED_UNLINK)))
1039 #endif
1040                                 lurb_priv->finished = sohci_return_job(ohci,
1041                                                 lurb_priv);
1042                         else
1043                                 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
1044                 } else
1045                         dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
1046                                 lurb_priv->length);
1047                 if (ed->state != ED_NEW &&
1048                           (usb_pipetype (lurb_priv->pipe) != PIPE_INTERRUPT)) {
1049                         edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
1050                         edTailP = m32_swap (ed->hwTailP);
1051
1052                         /* unlink eds if they are not busy */
1053                         if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1054                                 ep_unlink (ohci, ed);
1055                 }
1056
1057                 td_list = td_list_next;
1058         }
1059         return stat;
1060 }
1061
1062 /*-------------------------------------------------------------------------*
1063  * Virtual Root Hub
1064  *-------------------------------------------------------------------------*/
1065
1066 /* Device descriptor */
1067 static __u8 root_hub_dev_des[] =
1068 {
1069         0x12,       /*  __u8  bLength; */
1070         0x01,       /*  __u8  bDescriptorType; Device */
1071         0x10,       /*  __u16 bcdUSB; v1.1 */
1072         0x01,
1073         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1074         0x00,       /*  __u8  bDeviceSubClass; */
1075         0x00,       /*  __u8  bDeviceProtocol; */
1076         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1077         0x00,       /*  __u16 idVendor; */
1078         0x00,
1079         0x00,       /*  __u16 idProduct; */
1080         0x00,
1081         0x00,       /*  __u16 bcdDevice; */
1082         0x00,
1083         0x00,       /*  __u8  iManufacturer; */
1084         0x01,       /*  __u8  iProduct; */
1085         0x00,       /*  __u8  iSerialNumber; */
1086         0x01        /*  __u8  bNumConfigurations; */
1087 };
1088
1089 /* Configuration descriptor */
1090 static __u8 root_hub_config_des[] =
1091 {
1092         0x09,       /*  __u8  bLength; */
1093         0x02,       /*  __u8  bDescriptorType; Configuration */
1094         0x19,       /*  __u16 wTotalLength; */
1095         0x00,
1096         0x01,       /*  __u8  bNumInterfaces; */
1097         0x01,       /*  __u8  bConfigurationValue; */
1098         0x00,       /*  __u8  iConfiguration; */
1099         0x40,       /*  __u8  bmAttributes;
1100                  Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1101         0x00,       /*  __u8  MaxPower; */
1102
1103         /* interface */
1104         0x09,       /*  __u8  if_bLength; */
1105         0x04,       /*  __u8  if_bDescriptorType; Interface */
1106         0x00,       /*  __u8  if_bInterfaceNumber; */
1107         0x00,       /*  __u8  if_bAlternateSetting; */
1108         0x01,       /*  __u8  if_bNumEndpoints; */
1109         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1110         0x00,       /*  __u8  if_bInterfaceSubClass; */
1111         0x00,       /*  __u8  if_bInterfaceProtocol; */
1112         0x00,       /*  __u8  if_iInterface; */
1113
1114         /* endpoint */
1115         0x07,       /*  __u8  ep_bLength; */
1116         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1117         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1118         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1119         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1120         0x00,
1121         0xff        /*  __u8  ep_bInterval; 255 ms */
1122 };
1123
1124 static unsigned char root_hub_str_index0[] =
1125 {
1126         0x04,                   /*  __u8  bLength; */
1127         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1128         0x09,                   /*  __u8  lang ID */
1129         0x04,                   /*  __u8  lang ID */
1130 };
1131
1132 static unsigned char root_hub_str_index1[] =
1133 {
1134         28,                     /*  __u8  bLength; */
1135         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1136         'O',                    /*  __u8  Unicode */
1137         0,                              /*  __u8  Unicode */
1138         'H',                    /*  __u8  Unicode */
1139         0,                              /*  __u8  Unicode */
1140         'C',                    /*  __u8  Unicode */
1141         0,                              /*  __u8  Unicode */
1142         'I',                    /*  __u8  Unicode */
1143         0,                              /*  __u8  Unicode */
1144         ' ',                    /*  __u8  Unicode */
1145         0,                              /*  __u8  Unicode */
1146         'R',                    /*  __u8  Unicode */
1147         0,                              /*  __u8  Unicode */
1148         'o',                    /*  __u8  Unicode */
1149         0,                              /*  __u8  Unicode */
1150         'o',                    /*  __u8  Unicode */
1151         0,                              /*  __u8  Unicode */
1152         't',                    /*  __u8  Unicode */
1153         0,                              /*  __u8  Unicode */
1154         ' ',                    /*  __u8  Unicode */
1155         0,                              /*  __u8  Unicode */
1156         'H',                    /*  __u8  Unicode */
1157         0,                              /*  __u8  Unicode */
1158         'u',                    /*  __u8  Unicode */
1159         0,                              /*  __u8  Unicode */
1160         'b',                    /*  __u8  Unicode */
1161         0,                              /*  __u8  Unicode */
1162 };
1163
1164 /* Hub class-specific descriptor is constructed dynamically */
1165
1166 /*-------------------------------------------------------------------------*/
1167
1168 #define OK(x)                   len = (x); break
1169 #ifdef DEBUG
1170 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1171 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1172 #else
1173 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
1174 #define WR_RH_PORTSTAT(x)       writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1175 #endif
1176 #define RD_RH_STAT              roothub_status(&gohci)
1177 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci,wIndex-1)
1178
1179 /* request to virtual root hub */
1180
1181 int rh_check_port_status(ohci_t *controller)
1182 {
1183         __u32 temp, ndp, i;
1184         int res;
1185
1186         res = -1;
1187         temp = roothub_a (controller);
1188         ndp = (temp & RH_A_NDP);
1189 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1190         ndp = (ndp == 2) ? 1:0;
1191 #endif
1192         for (i = 0; i < ndp; i++) {
1193                 temp = roothub_portstatus (controller, i);
1194                 /* check for a device disconnect */
1195                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1196                         (RH_PS_PESC | RH_PS_CSC)) &&
1197                         ((temp & RH_PS_CCS) == 0)) {
1198                         res = i;
1199                         break;
1200                 }
1201         }
1202         return res;
1203 }
1204
1205 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1206                 void *buffer, int transfer_len, struct devrequest *cmd)
1207 {
1208         void * data = buffer;
1209         int leni = transfer_len;
1210         int len = 0;
1211         int stat = 0;
1212         __u32 datab[4];
1213         __u8 *data_buf = (__u8 *)datab;
1214         __u16 bmRType_bReq;
1215         __u16 wValue;
1216         __u16 wIndex;
1217         __u16 wLength;
1218
1219 #ifdef DEBUG
1220 pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1221 #else
1222         wait_ms(1);
1223 #endif
1224         if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1225                 info("Root-Hub submit IRQ: NOT implemented");
1226                 return 0;
1227         }
1228
1229         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1230         wValue        = cpu_to_le16 (cmd->value);
1231         wIndex        = cpu_to_le16 (cmd->index);
1232         wLength       = cpu_to_le16 (cmd->length);
1233
1234         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1235                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1236
1237         switch (bmRType_bReq) {
1238         /* Request Destination:
1239            without flags: Device,
1240            RH_INTERFACE: interface,
1241            RH_ENDPOINT: endpoint,
1242            RH_CLASS means HUB here,
1243            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1244         */
1245
1246         case RH_GET_STATUS:
1247                         *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1248         case RH_GET_STATUS | RH_INTERFACE:
1249                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1250         case RH_GET_STATUS | RH_ENDPOINT:
1251                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1252         case RH_GET_STATUS | RH_CLASS:
1253                         *(__u32 *) data_buf = cpu_to_le32 (
1254                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1255                         OK (4);
1256         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1257                         *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1258
1259         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1260                 switch (wValue) {
1261                         case (RH_ENDPOINT_STALL): OK (0);
1262                 }
1263                 break;
1264
1265         case RH_CLEAR_FEATURE | RH_CLASS:
1266                 switch (wValue) {
1267                         case RH_C_HUB_LOCAL_POWER:
1268                                 OK(0);
1269                         case (RH_C_HUB_OVER_CURRENT):
1270                                         WR_RH_STAT(RH_HS_OCIC); OK (0);
1271                 }
1272                 break;
1273
1274         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1275                 switch (wValue) {
1276                         case (RH_PORT_ENABLE):
1277                                         WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1278                         case (RH_PORT_SUSPEND):
1279                                         WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1280                         case (RH_PORT_POWER):
1281                                         WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1282                         case (RH_C_PORT_CONNECTION):
1283                                         WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1284                         case (RH_C_PORT_ENABLE):
1285                                         WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1286                         case (RH_C_PORT_SUSPEND):
1287                                         WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1288                         case (RH_C_PORT_OVER_CURRENT):
1289                                         WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1290                         case (RH_C_PORT_RESET):
1291                                         WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1292                 }
1293                 break;
1294
1295         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1296                 switch (wValue) {
1297                         case (RH_PORT_SUSPEND):
1298                                         WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1299                         case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1300                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1301                                             WR_RH_PORTSTAT (RH_PS_PRS);
1302                                         OK (0);
1303                         case (RH_PORT_POWER):
1304                                         WR_RH_PORTSTAT (RH_PS_PPS );
1305                                         wait_ms(100);
1306                                         OK (0);
1307                         case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1308                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1309                                             WR_RH_PORTSTAT (RH_PS_PES );
1310                                         OK (0);
1311                 }
1312                 break;
1313
1314         case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1315
1316         case RH_GET_DESCRIPTOR:
1317                 switch ((wValue & 0xff00) >> 8) {
1318                         case (0x01): /* device descriptor */
1319                                 len = min_t(unsigned int,
1320                                           leni,
1321                                           min_t(unsigned int,
1322                                               sizeof (root_hub_dev_des),
1323                                               wLength));
1324                                 data_buf = root_hub_dev_des; OK(len);
1325                         case (0x02): /* configuration descriptor */
1326                                 len = min_t(unsigned int,
1327                                           leni,
1328                                           min_t(unsigned int,
1329                                               sizeof (root_hub_config_des),
1330                                               wLength));
1331                                 data_buf = root_hub_config_des; OK(len);
1332                         case (0x03): /* string descriptors */
1333                                 if(wValue==0x0300) {
1334                                         len = min_t(unsigned int,
1335                                                   leni,
1336                                                   min_t(unsigned int,
1337                                                       sizeof (root_hub_str_index0),
1338                                                       wLength));
1339                                         data_buf = root_hub_str_index0;
1340                                         OK(len);
1341                                 }
1342                                 if(wValue==0x0301) {
1343                                         len = min_t(unsigned int,
1344                                                   leni,
1345                                                   min_t(unsigned int,
1346                                                       sizeof (root_hub_str_index1),
1347                                                       wLength));
1348                                         data_buf = root_hub_str_index1;
1349                                         OK(len);
1350                         }
1351                         default:
1352                                 stat = USB_ST_STALLED;
1353                 }
1354                 break;
1355
1356         case RH_GET_DESCRIPTOR | RH_CLASS:
1357         {
1358                 __u32 temp = roothub_a (&gohci);
1359
1360                 data_buf [0] = 9;               /* min length; */
1361                 data_buf [1] = 0x29;
1362                 data_buf [2] = temp & RH_A_NDP;
1363 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1364                 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1365 #endif
1366                 data_buf [3] = 0;
1367                 if (temp & RH_A_PSM)    /* per-port power switching? */
1368                         data_buf [3] |= 0x1;
1369                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1370                         data_buf [3] |= 0x10;
1371                 else if (temp & RH_A_OCPM)      /* per-port overcurrent reporting? */
1372                         data_buf [3] |= 0x8;
1373
1374                 /* corresponds to data_buf[4-7] */
1375                 datab [1] = 0;
1376                 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1377                 temp = roothub_b (&gohci);
1378                 data_buf [7] = temp & RH_B_DR;
1379                 if (data_buf [2] < 7) {
1380                         data_buf [8] = 0xff;
1381                 } else {
1382                         data_buf [0] += 2;
1383                         data_buf [8] = (temp & RH_B_DR) >> 8;
1384                         data_buf [10] = data_buf [9] = 0xff;
1385                 }
1386
1387                 len = min_t(unsigned int, leni,
1388                             min_t(unsigned int, data_buf [0], wLength));
1389                 OK (len);
1390         }
1391
1392         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK (1);
1393
1394         case RH_SET_CONFIGURATION:      WR_RH_STAT (0x10000); OK (0);
1395
1396         default:
1397                 dbg ("unsupported root hub command");
1398                 stat = USB_ST_STALLED;
1399         }
1400
1401 #ifdef  DEBUG
1402         ohci_dump_roothub (&gohci, 1);
1403 #else
1404         wait_ms(1);
1405 #endif
1406
1407         len = min_t(int, len, leni);
1408         if (data != data_buf)
1409             memcpy (data, data_buf, len);
1410         dev->act_len = len;
1411         dev->status = stat;
1412
1413 #ifdef DEBUG
1414         pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1415 #else
1416         wait_ms(1);
1417 #endif
1418
1419         return stat;
1420 }
1421
1422 /*-------------------------------------------------------------------------*/
1423
1424 /* common code for handling submit messages - used for all but root hub */
1425 /* accesses. */
1426 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1427                 int transfer_len, struct devrequest *setup, int interval)
1428 {
1429         int stat = 0;
1430         int maxsize = usb_maxpacket(dev, pipe);
1431         int timeout;
1432         urb_priv_t *urb;
1433
1434         urb = malloc(sizeof(urb_priv_t));
1435         memset(urb, 0, sizeof(urb_priv_t));
1436
1437         urb->dev = dev;
1438         urb->pipe = pipe;
1439         urb->transfer_buffer = buffer;
1440         urb->transfer_buffer_length = transfer_len;
1441         urb->interval = interval;
1442
1443         /* device pulled? Shortcut the action. */
1444         if (devgone == dev) {
1445                 dev->status = USB_ST_CRC_ERR;
1446                 return 0;
1447         }
1448
1449 #ifdef DEBUG
1450         urb->actual_length = 0;
1451         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1452 #else
1453         wait_ms(1);
1454 #endif
1455         if (!maxsize) {
1456                 err("submit_common_message: pipesize for pipe %lx is zero",
1457                         pipe);
1458                 return -1;
1459         }
1460
1461         if (sohci_submit_job(urb, setup) < 0) {
1462                 err("sohci_submit_job failed");
1463                 return -1;
1464         }
1465
1466 #if 0
1467         wait_ms(10);
1468         /* ohci_dump_status(&gohci); */
1469 #endif
1470
1471         /* allow more time for a BULK device to react - some are slow */
1472 #define BULK_TO  5000   /* timeout in milliseconds */
1473         if (usb_pipetype (pipe) == PIPE_BULK)
1474                 timeout = BULK_TO;
1475         else
1476                 timeout = 100;
1477
1478         /* wait for it to complete */
1479         for (;;) {
1480                 /* check whether the controller is done */
1481                 stat = hc_interrupt();
1482                 if (stat < 0) {
1483                         stat = USB_ST_CRC_ERR;
1484                         break;
1485                 }
1486
1487                 /* NOTE: since we are not interrupt driven in U-Boot and always
1488                  * handle only one URB at a time, we cannot assume the
1489                  * transaction finished on the first successful return from
1490                  * hc_interrupt().. unless the flag for current URB is set,
1491                  * meaning that all TD's to/from device got actually
1492                  * transferred and processed. If the current URB is not
1493                  * finished we need to re-iterate this loop so as
1494                  * hc_interrupt() gets called again as there needs to be some
1495                  * more TD's to process still */
1496                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1497                         /* 0xff is returned for an SF-interrupt */
1498                         break;
1499                 }
1500
1501                 if (--timeout) {
1502                         wait_ms(1);
1503                         if (!urb->finished)
1504                                 dbg("\%");
1505
1506                 } else {
1507                         err("CTL:TIMEOUT ");
1508                         dbg("submit_common_msg: TO status %x\n", stat);
1509                         urb->finished = 1;
1510                         stat = USB_ST_CRC_ERR;
1511                         break;
1512                 }
1513         }
1514
1515         dev->status = stat;
1516         dev->act_len = transfer_len;
1517
1518 #ifdef DEBUG
1519         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1520 #else
1521         wait_ms(1);
1522 #endif
1523
1524         /* free TDs in urb_priv */
1525         if (usb_pipetype (pipe) != PIPE_INTERRUPT)
1526                 urb_free_priv (urb);
1527         return 0;
1528 }
1529
1530 /* submit routines called from usb.c */
1531 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1532                 int transfer_len)
1533 {
1534         info("submit_bulk_msg");
1535         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1536 }
1537
1538 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1539                 int transfer_len, struct devrequest *setup)
1540 {
1541         int maxsize = usb_maxpacket(dev, pipe);
1542
1543         info("submit_control_msg");
1544 #ifdef DEBUG
1545         pkt_print(NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1546 #else
1547         wait_ms(1);
1548 #endif
1549         if (!maxsize) {
1550                 err("submit_control_message: pipesize for pipe %lx is zero",
1551                         pipe);
1552                 return -1;
1553         }
1554         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1555                 gohci.rh.dev = dev;
1556                 /* root hub - redirect */
1557                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1558                         setup);
1559         }
1560
1561         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1562 }
1563
1564 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1565                 int transfer_len, int interval)
1566 {
1567         info("submit_int_msg");
1568         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1569                         interval);
1570 }
1571
1572 /*-------------------------------------------------------------------------*
1573  * HC functions
1574  *-------------------------------------------------------------------------*/
1575
1576 /* reset the HC and BUS */
1577
1578 static int hc_reset (ohci_t *ohci)
1579 {
1580         int timeout = 30;
1581         int smm_timeout = 50; /* 0,5 sec */
1582
1583         dbg("%s\n", __FUNCTION__);
1584
1585         if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1586                 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1587                 info("USB HC TakeOver from SMM");
1588                 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1589                         wait_ms (10);
1590                         if (--smm_timeout == 0) {
1591                                 err("USB HC TakeOver failed!");
1592                                 return -1;
1593                         }
1594                 }
1595         }
1596
1597         /* Disable HC interrupts */
1598         writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1599
1600         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1601                 ohci->slot_name,
1602                 readl(&ohci->regs->control));
1603
1604         /* Reset USB (needed by some controllers) */
1605         ohci->hc_control = 0;
1606         writel (ohci->hc_control, &ohci->regs->control);
1607
1608         /* HC Reset requires max 10 us delay */
1609         writel (OHCI_HCR,  &ohci->regs->cmdstatus);
1610         while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1611                 if (--timeout == 0) {
1612                         err("USB HC reset timed out!");
1613                         return -1;
1614                 }
1615                 udelay (1);
1616         }
1617         return 0;
1618 }
1619
1620 /*-------------------------------------------------------------------------*/
1621
1622 /* Start an OHCI controller, set the BUS operational
1623  * enable interrupts
1624  * connect the virtual root hub */
1625
1626 static int hc_start (ohci_t * ohci)
1627 {
1628         __u32 mask;
1629         unsigned int fminterval;
1630
1631         ohci->disabled = 1;
1632
1633         /* Tell the controller where the control and bulk lists are
1634          * The lists are empty now. */
1635
1636         writel (0, &ohci->regs->ed_controlhead);
1637         writel (0, &ohci->regs->ed_bulkhead);
1638
1639         writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1640
1641         fminterval = 0x2edf;
1642         writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1643         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1644         writel (fminterval, &ohci->regs->fminterval);
1645         writel (0x628, &ohci->regs->lsthresh);
1646
1647         /* start controller operations */
1648         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1649         ohci->disabled = 0;
1650         writel (ohci->hc_control, &ohci->regs->control);
1651
1652         /* disable all interrupts */
1653         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1654                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1655                         OHCI_INTR_OC | OHCI_INTR_MIE);
1656         writel (mask, &ohci->regs->intrdisable);
1657         /* clear all interrupts */
1658         mask &= ~OHCI_INTR_MIE;
1659         writel (mask, &ohci->regs->intrstatus);
1660         /* Choose the interrupts we care about now  - but w/o MIE */
1661         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1662         writel (mask, &ohci->regs->intrenable);
1663
1664 #ifdef  OHCI_USE_NPS
1665         /* required for AMD-756 and some Mac platforms */
1666         writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1667                 &ohci->regs->roothub.a);
1668         writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1669 #endif  /* OHCI_USE_NPS */
1670
1671 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1672         /* POTPGT delay is bits 24-31, in 2 ms units. */
1673         mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1674
1675         /* connect the virtual root hub */
1676         ohci->rh.devnum = 0;
1677
1678         return 0;
1679 }
1680
1681 /*-------------------------------------------------------------------------*/
1682
1683 /* Poll USB interrupt. */
1684 void usb_event_poll(void)
1685 {
1686         hc_interrupt();
1687 }
1688
1689 /* an interrupt happens */
1690
1691 static int hc_interrupt (void)
1692 {
1693         ohci_t *ohci = &gohci;
1694         struct ohci_regs *regs = ohci->regs;
1695         int ints;
1696         int stat = -1;
1697
1698         if ((ohci->hcca->done_head != 0) &&
1699             !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1700                 ints =  OHCI_INTR_WDH;
1701         } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1702                 ohci->disabled++;
1703                 err ("%s device removed!", ohci->slot_name);
1704                 return -1;
1705         } else if ((ints &= readl (&regs->intrenable)) == 0) {
1706                 dbg("hc_interrupt: returning..\n");
1707                 return 0xff;
1708         }
1709
1710         /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1711
1712         if (ints & OHCI_INTR_RHSC) {
1713                 got_rhsc = 1;
1714                 stat = 0xff;
1715         }
1716
1717         if (ints & OHCI_INTR_UE) {
1718                 ohci->disabled++;
1719                 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1720                         ohci->slot_name);
1721                 /* e.g. due to PCI Master/Target Abort */
1722
1723 #ifdef  DEBUG
1724                 ohci_dump (ohci, 1);
1725 #else
1726         wait_ms(1);
1727 #endif
1728                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1729                 /* Make some non-interrupt context restart the controller. */
1730                 /* Count and limit the retries though; either hardware or */
1731                 /* software errors can go forever... */
1732                 hc_reset (ohci);
1733                 return -1;
1734         }
1735
1736         if (ints & OHCI_INTR_WDH) {
1737                 wait_ms(1);
1738                 writel (OHCI_INTR_WDH, &regs->intrdisable);
1739                 (void)readl (&regs->intrdisable); /* flush */
1740                 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1741                 writel (OHCI_INTR_WDH, &regs->intrenable);
1742                 (void)readl (&regs->intrdisable); /* flush */
1743         }
1744
1745         if (ints & OHCI_INTR_SO) {
1746                 dbg("USB Schedule overrun\n");
1747                 writel (OHCI_INTR_SO, &regs->intrenable);
1748                 stat = -1;
1749         }
1750
1751         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1752         if (ints & OHCI_INTR_SF) {
1753                 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1754                 wait_ms(1);
1755                 writel (OHCI_INTR_SF, &regs->intrdisable);
1756                 if (ohci->ed_rm_list[frame] != NULL)
1757                         writel (OHCI_INTR_SF, &regs->intrenable);
1758                 stat = 0xff;
1759         }
1760
1761         writel (ints, &regs->intrstatus);
1762         return stat;
1763 }
1764
1765 /*-------------------------------------------------------------------------*/
1766
1767 /*-------------------------------------------------------------------------*/
1768
1769 /* De-allocate all resources.. */
1770
1771 static void hc_release_ohci (ohci_t *ohci)
1772 {
1773         dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1774
1775         if (!ohci->disabled)
1776                 hc_reset (ohci);
1777 }
1778
1779 /*-------------------------------------------------------------------------*/
1780
1781 /*
1782  * low level initalisation routine, called from usb.c
1783  */
1784 static char ohci_inited = 0;
1785
1786 int usb_lowlevel_init(void)
1787 {
1788 #ifdef CONFIG_PCI_OHCI
1789         pci_dev_t pdev;
1790 #endif
1791
1792 #ifdef CFG_USB_OHCI_CPU_INIT
1793         /* cpu dependant init */
1794         if(usb_cpu_init())
1795                 return -1;
1796 #endif
1797
1798 #ifdef CFG_USB_OHCI_BOARD_INIT
1799         /*  board dependant init */
1800         if(usb_board_init())
1801                 return -1;
1802 #endif
1803         memset (&gohci, 0, sizeof (ohci_t));
1804
1805         /* align the storage */
1806         if ((__u32)&ghcca[0] & 0xff) {
1807                 err("HCCA not aligned!!");
1808                 return -1;
1809         }
1810         phcca = &ghcca[0];
1811         info("aligned ghcca %p", phcca);
1812         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1813         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1814                 err("EDs not aligned!!");
1815                 return -1;
1816         }
1817         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1818         if ((__u32)gtd & 0x7) {
1819                 err("TDs not aligned!!");
1820                 return -1;
1821         }
1822         ptd = gtd;
1823         gohci.hcca = phcca;
1824         memset (phcca, 0, sizeof (struct ohci_hcca));
1825
1826         gohci.disabled = 1;
1827         gohci.sleeping = 0;
1828         gohci.irq = -1;
1829 #ifdef CONFIG_PCI_OHCI
1830         pdev = pci_find_devices(ohci_pci_ids, 0);
1831
1832         if (pdev != -1) {
1833                 u16 vid, did;
1834                 u32 base;
1835                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1836                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1837                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1838                                 vid, did, (pdev >> 16) & 0xff,
1839                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1840                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1841                 printf("OHCI regs address 0x%08x\n", base);
1842                 gohci.regs = (struct ohci_regs *)base;
1843         } else
1844                 return -1;
1845 #else
1846         gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1847 #endif
1848
1849         gohci.flags = 0;
1850         gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1851
1852         if (hc_reset (&gohci) < 0) {
1853                 hc_release_ohci (&gohci);
1854                 err ("can't reset usb-%s", gohci.slot_name);
1855 #ifdef CFG_USB_OHCI_BOARD_INIT
1856                 /* board dependant cleanup */
1857                 usb_board_init_fail();
1858 #endif
1859
1860 #ifdef CFG_USB_OHCI_CPU_INIT
1861                 /* cpu dependant cleanup */
1862                 usb_cpu_init_fail();
1863 #endif
1864                 return -1;
1865         }
1866
1867         /* FIXME this is a second HC reset; why?? */
1868         /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1869            wait_ms(10); */
1870         if (hc_start (&gohci) < 0) {
1871                 err ("can't start usb-%s", gohci.slot_name);
1872                 hc_release_ohci (&gohci);
1873                 /* Initialization failed */
1874 #ifdef CFG_USB_OHCI_BOARD_INIT
1875                 /* board dependant cleanup */
1876                 usb_board_stop();
1877 #endif
1878
1879 #ifdef CFG_USB_OHCI_CPU_INIT
1880                 /* cpu dependant cleanup */
1881                 usb_cpu_stop();
1882 #endif
1883                 return -1;
1884         }
1885
1886 #ifdef  DEBUG
1887         ohci_dump (&gohci, 1);
1888 #else
1889         wait_ms(1);
1890 #endif
1891         ohci_inited = 1;
1892         return 0;
1893 }
1894
1895 int usb_lowlevel_stop(void)
1896 {
1897         /* this gets called really early - before the controller has */
1898         /* even been initialized! */
1899         if (!ohci_inited)
1900                 return 0;
1901         /* TODO release any interrupts, etc. */
1902         /* call hc_release_ohci() here ? */
1903         hc_reset (&gohci);
1904
1905 #ifdef CFG_USB_OHCI_BOARD_INIT
1906         /* board dependant cleanup */
1907         if(usb_board_stop())
1908                 return -1;
1909 #endif
1910
1911 #ifdef CFG_USB_OHCI_CPU_INIT
1912         /* cpu dependant cleanup */
1913         if(usb_cpu_stop())
1914                 return -1;
1915 #endif
1916
1917         return 0;
1918 }
1919 #endif /* CONFIG_USB_OHCI_NEW */