drivers/usb/host/ohci-hcd.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * SPDX-License-Identifier:     GPL-2.0+
  21  */
  22 /*
  23  * IMPORTANT NOTES
  24  * 1 - Read doc/README.generic_usb_ohci
  25  * 2 - this driver is intended for use with USB Mass Storage Devices
  26  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  27  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  28  *     to activate workaround for bug #41 or this driver will NOT work!
  29  */
  30
  31 #include <common.h>
  32 #include <asm/byteorder.h>
  33
  34 #if defined(CONFIG_PCI_OHCI)
  35 # include <pci.h>
  36 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  37 #define CONFIG_PCI_OHCI_DEVNO   0
  38 #endif
  39 #endif
  40
  41 #include <malloc.h>
  42 #include <usb.h>
  43
  44 #include "ohci.h"
  45
  46 #ifdef CONFIG_AT91RM9200
  47 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  48 #endif
  49
  50 #if defined(CONFIG_CPU_ARM920T) || \
  51     defined(CONFIG_S3C24X0) || \
  52     defined(CONFIG_440EP) || \
  53     defined(CONFIG_PCI_OHCI) || \
  54     defined(CONFIG_MPC5200) || \
  55     defined(CONFIG_SYS_OHCI_USE_NPS)
  56 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  57 #endif
  58
  59 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  60 #undef DEBUG
  61 #undef SHOW_INFO
  62 #undef OHCI_FILL_TRACE
  63
  64 /* For initializing controller (mask in an HCFS mode too) */
  65 #define OHCI_CONTROL_INIT \
  66         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  67
  68 #ifdef CONFIG_PCI_OHCI
  69 static struct pci_device_id ohci_pci_ids[] = {
  70         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  71         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  72         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
  73         /* Please add supported PCI OHCI controller ids here */
  74         {0, 0}
  75 };
  76 #endif
  77
  78 #ifdef CONFIG_PCI_EHCI_DEVNO
  79 static struct pci_device_id ehci_pci_ids[] = {
  80         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
  81         /* Please add supported PCI EHCI controller ids here */
  82         {0, 0}
  83 };
  84 #endif
  85
  86 #ifdef DEBUG
  87 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  88 #else
  89 #define dbg(format, arg...) do {} while (0)
  90 #endif /* DEBUG */
  91 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  92 #ifdef SHOW_INFO
  93 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  94 #else
  95 #define info(format, arg...) do {} while (0)
  96 #endif
  97
  98 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
  99 # define m16_swap(x) cpu_to_be16(x)
 100 # define m32_swap(x) cpu_to_be32(x)
 101 #else
 102 # define m16_swap(x) cpu_to_le16(x)
 103 # define m32_swap(x) cpu_to_le32(x)
 104 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
 105
 106 /* global ohci_t */
 107 static ohci_t gohci;
 108 /* this must be aligned to a 256 byte boundary */
 109 struct ohci_hcca ghcca[1];
 110 /* a pointer to the aligned storage */
 111 struct ohci_hcca *phcca;
 112 /* this allocates EDs for all possible endpoints */
 113 struct ohci_device ohci_dev;
 114
 115 static inline u32 roothub_a(struct ohci *hc)
 116         { return ohci_readl(&hc->regs->roothub.a); }
 117 static inline u32 roothub_b(struct ohci *hc)
 118         { return ohci_readl(&hc->regs->roothub.b); }
 119 static inline u32 roothub_status(struct ohci *hc)
 120         { return ohci_readl(&hc->regs->roothub.status); }
 121 static inline u32 roothub_portstatus(struct ohci *hc, int i)
 122         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
 123
 124 /* forward declaration */
 125 static int hc_interrupt(void);
 126 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
 127                           void *buffer, int transfer_len,
 128                           struct devrequest *setup, urb_priv_t *urb,
 129                           int interval);
 130
 131 /*-------------------------------------------------------------------------*
 132  * URB support functions
 133  *-------------------------------------------------------------------------*/
 134
 135 /* free HCD-private data associated with this URB */
 136
 137 static void urb_free_priv(urb_priv_t *urb)
 138 {
 139         int             i;
 140         int             last;
 141         struct td       *td;
 142
 143         last = urb->length - 1;
 144         if (last >= 0) {
 145                 for (i = 0; i <= last; i++) {
 146                         td = urb->td[i];
 147                         if (td) {
 148                                 td->usb_dev = NULL;
 149                                 urb->td[i] = NULL;
 150                         }
 151                 }
 152         }
 153         free(urb);
 154 }
 155
 156 /*-------------------------------------------------------------------------*/
 157
 158 #ifdef DEBUG
 159 static int sohci_get_current_frame_number(struct usb_device *dev);
 160
 161 /* debug| print the main components of an URB
 162  * small: 0) header + data packets 1) just header */
 163
 164 static void pkt_print(urb_priv_t *purb, struct usb_device *dev,
 165                       unsigned long pipe, void *buffer, int transfer_len,
 166                       struct devrequest *setup, char *str, int small)
 167 {
 168         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 169                         str,
 170                         sohci_get_current_frame_number(dev),
 171                         usb_pipedevice(pipe),
 172                         usb_pipeendpoint(pipe),
 173                         usb_pipeout(pipe)? 'O': 'I',
 174                         usb_pipetype(pipe) < 2 ? \
 175                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
 176                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 177                         (purb ? purb->actual_length : 0),
 178                         transfer_len, dev->status);
 179 #ifdef  OHCI_VERBOSE_DEBUG
 180         if (!small) {
 181                 int i, len;
 182
 183                 if (usb_pipecontrol(pipe)) {
 184                         printf(__FILE__ ": cmd(8):");
 185                         for (i = 0; i < 8 ; i++)
 186                                 printf(" %02x", ((__u8 *) setup) [i]);
 187                         printf("\n");
 188                 }
 189                 if (transfer_len > 0 && buffer) {
 190                         printf(__FILE__ ": data(%d/%d):",
 191                                 (purb ? purb->actual_length : 0),
 192                                 transfer_len);
 193                         len = usb_pipeout(pipe)? transfer_len:
 194                                         (purb ? purb->actual_length : 0);
 195                         for (i = 0; i < 16 && i < len; i++)
 196                                 printf(" %02x", ((__u8 *) buffer) [i]);
 197                         printf("%s\n", i < len? "...": "");
 198                 }
 199         }
 200 #endif
 201 }
 202
 203 /* just for debugging; prints non-empty branches of the int ed tree
 204  * inclusive iso eds */
 205 void ep_print_int_eds(ohci_t *ohci, char *str)
 206 {
 207         int i, j;
 208          __u32 *ed_p;
 209         for (i = 0; i < 32; i++) {
 210                 j = 5;
 211                 ed_p = &(ohci->hcca->int_table [i]);
 212                 if (*ed_p == 0)
 213                     continue;
 214                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 215                 while (*ed_p != 0 && j--) {
 216                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 217                         printf(" ed: %4x;", ed->hwINFO);
 218                         ed_p = &ed->hwNextED;
 219                 }
 220                 printf("\n");
 221         }
 222 }
 223
 224 static void ohci_dump_intr_mask(char *label, __u32 mask)
 225 {
 226         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 227                 label,
 228                 mask,
 229                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 230                 (mask & OHCI_INTR_OC) ? " OC" : "",
 231                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 232                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 233                 (mask & OHCI_INTR_UE) ? " UE" : "",
 234                 (mask & OHCI_INTR_RD) ? " RD" : "",
 235                 (mask & OHCI_INTR_SF) ? " SF" : "",
 236                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 237                 (mask & OHCI_INTR_SO) ? " SO" : ""
 238                 );
 239 }
 240
 241 static void maybe_print_eds(char *label, __u32 value)
 242 {
 243         ed_t *edp = (ed_t *)value;
 244
 245         if (value) {
 246                 dbg("%s %08x", label, value);
 247                 dbg("%08x", edp->hwINFO);
 248                 dbg("%08x", edp->hwTailP);
 249                 dbg("%08x", edp->hwHeadP);
 250                 dbg("%08x", edp->hwNextED);
 251         }
 252 }
 253
 254 static char *hcfs2string(int state)
 255 {
 256         switch (state) {
 257         case OHCI_USB_RESET:    return "reset";
 258         case OHCI_USB_RESUME:   return "resume";
 259         case OHCI_USB_OPER:     return "operational";
 260         case OHCI_USB_SUSPEND:  return "suspend";
 261         }
 262         return "?";
 263 }
 264
 265 /* dump control and status registers */
 266 static void ohci_dump_status(ohci_t *controller)
 267 {
 268         struct ohci_regs        *regs = controller->regs;
 269         __u32                   temp;
 270
 271         temp = ohci_readl(&regs->revision) & 0xff;
 272         if (temp != 0x10)
 273                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 274
 275         temp = ohci_readl(&regs->control);
 276         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 277                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 278                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 279                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 280                 hcfs2string(temp & OHCI_CTRL_HCFS),
 281                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 282                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 283                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 284                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 285                 temp & OHCI_CTRL_CBSR
 286                 );
 287
 288         temp = ohci_readl(&regs->cmdstatus);
 289         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 290                 (temp & OHCI_SOC) >> 16,
 291                 (temp & OHCI_OCR) ? " OCR" : "",
 292                 (temp & OHCI_BLF) ? " BLF" : "",
 293                 (temp & OHCI_CLF) ? " CLF" : "",
 294                 (temp & OHCI_HCR) ? " HCR" : ""
 295                 );
 296
 297         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
 298         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
 299
 300         maybe_print_eds("ed_periodcurrent",
 301                         ohci_readl(&regs->ed_periodcurrent));
 302
 303         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
 304         maybe_print_eds("ed_controlcurrent",
 305                         ohci_readl(&regs->ed_controlcurrent));
 306
 307         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
 308         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
 309
 310         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
 311 }
 312
 313 static void ohci_dump_roothub(ohci_t *controller, int verbose)
 314 {
 315         __u32                   temp, ndp, i;
 316
 317         temp = roothub_a(controller);
 318         ndp = (temp & RH_A_NDP);
 319 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 320         ndp = (ndp == 2) ? 1:0;
 321 #endif
 322         if (verbose) {
 323                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 324                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 325                         (temp & RH_A_NOCP) ? " NOCP" : "",
 326                         (temp & RH_A_OCPM) ? " OCPM" : "",
 327                         (temp & RH_A_DT) ? " DT" : "",
 328                         (temp & RH_A_NPS) ? " NPS" : "",
 329                         (temp & RH_A_PSM) ? " PSM" : "",
 330                         ndp
 331                         );
 332                 temp = roothub_b(controller);
 333                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 334                         temp,
 335                         (temp & RH_B_PPCM) >> 16,
 336                         (temp & RH_B_DR)
 337                         );
 338                 temp = roothub_status(controller);
 339                 dbg("roothub.status: %08x%s%s%s%s%s%s",
 340                         temp,
 341                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 342                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 343                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 344                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 345                         (temp & RH_HS_OCI) ? " OCI" : "",
 346                         (temp & RH_HS_LPS) ? " LPS" : ""
 347                         );
 348         }
 349
 350         for (i = 0; i < ndp; i++) {
 351                 temp = roothub_portstatus(controller, i);
 352                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 353                         i,
 354                         temp,
 355                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 356                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 357                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 358                         (temp & RH_PS_PESC) ? " PESC" : "",
 359                         (temp & RH_PS_CSC) ? " CSC" : "",
 360
 361                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 362                         (temp & RH_PS_PPS) ? " PPS" : "",
 363                         (temp & RH_PS_PRS) ? " PRS" : "",
 364                         (temp & RH_PS_POCI) ? " POCI" : "",
 365                         (temp & RH_PS_PSS) ? " PSS" : "",
 366
 367                         (temp & RH_PS_PES) ? " PES" : "",
 368                         (temp & RH_PS_CCS) ? " CCS" : ""
 369                         );
 370         }
 371 }
 372
 373 static void ohci_dump(ohci_t *controller, int verbose)
 374 {
 375         dbg("OHCI controller usb-%s state", controller->slot_name);
 376
 377         /* dumps some of the state we know about */
 378         ohci_dump_status(controller);
 379         if (verbose)
 380                 ep_print_int_eds(controller, "hcca");
 381         dbg("hcca frame #%04x", controller->hcca->frame_no);
 382         ohci_dump_roothub(controller, 1);
 383 }
 384 #endif /* DEBUG */
 385
 386 /*-------------------------------------------------------------------------*
 387  * Interface functions (URB)
 388  *-------------------------------------------------------------------------*/
 389
 390 /* get a transfer request */
 391
 392 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
 393 {
 394         ohci_t *ohci;
 395         ed_t *ed;
 396         urb_priv_t *purb_priv = urb;
 397         int i, size = 0;
 398         struct usb_device *dev = urb->dev;
 399         unsigned long pipe = urb->pipe;
 400         void *buffer = urb->transfer_buffer;
 401         int transfer_len = urb->transfer_buffer_length;
 402         int interval = urb->interval;
 403
 404         ohci = &gohci;
 405
 406         /* when controller's hung, permit only roothub cleanup attempts
 407          * such as powering down ports */
 408         if (ohci->disabled) {
 409                 err("sohci_submit_job: EPIPE");
 410                 return -1;
 411         }
 412
 413         /* we're about to begin a new transaction here so mark the
 414          * URB unfinished */
 415         urb->finished = 0;
 416
 417         /* every endpoint has a ed, locate and fill it */
 418         ed = ep_add_ed(dev, pipe, interval, 1);
 419         if (!ed) {
 420                 err("sohci_submit_job: ENOMEM");
 421                 return -1;
 422         }
 423
 424         /* for the private part of the URB we need the number of TDs (size) */
 425         switch (usb_pipetype(pipe)) {
 426         case PIPE_BULK: /* one TD for every 4096 Byte */
 427                 size = (transfer_len - 1) / 4096 + 1;
 428                 break;
 429         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 430                 size = (transfer_len == 0)? 2:
 431                                         (transfer_len - 1) / 4096 + 3;
 432                 break;
 433         case PIPE_INTERRUPT: /* 1 TD */
 434                 size = 1;
 435                 break;
 436         }
 437
 438         ed->purb = urb;
 439
 440         if (size >= (N_URB_TD - 1)) {
 441                 err("need %d TDs, only have %d", size, N_URB_TD);
 442                 return -1;
 443         }
 444         purb_priv->pipe = pipe;
 445
 446         /* fill the private part of the URB */
 447         purb_priv->length = size;
 448         purb_priv->ed = ed;
 449         purb_priv->actual_length = 0;
 450
 451         /* allocate the TDs */
 452         /* note that td[0] was allocated in ep_add_ed */
 453         for (i = 0; i < size; i++) {
 454                 purb_priv->td[i] = td_alloc(dev);
 455                 if (!purb_priv->td[i]) {
 456                         purb_priv->length = i;
 457                         urb_free_priv(purb_priv);
 458                         err("sohci_submit_job: ENOMEM");
 459                         return -1;
 460                 }
 461         }
 462
 463         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 464                 urb_free_priv(purb_priv);
 465                 err("sohci_submit_job: EINVAL");
 466                 return -1;
 467         }
 468
 469         /* link the ed into a chain if is not already */
 470         if (ed->state != ED_OPER)
 471                 ep_link(ohci, ed);
 472
 473         /* fill the TDs and link it to the ed */
 474         td_submit_job(dev, pipe, buffer, transfer_len,
 475                       setup, purb_priv, interval);
 476
 477         return 0;
 478 }
 479
 480 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 481 {
 482         struct ohci_regs *regs = hc->regs;
 483
 484         switch (usb_pipetype(urb->pipe)) {
 485         case PIPE_INTERRUPT:
 486                 /* implicitly requeued */
 487                 if (urb->dev->irq_handle &&
 488                                 (urb->dev->irq_act_len = urb->actual_length)) {
 489                         ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
 490                         ohci_readl(&regs->intrenable); /* PCI posting flush */
 491                         urb->dev->irq_handle(urb->dev);
 492                         ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
 493                         ohci_readl(&regs->intrdisable); /* PCI posting flush */
 494                 }
 495                 urb->actual_length = 0;
 496                 td_submit_job(
 497                                 urb->dev,
 498                                 urb->pipe,
 499                                 urb->transfer_buffer,
 500                                 urb->transfer_buffer_length,
 501                                 NULL,
 502                                 urb,
 503                                 urb->interval);
 504                 break;
 505         case PIPE_CONTROL:
 506         case PIPE_BULK:
 507                 break;
 508         default:
 509                 return 0;
 510         }
 511         return 1;
 512 }
 513
 514 /*-------------------------------------------------------------------------*/
 515
 516 #ifdef DEBUG
 517 /* tell us the current USB frame number */
 518
 519 static int sohci_get_current_frame_number(struct usb_device *usb_dev)
 520 {
 521         ohci_t *ohci = &gohci;
 522
 523         return m16_swap(ohci->hcca->frame_no);
 524 }
 525 #endif
 526
 527 /*-------------------------------------------------------------------------*
 528  * ED handling functions
 529  *-------------------------------------------------------------------------*/
 530
 531 /* search for the right branch to insert an interrupt ed into the int tree
 532  * do some load ballancing;
 533  * returns the branch and
 534  * sets the interval to interval = 2^integer (ld (interval)) */
 535
 536 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 537 {
 538         int i, branch = 0;
 539
 540         /* search for the least loaded interrupt endpoint
 541          * branch of all 32 branches
 542          */
 543         for (i = 0; i < 32; i++)
 544                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 545                         branch = i;
 546
 547         branch = branch % interval;
 548         for (i = branch; i < 32; i += interval)
 549                 ohci->ohci_int_load [i] += load;
 550
 551         return branch;
 552 }
 553
 554 /*-------------------------------------------------------------------------*/
 555
 556 /*  2^int( ld (inter)) */
 557
 558 static int ep_2_n_interval(int inter)
 559 {
 560         int i;
 561         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 562         return 1 << i;
 563 }
 564
 565 /*-------------------------------------------------------------------------*/
 566
 567 /* the int tree is a binary tree
 568  * in order to process it sequentially the indexes of the branches have to
 569  * be mapped the mapping reverses the bits of a word of num_bits length */
 570 static int ep_rev(int num_bits, int word)
 571 {
 572         int i, wout = 0;
 573
 574         for (i = 0; i < num_bits; i++)
 575                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 576         return wout;
 577 }
 578
 579 /*-------------------------------------------------------------------------*
 580  * ED handling functions
 581  *-------------------------------------------------------------------------*/
 582
 583 /* link an ed into one of the HC chains */
 584
 585 static int ep_link(ohci_t *ohci, ed_t *edi)
 586 {
 587         volatile ed_t *ed = edi;
 588         int int_branch;
 589         int i;
 590         int inter;
 591         int interval;
 592         int load;
 593         __u32 *ed_p;
 594
 595         ed->state = ED_OPER;
 596         ed->int_interval = 0;
 597
 598         switch (ed->type) {
 599         case PIPE_CONTROL:
 600                 ed->hwNextED = 0;
 601                 if (ohci->ed_controltail == NULL)
 602                         ohci_writel(ed, &ohci->regs->ed_controlhead);
 603                 else
 604                         ohci->ed_controltail->hwNextED =
 605                                                    m32_swap((unsigned long)ed);
 606
 607                 ed->ed_prev = ohci->ed_controltail;
 608                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 609                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 610                         ohci->hc_control |= OHCI_CTRL_CLE;
 611                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 612                 }
 613                 ohci->ed_controltail = edi;
 614                 break;
 615
 616         case PIPE_BULK:
 617                 ed->hwNextED = 0;
 618                 if (ohci->ed_bulktail == NULL)
 619                         ohci_writel(ed, &ohci->regs->ed_bulkhead);
 620                 else
 621                         ohci->ed_bulktail->hwNextED =
 622                                                    m32_swap((unsigned long)ed);
 623
 624                 ed->ed_prev = ohci->ed_bulktail;
 625                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 626                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 627                         ohci->hc_control |= OHCI_CTRL_BLE;
 628                         ohci_writel(ohci->hc_control, &ohci->regs->control);
 629                 }
 630                 ohci->ed_bulktail = edi;
 631                 break;
 632
 633         case PIPE_INTERRUPT:
 634                 load = ed->int_load;
 635                 interval = ep_2_n_interval(ed->int_period);
 636                 ed->int_interval = interval;
 637                 int_branch = ep_int_ballance(ohci, interval, load);
 638                 ed->int_branch = int_branch;
 639
 640                 for (i = 0; i < ep_rev(6, interval); i += inter) {
 641                         inter = 1;
 642                         for (ed_p = &(ohci->hcca->int_table[\
 643                                                 ep_rev(5, i) + int_branch]);
 644                                 (*ed_p != 0) &&
 645                                 (((ed_t *)ed_p)->int_interval >= interval);
 646                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 647                                         inter = ep_rev(6,
 648                                                  ((ed_t *)ed_p)->int_interval);
 649                         ed->hwNextED = *ed_p;
 650                         *ed_p = m32_swap((unsigned long)ed);
 651                 }
 652                 break;
 653         }
 654         return 0;
 655 }
 656
 657 /*-------------------------------------------------------------------------*/
 658
 659 /* scan the periodic table to find and unlink this ED */
 660 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 661                             unsigned index, unsigned period)
 662 {
 663         for (; index < NUM_INTS; index += period) {
 664                 __u32   *ed_p = &ohci->hcca->int_table [index];
 665
 666                 /* ED might have been unlinked through another path */
 667                 while (*ed_p != 0) {
 668                         if (((struct ed *)
 669                                         m32_swap((unsigned long)ed_p)) == ed) {
 670                                 *ed_p = ed->hwNextED;
 671                                 break;
 672                         }
 673                         ed_p = &(((struct ed *)
 674                                      m32_swap((unsigned long)ed_p))->hwNextED);
 675                 }
 676         }
 677 }
 678
 679 /* unlink an ed from one of the HC chains.
 680  * just the link to the ed is unlinked.
 681  * the link from the ed still points to another operational ed or 0
 682  * so the HC can eventually finish the processing of the unlinked ed */
 683
 684 static int ep_unlink(ohci_t *ohci, ed_t *edi)
 685 {
 686         volatile ed_t *ed = edi;
 687         int i;
 688
 689         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 690
 691         switch (ed->type) {
 692         case PIPE_CONTROL:
 693                 if (ed->ed_prev == NULL) {
 694                         if (!ed->hwNextED) {
 695                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 696                                 ohci_writel(ohci->hc_control,
 697                                             &ohci->regs->control);
 698                         }
 699                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 700                                 &ohci->regs->ed_controlhead);
 701                 } else {
 702                         ed->ed_prev->hwNextED = ed->hwNextED;
 703                 }
 704                 if (ohci->ed_controltail == ed) {
 705                         ohci->ed_controltail = ed->ed_prev;
 706                 } else {
 707                         ((ed_t *)m32_swap(
 708                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 709                 }
 710                 break;
 711
 712         case PIPE_BULK:
 713                 if (ed->ed_prev == NULL) {
 714                         if (!ed->hwNextED) {
 715                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 716                                 ohci_writel(ohci->hc_control,
 717                                             &ohci->regs->control);
 718                         }
 719                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 720                                &ohci->regs->ed_bulkhead);
 721                 } else {
 722                         ed->ed_prev->hwNextED = ed->hwNextED;
 723                 }
 724                 if (ohci->ed_bulktail == ed) {
 725                         ohci->ed_bulktail = ed->ed_prev;
 726                 } else {
 727                         ((ed_t *)m32_swap(
 728                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 729                 }
 730                 break;
 731
 732         case PIPE_INTERRUPT:
 733                 periodic_unlink(ohci, ed, 0, 1);
 734                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 735                     ohci->ohci_int_load[i] -= ed->int_load;
 736                 break;
 737         }
 738         ed->state = ED_UNLINK;
 739         return 0;
 740 }
 741
 742 /*-------------------------------------------------------------------------*/
 743
 744 /* add/reinit an endpoint; this should be done once at the
 745  * usb_set_configuration command, but the USB stack is a little bit
 746  * stateless so we do it at every transaction if the state of the ed
 747  * is ED_NEW then a dummy td is added and the state is changed to
 748  * ED_UNLINK in all other cases the state is left unchanged the ed
 749  * info fields are setted anyway even though most of them should not
 750  * change
 751  */
 752 static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe,
 753                         int interval, int load)
 754 {
 755         td_t *td;
 756         ed_t *ed_ret;
 757         volatile ed_t *ed;
 758
 759         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
 760                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 761
 762         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 763                 err("ep_add_ed: pending delete");
 764                 /* pending delete request */
 765                 return NULL;
 766         }
 767
 768         if (ed->state == ED_NEW) {
 769                 /* dummy td; end of td list for ed */
 770                 td = td_alloc(usb_dev);
 771                 ed->hwTailP = m32_swap((unsigned long)td);
 772                 ed->hwHeadP = ed->hwTailP;
 773                 ed->state = ED_UNLINK;
 774                 ed->type = usb_pipetype(pipe);
 775                 ohci_dev.ed_cnt++;
 776         }
 777
 778         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 779                         | usb_pipeendpoint(pipe) << 7
 780                         | (usb_pipeisoc(pipe)? 0x8000: 0)
 781                         | (usb_pipecontrol(pipe)? 0: \
 782                                            (usb_pipeout(pipe)? 0x800: 0x1000))
 783                         | (usb_dev->speed == USB_SPEED_LOW) << 13
 784                         | usb_maxpacket(usb_dev, pipe) << 16);
 785
 786         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 787                 ed->int_period = interval;
 788                 ed->int_load = load;
 789         }
 790
 791         return ed_ret;
 792 }
 793
 794 /*-------------------------------------------------------------------------*
 795  * TD handling functions
 796  *-------------------------------------------------------------------------*/
 797
 798 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 799
 800 static void td_fill(ohci_t *ohci, unsigned int info,
 801         void *data, int len,
 802         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 803 {
 804         volatile td_t  *td, *td_pt;
 805 #ifdef OHCI_FILL_TRACE
 806         int i;
 807 #endif
 808
 809         if (index > urb_priv->length) {
 810                 err("index > length");
 811                 return;
 812         }
 813         /* use this td as the next dummy */
 814         td_pt = urb_priv->td [index];
 815         td_pt->hwNextTD = 0;
 816
 817         /* fill the old dummy TD */
 818         td = urb_priv->td [index] =
 819                              (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 820
 821         td->ed = urb_priv->ed;
 822         td->next_dl_td = NULL;
 823         td->index = index;
 824         td->data = (__u32)data;
 825 #ifdef OHCI_FILL_TRACE
 826         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
 827                 for (i = 0; i < len; i++)
 828                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 829                 printf("\n");
 830         }
 831 #endif
 832         if (!len)
 833                 data = 0;
 834
 835         td->hwINFO = m32_swap(info);
 836         td->hwCBP = m32_swap((unsigned long)data);
 837         if (data)
 838                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
 839         else
 840                 td->hwBE = 0;
 841
 842         td->hwNextTD = m32_swap((unsigned long)td_pt);
 843
 844         /* append to queue */
 845         td->ed->hwTailP = td->hwNextTD;
 846 }
 847
 848 /*-------------------------------------------------------------------------*/
 849
 850 /* prepare all TDs of a transfer */
 851
 852 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
 853                           void *buffer, int transfer_len,
 854                           struct devrequest *setup, urb_priv_t *urb,
 855                           int interval)
 856 {
 857         ohci_t *ohci = &gohci;
 858         int data_len = transfer_len;
 859         void *data;
 860         int cnt = 0;
 861         __u32 info = 0;
 862         unsigned int toggle = 0;
 863
 864         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 865          * bits for reseting */
 866         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 867                 toggle = TD_T_TOGGLE;
 868         } else {
 869                 toggle = TD_T_DATA0;
 870                 usb_settoggle(dev, usb_pipeendpoint(pipe),
 871                                 usb_pipeout(pipe), 1);
 872         }
 873         urb->td_cnt = 0;
 874         if (data_len)
 875                 data = buffer;
 876         else
 877                 data = 0;
 878
 879         switch (usb_pipetype(pipe)) {
 880         case PIPE_BULK:
 881                 info = usb_pipeout(pipe)?
 882                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 883                 while (data_len > 4096) {
 884                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 885                                 data, 4096, dev, cnt, urb);
 886                         data += 4096; data_len -= 4096; cnt++;
 887                 }
 888                 info = usb_pipeout(pipe)?
 889                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 890                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
 891                         data_len, dev, cnt, urb);
 892                 cnt++;
 893
 894                 if (!ohci->sleeping) {
 895                         /* start bulk list */
 896                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
 897                 }
 898                 break;
 899
 900         case PIPE_CONTROL:
 901                 /* Setup phase */
 902                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 903                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
 904
 905                 /* Optional Data phase */
 906                 if (data_len > 0) {
 907                         info = usb_pipeout(pipe)?
 908                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
 909                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 910                         /* NOTE:  mishandles transfers >8K, some >4K */
 911                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
 912                 }
 913
 914                 /* Status phase */
 915                 info = usb_pipeout(pipe)?
 916                         TD_CC | TD_DP_IN | TD_T_DATA1:
 917                         TD_CC | TD_DP_OUT | TD_T_DATA1;
 918                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
 919
 920                 if (!ohci->sleeping) {
 921                         /* start Control list */
 922                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
 923                 }
 924                 break;
 925
 926         case PIPE_INTERRUPT:
 927                 info = usb_pipeout(urb->pipe)?
 928                         TD_CC | TD_DP_OUT | toggle:
 929                         TD_CC | TD_R | TD_DP_IN | toggle;
 930                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
 931                 break;
 932         }
 933         if (urb->length != cnt)
 934                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 935 }
 936
 937 /*-------------------------------------------------------------------------*
 938  * Done List handling functions
 939  *-------------------------------------------------------------------------*/
 940
 941 /* calculate the transfer length and update the urb */
 942
 943 static void dl_transfer_length(td_t *td)
 944 {
 945         __u32 tdBE, tdCBP;
 946         urb_priv_t *lurb_priv = td->ed->purb;
 947
 948         tdBE   = m32_swap(td->hwBE);
 949         tdCBP  = m32_swap(td->hwCBP);
 950
 951         if (!(usb_pipecontrol(lurb_priv->pipe) &&
 952             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 953                 if (tdBE != 0) {
 954                         if (td->hwCBP == 0)
 955                                 lurb_priv->actual_length += tdBE - td->data + 1;
 956                         else
 957                                 lurb_priv->actual_length += tdCBP - td->data;
 958                 }
 959         }
 960 }
 961
 962 /*-------------------------------------------------------------------------*/
 963 static void check_status(td_t *td_list)
 964 {
 965         urb_priv_t *lurb_priv = td_list->ed->purb;
 966         int        urb_len    = lurb_priv->length;
 967         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
 968         int        cc;
 969
 970         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
 971         if (cc) {
 972                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
 973
 974                 if (*phwHeadP & m32_swap(0x1)) {
 975                         if (lurb_priv &&
 976                             ((td_list->index + 1) < urb_len)) {
 977                                 *phwHeadP =
 978                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
 979                                                         m32_swap(0xfffffff0)) |
 980                                                    (*phwHeadP & m32_swap(0x2));
 981
 982                                 lurb_priv->td_cnt += urb_len -
 983                                                      td_list->index - 1;
 984                         } else
 985                                 *phwHeadP &= m32_swap(0xfffffff2);
 986                 }
 987 #ifdef CONFIG_MPC5200
 988                 td_list->hwNextTD = 0;
 989 #endif
 990         }
 991 }
 992
 993 /* replies to the request have to be on a FIFO basis so
 994  * we reverse the reversed done-list */
 995 static td_t *dl_reverse_done_list(ohci_t *ohci)
 996 {
 997         __u32 td_list_hc;
 998         td_t *td_rev = NULL;
 999         td_t *td_list = NULL;
1000
1001         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1002         ohci->hcca->done_head = 0;
1003
1004         while (td_list_hc) {
1005                 td_list = (td_t *)td_list_hc;
1006                 check_status(td_list);
1007                 td_list->next_dl_td = td_rev;
1008                 td_rev = td_list;
1009                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1010         }
1011         return td_list;
1012 }
1013
1014 /*-------------------------------------------------------------------------*/
1015 /*-------------------------------------------------------------------------*/
1016
1017 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1018 {
1019         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1020                 urb->finished = sohci_return_job(ohci, urb);
1021         else
1022                 dbg("finish_urb: strange.., ED state %x, \n", status);
1023 }
1024
1025 /*
1026  * Used to take back a TD from the host controller. This would normally be
1027  * called from within dl_done_list, however it may be called directly if the
1028  * HC no longer sees the TD and it has not appeared on the donelist (after
1029  * two frames).  This bug has been observed on ZF Micro systems.
1030  */
1031 static int takeback_td(ohci_t *ohci, td_t *td_list)
1032 {
1033         ed_t *ed;
1034         int cc;
1035         int stat = 0;
1036         /* urb_t *urb; */
1037         urb_priv_t *lurb_priv;
1038         __u32 tdINFO, edHeadP, edTailP;
1039
1040         tdINFO = m32_swap(td_list->hwINFO);
1041
1042         ed = td_list->ed;
1043         lurb_priv = ed->purb;
1044
1045         dl_transfer_length(td_list);
1046
1047         lurb_priv->td_cnt++;
1048
1049         /* error code of transfer */
1050         cc = TD_CC_GET(tdINFO);
1051         if (cc) {
1052                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1053                 stat = cc_to_error[cc];
1054         }
1055
1056         /* see if this done list makes for all TD's of current URB,
1057         * and mark the URB finished if so */
1058         if (lurb_priv->td_cnt == lurb_priv->length)
1059                 finish_urb(ohci, lurb_priv, ed->state);
1060
1061         dbg("dl_done_list: processing TD %x, len %x\n",
1062                 lurb_priv->td_cnt, lurb_priv->length);
1063
1064         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1065                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1066                 edTailP = m32_swap(ed->hwTailP);
1067
1068                 /* unlink eds if they are not busy */
1069                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1070                         ep_unlink(ohci, ed);
1071         }
1072         return stat;
1073 }
1074
1075 static int dl_done_list(ohci_t *ohci)
1076 {
1077         int stat = 0;
1078         td_t    *td_list = dl_reverse_done_list(ohci);
1079
1080         while (td_list) {
1081                 td_t    *td_next = td_list->next_dl_td;
1082                 stat = takeback_td(ohci, td_list);
1083                 td_list = td_next;
1084         }
1085         return stat;
1086 }
1087
1088 /*-------------------------------------------------------------------------*
1089  * Virtual Root Hub
1090  *-------------------------------------------------------------------------*/
1091
1092 #include <usbroothubdes.h>
1093
1094 /* Hub class-specific descriptor is constructed dynamically */
1095
1096 /*-------------------------------------------------------------------------*/
1097
1098 #define OK(x)                   len = (x); break
1099 #ifdef DEBUG
1100 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1101                                                 &gohci.regs->roothub.status); }
1102 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1103         (x)); ohci_writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
1104 #else
1105 #define WR_RH_STAT(x)           ohci_writel((x), &gohci.regs->roothub.status)
1106 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1107                                     &gohci.regs->roothub.portstatus[wIndex-1])
1108 #endif
1109 #define RD_RH_STAT              roothub_status(&gohci)
1110 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci, wIndex-1)
1111
1112 /* request to virtual root hub */
1113
1114 int rh_check_port_status(ohci_t *controller)
1115 {
1116         __u32 temp, ndp, i;
1117         int res;
1118
1119         res = -1;
1120         temp = roothub_a(controller);
1121         ndp = (temp & RH_A_NDP);
1122 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1123         ndp = (ndp == 2) ? 1:0;
1124 #endif
1125         for (i = 0; i < ndp; i++) {
1126                 temp = roothub_portstatus(controller, i);
1127                 /* check for a device disconnect */
1128                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1129                         (RH_PS_PESC | RH_PS_CSC)) &&
1130                         ((temp & RH_PS_CCS) == 0)) {
1131                         res = i;
1132                         break;
1133                 }
1134         }
1135         return res;
1136 }
1137
1138 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1139                 void *buffer, int transfer_len, struct devrequest *cmd)
1140 {
1141         void *data = buffer;
1142         int leni = transfer_len;
1143         int len = 0;
1144         int stat = 0;
1145         __u16 bmRType_bReq;
1146         __u16 wValue;
1147         __u16 wIndex;
1148         __u16 wLength;
1149         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1150
1151 #ifdef DEBUG
1152 pkt_print(NULL, dev, pipe, buffer, transfer_len,
1153           cmd, "SUB(rh)", usb_pipein(pipe));
1154 #else
1155         mdelay(1);
1156 #endif
1157         if (usb_pipeint(pipe)) {
1158                 info("Root-Hub submit IRQ: NOT implemented");
1159                 return 0;
1160         }
1161
1162         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1163         wValue        = le16_to_cpu(cmd->value);
1164         wIndex        = le16_to_cpu(cmd->index);
1165         wLength       = le16_to_cpu(cmd->length);
1166
1167         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1168                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1169
1170         switch (bmRType_bReq) {
1171         /* Request Destination:
1172            without flags: Device,
1173            RH_INTERFACE: interface,
1174            RH_ENDPOINT: endpoint,
1175            RH_CLASS means HUB here,
1176            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1177         */
1178
1179         case RH_GET_STATUS:
1180                 *(u16 *)databuf = cpu_to_le16(1);
1181                 OK(2);
1182         case RH_GET_STATUS | RH_INTERFACE:
1183                 *(u16 *)databuf = cpu_to_le16(0);
1184                 OK(2);
1185         case RH_GET_STATUS | RH_ENDPOINT:
1186                 *(u16 *)databuf = cpu_to_le16(0);
1187                 OK(2);
1188         case RH_GET_STATUS | RH_CLASS:
1189                 *(u32 *)databuf = cpu_to_le32(
1190                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1191                 OK(4);
1192         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1193                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1194                 OK(4);
1195
1196         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1197                 switch (wValue) {
1198                 case (RH_ENDPOINT_STALL):
1199                         OK(0);
1200                 }
1201                 break;
1202
1203         case RH_CLEAR_FEATURE | RH_CLASS:
1204                 switch (wValue) {
1205                 case RH_C_HUB_LOCAL_POWER:
1206                         OK(0);
1207                 case (RH_C_HUB_OVER_CURRENT):
1208                         WR_RH_STAT(RH_HS_OCIC);
1209                         OK(0);
1210                 }
1211                 break;
1212
1213         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1214                 switch (wValue) {
1215                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1216                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1217                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1218                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1219                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1220                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1221                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1222                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1223                 }
1224                 break;
1225
1226         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1227                 switch (wValue) {
1228                 case (RH_PORT_SUSPEND):
1229                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1230                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1231                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1232                                 WR_RH_PORTSTAT(RH_PS_PRS);
1233                         OK(0);
1234                 case (RH_PORT_POWER):
1235                         WR_RH_PORTSTAT(RH_PS_PPS);
1236                         mdelay(100);
1237                         OK(0);
1238                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1239                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1240                                 WR_RH_PORTSTAT(RH_PS_PES);
1241                         OK(0);
1242                 }
1243                 break;
1244
1245         case RH_SET_ADDRESS:
1246                 gohci.rh.devnum = wValue;
1247                 OK(0);
1248
1249         case RH_GET_DESCRIPTOR:
1250                 switch ((wValue & 0xff00) >> 8) {
1251                 case (0x01): /* device descriptor */
1252                         len = min_t(unsigned int,
1253                                         leni,
1254                                         min_t(unsigned int,
1255                                         sizeof(root_hub_dev_des),
1256                                         wLength));
1257                         databuf = root_hub_dev_des; OK(len);
1258                 case (0x02): /* configuration descriptor */
1259                         len = min_t(unsigned int,
1260                                         leni,
1261                                         min_t(unsigned int,
1262                                         sizeof(root_hub_config_des),
1263                                         wLength));
1264                         databuf = root_hub_config_des; OK(len);
1265                 case (0x03): /* string descriptors */
1266                         if (wValue == 0x0300) {
1267                                 len = min_t(unsigned int,
1268                                                 leni,
1269                                                 min_t(unsigned int,
1270                                                 sizeof(root_hub_str_index0),
1271                                                 wLength));
1272                                 databuf = root_hub_str_index0;
1273                                 OK(len);
1274                         }
1275                         if (wValue == 0x0301) {
1276                                 len = min_t(unsigned int,
1277                                                 leni,
1278                                                 min_t(unsigned int,
1279                                                 sizeof(root_hub_str_index1),
1280                                                 wLength));
1281                                 databuf = root_hub_str_index1;
1282                                 OK(len);
1283                 }
1284                 default:
1285                         stat = USB_ST_STALLED;
1286                 }
1287                 break;
1288
1289         case RH_GET_DESCRIPTOR | RH_CLASS:
1290         {
1291                 __u32 temp = roothub_a(&gohci);
1292
1293                 databuf[0] = 9;         /* min length; */
1294                 databuf[1] = 0x29;
1295                 databuf[2] = temp & RH_A_NDP;
1296 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1297                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1298 #endif
1299                 databuf[3] = 0;
1300                 if (temp & RH_A_PSM)    /* per-port power switching? */
1301                         databuf[3] |= 0x1;
1302                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1303                         databuf[3] |= 0x10;
1304                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1305                         databuf[3] |= 0x8;
1306
1307                 databuf[4] = 0;
1308                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1309                 databuf[6] = 0;
1310                 temp = roothub_b(&gohci);
1311                 databuf[7] = temp & RH_B_DR;
1312                 if (databuf[2] < 7) {
1313                         databuf[8] = 0xff;
1314                 } else {
1315                         databuf[0] += 2;
1316                         databuf[8] = (temp & RH_B_DR) >> 8;
1317                         databuf[10] = databuf[9] = 0xff;
1318                 }
1319
1320                 len = min_t(unsigned int, leni,
1321                             min_t(unsigned int, databuf[0], wLength));
1322                 OK(len);
1323         }
1324
1325         case RH_GET_CONFIGURATION:
1326                 databuf[0] = 0x01;
1327                 OK(1);
1328
1329         case RH_SET_CONFIGURATION:
1330                 WR_RH_STAT(0x10000);
1331                 OK(0);
1332
1333         default:
1334                 dbg("unsupported root hub command");
1335                 stat = USB_ST_STALLED;
1336         }
1337
1338 #ifdef  DEBUG
1339         ohci_dump_roothub(&gohci, 1);
1340 #else
1341         mdelay(1);
1342 #endif
1343
1344         len = min_t(int, len, leni);
1345         if (data != databuf)
1346                 memcpy(data, databuf, len);
1347         dev->act_len = len;
1348         dev->status = stat;
1349
1350 #ifdef DEBUG
1351         pkt_print(NULL, dev, pipe, buffer,
1352                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1353 #else
1354         mdelay(1);
1355 #endif
1356
1357         return stat;
1358 }
1359
1360 /*-------------------------------------------------------------------------*/
1361
1362 /* common code for handling submit messages - used for all but root hub */
1363 /* accesses. */
1364 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1365                 int transfer_len, struct devrequest *setup, int interval)
1366 {
1367         int stat = 0;
1368         int maxsize = usb_maxpacket(dev, pipe);
1369         int timeout;
1370         urb_priv_t *urb;
1371
1372         urb = malloc(sizeof(urb_priv_t));
1373         memset(urb, 0, sizeof(urb_priv_t));
1374
1375         urb->dev = dev;
1376         urb->pipe = pipe;
1377         urb->transfer_buffer = buffer;
1378         urb->transfer_buffer_length = transfer_len;
1379         urb->interval = interval;
1380
1381 #ifdef DEBUG
1382         urb->actual_length = 0;
1383         pkt_print(urb, dev, pipe, buffer, transfer_len,
1384                   setup, "SUB", usb_pipein(pipe));
1385 #else
1386         mdelay(1);
1387 #endif
1388         if (!maxsize) {
1389                 err("submit_common_message: pipesize for pipe %lx is zero",
1390                         pipe);
1391                 return -1;
1392         }
1393
1394         if (sohci_submit_job(urb, setup) < 0) {
1395                 err("sohci_submit_job failed");
1396                 return -1;
1397         }
1398
1399 #if 0
1400         mdelay(10);
1401         /* ohci_dump_status(&gohci); */
1402 #endif
1403
1404         timeout = USB_TIMEOUT_MS(pipe);
1405
1406         /* wait for it to complete */
1407         for (;;) {
1408                 /* check whether the controller is done */
1409                 stat = hc_interrupt();
1410                 if (stat < 0) {
1411                         stat = USB_ST_CRC_ERR;
1412                         break;
1413                 }
1414
1415                 /* NOTE: since we are not interrupt driven in U-Boot and always
1416                  * handle only one URB at a time, we cannot assume the
1417                  * transaction finished on the first successful return from
1418                  * hc_interrupt().. unless the flag for current URB is set,
1419                  * meaning that all TD's to/from device got actually
1420                  * transferred and processed. If the current URB is not
1421                  * finished we need to re-iterate this loop so as
1422                  * hc_interrupt() gets called again as there needs to be some
1423                  * more TD's to process still */
1424                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1425                         /* 0xff is returned for an SF-interrupt */
1426                         break;
1427                 }
1428
1429                 if (--timeout) {
1430                         mdelay(1);
1431                         if (!urb->finished)
1432                                 dbg("*");
1433
1434                 } else {
1435                         err("CTL:TIMEOUT ");
1436                         dbg("submit_common_msg: TO status %x\n", stat);
1437                         urb->finished = 1;
1438                         stat = USB_ST_CRC_ERR;
1439                         break;
1440                 }
1441         }
1442
1443         dev->status = stat;
1444         dev->act_len = urb->actual_length;
1445
1446 #ifdef DEBUG
1447         pkt_print(urb, dev, pipe, buffer, transfer_len,
1448                   setup, "RET(ctlr)", usb_pipein(pipe));
1449 #else
1450         mdelay(1);
1451 #endif
1452
1453         /* free TDs in urb_priv */
1454         if (!usb_pipeint(pipe))
1455                 urb_free_priv(urb);
1456         return 0;
1457 }
1458
1459 /* submit routines called from usb.c */
1460 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1461                 int transfer_len)
1462 {
1463         info("submit_bulk_msg");
1464         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1465 }
1466
1467 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1468                 int transfer_len, struct devrequest *setup)
1469 {
1470         int maxsize = usb_maxpacket(dev, pipe);
1471
1472         info("submit_control_msg");
1473 #ifdef DEBUG
1474         pkt_print(NULL, dev, pipe, buffer, transfer_len,
1475                   setup, "SUB", usb_pipein(pipe));
1476 #else
1477         mdelay(1);
1478 #endif
1479         if (!maxsize) {
1480                 err("submit_control_message: pipesize for pipe %lx is zero",
1481                         pipe);
1482                 return -1;
1483         }
1484         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1485                 gohci.rh.dev = dev;
1486                 /* root hub - redirect */
1487                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1488                         setup);
1489         }
1490
1491         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1492 }
1493
1494 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1495                 int transfer_len, int interval)
1496 {
1497         info("submit_int_msg");
1498         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1499                         interval);
1500 }
1501
1502 /*-------------------------------------------------------------------------*
1503  * HC functions
1504  *-------------------------------------------------------------------------*/
1505
1506 /* reset the HC and BUS */
1507
1508 static int hc_reset(ohci_t *ohci)
1509 {
1510 #ifdef CONFIG_PCI_EHCI_DEVNO
1511         pci_dev_t pdev;
1512 #endif
1513         int timeout = 30;
1514         int smm_timeout = 50; /* 0,5 sec */
1515
1516         dbg("%s\n", __FUNCTION__);
1517
1518 #ifdef CONFIG_PCI_EHCI_DEVNO
1519         /*
1520          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1521          * resetting via EHCI registers only.
1522          */
1523         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1524         if (pdev != -1) {
1525                 u32 base;
1526                 int timeout = 1000;
1527
1528                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1529                 base += EHCI_USBCMD_OFF;
1530                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1531
1532                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1533                         if (timeout-- <= 0) {
1534                                 printf("USB RootHub reset timed out!");
1535                                 break;
1536                         }
1537                         udelay(1);
1538                 }
1539         } else
1540                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1541 #endif
1542         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1543                 /* SMM owns the HC, request ownership */
1544                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1545                 info("USB HC TakeOver from SMM");
1546                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1547                         mdelay(10);
1548                         if (--smm_timeout == 0) {
1549                                 err("USB HC TakeOver failed!");
1550                                 return -1;
1551                         }
1552                 }
1553         }
1554
1555         /* Disable HC interrupts */
1556         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1557
1558         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1559                 ohci->slot_name,
1560                 ohci_readl(&ohci->regs->control));
1561
1562         /* Reset USB (needed by some controllers) */
1563         ohci->hc_control = 0;
1564         ohci_writel(ohci->hc_control, &ohci->regs->control);
1565
1566         /* HC Reset requires max 10 us delay */
1567         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1568         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1569                 if (--timeout == 0) {
1570                         err("USB HC reset timed out!");
1571                         return -1;
1572                 }
1573                 udelay(1);
1574         }
1575         return 0;
1576 }
1577
1578 /*-------------------------------------------------------------------------*/
1579
1580 /* Start an OHCI controller, set the BUS operational
1581  * enable interrupts
1582  * connect the virtual root hub */
1583
1584 static int hc_start(ohci_t *ohci)
1585 {
1586         __u32 mask;
1587         unsigned int fminterval;
1588
1589         ohci->disabled = 1;
1590
1591         /* Tell the controller where the control and bulk lists are
1592          * The lists are empty now. */
1593
1594         ohci_writel(0, &ohci->regs->ed_controlhead);
1595         ohci_writel(0, &ohci->regs->ed_bulkhead);
1596
1597         ohci_writel((__u32)ohci->hcca,
1598                     &ohci->regs->hcca); /* reset clears this */
1599
1600         fminterval = 0x2edf;
1601         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1602         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1603         ohci_writel(fminterval, &ohci->regs->fminterval);
1604         ohci_writel(0x628, &ohci->regs->lsthresh);
1605
1606         /* start controller operations */
1607         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1608         ohci->disabled = 0;
1609         ohci_writel(ohci->hc_control, &ohci->regs->control);
1610
1611         /* disable all interrupts */
1612         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1613                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1614                         OHCI_INTR_OC | OHCI_INTR_MIE);
1615         ohci_writel(mask, &ohci->regs->intrdisable);
1616         /* clear all interrupts */
1617         mask &= ~OHCI_INTR_MIE;
1618         ohci_writel(mask, &ohci->regs->intrstatus);
1619         /* Choose the interrupts we care about now  - but w/o MIE */
1620         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1621         ohci_writel(mask, &ohci->regs->intrenable);
1622
1623 #ifdef  OHCI_USE_NPS
1624         /* required for AMD-756 and some Mac platforms */
1625         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1626                 &ohci->regs->roothub.a);
1627         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1628 #endif  /* OHCI_USE_NPS */
1629
1630         /* POTPGT delay is bits 24-31, in 2 ms units. */
1631         mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1632
1633         /* connect the virtual root hub */
1634         ohci->rh.devnum = 0;
1635
1636         return 0;
1637 }
1638
1639 /*-------------------------------------------------------------------------*/
1640
1641 /* an interrupt happens */
1642
1643 static int hc_interrupt(void)
1644 {
1645         ohci_t *ohci = &gohci;
1646         struct ohci_regs *regs = ohci->regs;
1647         int ints;
1648         int stat = -1;
1649
1650         if ((ohci->hcca->done_head != 0) &&
1651                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1652                 ints =  OHCI_INTR_WDH;
1653         } else {
1654                 ints = ohci_readl(&regs->intrstatus);
1655                 if (ints == ~(u32)0) {
1656                         ohci->disabled++;
1657                         err("%s device removed!", ohci->slot_name);
1658                         return -1;
1659                 } else {
1660                         ints &= ohci_readl(&regs->intrenable);
1661                         if (ints == 0) {
1662                                 dbg("hc_interrupt: returning..\n");
1663                                 return 0xff;
1664                         }
1665                 }
1666         }
1667
1668         /* dbg("Interrupt: %x frame: %x", ints,
1669                                         le16_to_cpu(ohci->hcca->frame_no)); */
1670
1671         if (ints & OHCI_INTR_RHSC)
1672                 stat = 0xff;
1673
1674         if (ints & OHCI_INTR_UE) {
1675                 ohci->disabled++;
1676                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1677                         ohci->slot_name);
1678                 /* e.g. due to PCI Master/Target Abort */
1679
1680 #ifdef  DEBUG
1681                 ohci_dump(ohci, 1);
1682 #else
1683                 mdelay(1);
1684 #endif
1685                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1686                 /* Make some non-interrupt context restart the controller. */
1687                 /* Count and limit the retries though; either hardware or */
1688                 /* software errors can go forever... */
1689                 hc_reset(ohci);
1690                 return -1;
1691         }
1692
1693         if (ints & OHCI_INTR_WDH) {
1694                 mdelay(1);
1695                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1696                 (void)ohci_readl(&regs->intrdisable); /* flush */
1697                 stat = dl_done_list(&gohci);
1698                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1699                 (void)ohci_readl(&regs->intrdisable); /* flush */
1700         }
1701
1702         if (ints & OHCI_INTR_SO) {
1703                 dbg("USB Schedule overrun\n");
1704                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1705                 stat = -1;
1706         }
1707
1708         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1709         if (ints & OHCI_INTR_SF) {
1710                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1711                 mdelay(1);
1712                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1713                 if (ohci->ed_rm_list[frame] != NULL)
1714                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1715                 stat = 0xff;
1716         }
1717
1718         ohci_writel(ints, &regs->intrstatus);
1719         return stat;
1720 }
1721
1722 /*-------------------------------------------------------------------------*/
1723
1724 /*-------------------------------------------------------------------------*/
1725
1726 /* De-allocate all resources.. */
1727
1728 static void hc_release_ohci(ohci_t *ohci)
1729 {
1730         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1731
1732         if (!ohci->disabled)
1733                 hc_reset(ohci);
1734 }
1735
1736 /*-------------------------------------------------------------------------*/
1737
1738 /*
1739  * low level initalisation routine, called from usb.c
1740  */
1741 static char ohci_inited = 0;
1742
1743 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1744 {
1745 #ifdef CONFIG_PCI_OHCI
1746         pci_dev_t pdev;
1747 #endif
1748
1749 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1750         /* cpu dependant init */
1751         if (usb_cpu_init())
1752                 return -1;
1753 #endif
1754
1755 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1756         /*  board dependant init */
1757         if (board_usb_init(index, USB_INIT_HOST))
1758                 return -1;
1759 #endif
1760         memset(&gohci, 0, sizeof(ohci_t));
1761
1762         /* align the storage */
1763         if ((__u32)&ghcca[0] & 0xff) {
1764                 err("HCCA not aligned!!");
1765                 return -1;
1766         }
1767         phcca = &ghcca[0];
1768         info("aligned ghcca %p", phcca);
1769         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1770         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1771                 err("EDs not aligned!!");
1772                 return -1;
1773         }
1774         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1775         if ((__u32)gtd & 0x7) {
1776                 err("TDs not aligned!!");
1777                 return -1;
1778         }
1779         ptd = gtd;
1780         gohci.hcca = phcca;
1781         memset(phcca, 0, sizeof(struct ohci_hcca));
1782
1783         gohci.disabled = 1;
1784         gohci.sleeping = 0;
1785         gohci.irq = -1;
1786 #ifdef CONFIG_PCI_OHCI
1787         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1788
1789         if (pdev != -1) {
1790                 u16 vid, did;
1791                 u32 base;
1792                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1793                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1794                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1795                                 vid, did, (pdev >> 16) & 0xff,
1796                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1797                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1798                 printf("OHCI regs address 0x%08x\n", base);
1799                 gohci.regs = (struct ohci_regs *)base;
1800         } else
1801                 return -1;
1802 #else
1803         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
1804 #endif
1805
1806         gohci.flags = 0;
1807         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
1808
1809         if (hc_reset (&gohci) < 0) {
1810                 hc_release_ohci (&gohci);
1811                 err ("can't reset usb-%s", gohci.slot_name);
1812 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1813                 /* board dependant cleanup */
1814                 board_usb_cleanup(index, USB_INIT_HOST);
1815 #endif
1816
1817 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1818                 /* cpu dependant cleanup */
1819                 usb_cpu_init_fail();
1820 #endif
1821                 return -1;
1822         }
1823
1824         if (hc_start(&gohci) < 0) {
1825                 err("can't start usb-%s", gohci.slot_name);
1826                 hc_release_ohci(&gohci);
1827                 /* Initialization failed */
1828 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1829                 /* board dependant cleanup */
1830                 usb_board_stop();
1831 #endif
1832
1833 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1834                 /* cpu dependant cleanup */
1835                 usb_cpu_stop();
1836 #endif
1837                 return -1;
1838         }
1839
1840 #ifdef  DEBUG
1841         ohci_dump(&gohci, 1);
1842 #else
1843         mdelay(1);
1844 #endif
1845         ohci_inited = 1;
1846         return 0;
1847 }
1848
1849 int usb_lowlevel_stop(int index)
1850 {
1851         /* this gets called really early - before the controller has */
1852         /* even been initialized! */
1853         if (!ohci_inited)
1854                 return 0;
1855         /* TODO release any interrupts, etc. */
1856         /* call hc_release_ohci() here ? */
1857         hc_reset(&gohci);
1858
1859 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1860         /* board dependant cleanup */
1861         if (usb_board_stop())
1862                 return -1;
1863 #endif
1864
1865 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1866         /* cpu dependant cleanup */
1867         if (usb_cpu_stop())
1868                 return -1;
1869 #endif
1870         /* This driver is no longer initialised. It needs a new low-level
1871          * init (board/cpu) before it can be used again. */
1872         ohci_inited = 0;
1873         return 0;
1874 }