drivers/usb/host/ehci-hcd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*-
   3  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   4  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   5  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   6  *
   7  * All rights reserved.
   8  */
   9 #include <common.h>
  10 #include <cpu_func.h>
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <log.h>
  14 #include <asm/byteorder.h>
  15 #include <asm/cache.h>
  16 #include <asm/unaligned.h>
  17 #include <usb.h>
  18 #include <asm/io.h>
  19 #include <malloc.h>
  20 #include <memalign.h>
  21 #include <watchdog.h>
  22 #include <dm/device_compat.h>
  23 #include <linux/compiler.h>
  24 #include <linux/delay.h>
  25
  26 #include "ehci.h"
  27
  28 /*
  29  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
  30  * Let's time out after 8 to have a little safety margin on top of that.
  31  */
  32 #define HCHALT_TIMEOUT (8 * 1000)
  33
  34 #if !CONFIG_IS_ENABLED(DM_USB)
  35 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
  36 #endif
  37
  38 #define ALIGN_END_ADDR(type, ptr, size)                 \
  39         ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
  40
  41 static struct descriptor {
  42         struct usb_hub_descriptor hub;
  43         struct usb_device_descriptor device;
  44         struct usb_linux_config_descriptor config;
  45         struct usb_linux_interface_descriptor interface;
  46         struct usb_endpoint_descriptor endpoint;
  47 }  __attribute__ ((packed)) descriptor = {
  48         {
  49                 0x8,            /* bDescLength */
  50                 0x29,           /* bDescriptorType: hub descriptor */
  51                 2,              /* bNrPorts -- runtime modified */
  52                 0,              /* wHubCharacteristics */
  53                 10,             /* bPwrOn2PwrGood */
  54                 0,              /* bHubCntrCurrent */
  55                 {               /* Device removable */
  56                 }               /* at most 7 ports! XXX */
  57         },
  58         {
  59                 0x12,           /* bLength */
  60                 1,              /* bDescriptorType: UDESC_DEVICE */
  61                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  62                 9,              /* bDeviceClass: UDCLASS_HUB */
  63                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  64                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  65                 64,             /* bMaxPacketSize: 64 bytes */
  66                 0x0000,         /* idVendor */
  67                 0x0000,         /* idProduct */
  68                 cpu_to_le16(0x0100), /* bcdDevice */
  69                 1,              /* iManufacturer */
  70                 2,              /* iProduct */
  71                 0,              /* iSerialNumber */
  72                 1               /* bNumConfigurations: 1 */
  73         },
  74         {
  75                 0x9,
  76                 2,              /* bDescriptorType: UDESC_CONFIG */
  77                 cpu_to_le16(0x19),
  78                 1,              /* bNumInterface */
  79                 1,              /* bConfigurationValue */
  80                 0,              /* iConfiguration */
  81                 0x40,           /* bmAttributes: UC_SELF_POWER */
  82                 0               /* bMaxPower */
  83         },
  84         {
  85                 0x9,            /* bLength */
  86                 4,              /* bDescriptorType: UDESC_INTERFACE */
  87                 0,              /* bInterfaceNumber */
  88                 0,              /* bAlternateSetting */
  89                 1,              /* bNumEndpoints */
  90                 9,              /* bInterfaceClass: UICLASS_HUB */
  91                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  92                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  93                 0               /* iInterface */
  94         },
  95         {
  96                 0x7,            /* bLength */
  97                 5,              /* bDescriptorType: UDESC_ENDPOINT */
  98                 0x81,           /* bEndpointAddress:
  99                                  * UE_DIR_IN | EHCI_INTR_ENDPT
 100                                  */
 101                 3,              /* bmAttributes: UE_INTERRUPT */
 102                 8,              /* wMaxPacketSize */
 103                 255             /* bInterval */
 104         },
 105 };
 106
 107 #if defined(CONFIG_USB_EHCI_IS_TDI)
 108 #define ehci_is_TDI()   (1)
 109 #else
 110 #define ehci_is_TDI()   (0)
 111 #endif
 112
 113 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 114 {
 115 #if CONFIG_IS_ENABLED(DM_USB)
 116         return dev_get_priv(usb_get_bus(udev->dev));
 117 #else
 118         return udev->controller;
 119 #endif
 120 }
 121
 122 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 123 {
 124         return PORTSC_PSPD(reg);
 125 }
 126
 127 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 128 {
 129         uint32_t tmp;
 130         uint32_t *reg_ptr;
 131
 132         reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
 133         tmp = ehci_readl(reg_ptr);
 134         tmp |= USBMODE_CM_HC;
 135 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 136         tmp |= USBMODE_BE;
 137 #else
 138         tmp &= ~USBMODE_BE;
 139 #endif
 140         ehci_writel(reg_ptr, tmp);
 141 }
 142
 143 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 144                                uint32_t *reg)
 145 {
 146         mdelay(50);
 147 }
 148
 149 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 150 {
 151         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 152
 153         if (port < 0 || port >= max_ports) {
 154                 /* Printing the message would cause a scan failure! */
 155                 debug("The request port(%u) exceeds maximum port number\n",
 156                       port);
 157                 return NULL;
 158         }
 159
 160         return (uint32_t *)&ctrl->hcor->or_portsc[port];
 161 }
 162
 163 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 164 {
 165         uint32_t result;
 166         do {
 167                 result = ehci_readl(ptr);
 168                 udelay(5);
 169                 if (result == ~(uint32_t)0)
 170                         return -1;
 171                 result &= mask;
 172                 if (result == done)
 173                         return 0;
 174                 usec--;
 175         } while (usec > 0);
 176         return -1;
 177 }
 178
 179 static int ehci_reset(struct ehci_ctrl *ctrl)
 180 {
 181         uint32_t cmd;
 182         int ret = 0;
 183
 184         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 185         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 186         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 187         ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
 188                         CMD_RESET, 0, 250 * 1000);
 189         if (ret < 0) {
 190                 printf("EHCI fail to reset\n");
 191                 goto out;
 192         }
 193
 194         if (ehci_is_TDI())
 195                 ctrl->ops.set_usb_mode(ctrl);
 196
 197 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 198         cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
 199         cmd &= ~TXFIFO_THRESH_MASK;
 200         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
 201         ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
 202 #endif
 203 out:
 204         return ret;
 205 }
 206
 207 static int ehci_shutdown(struct ehci_ctrl *ctrl)
 208 {
 209         int i, ret = 0;
 210         uint32_t cmd, reg;
 211         int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 212
 213         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 214         /* If not run, directly return */
 215         if (!(cmd & CMD_RUN))
 216                 return 0;
 217         cmd &= ~(CMD_PSE | CMD_ASE);
 218         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 219         ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
 220                 100 * 1000);
 221
 222         if (!ret) {
 223                 for (i = 0; i < max_ports; i++) {
 224                         reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 225                         reg |= EHCI_PS_SUSP;
 226                         ehci_writel(&ctrl->hcor->or_portsc[i], reg);
 227                 }
 228
 229                 cmd &= ~CMD_RUN;
 230                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 231                 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
 232                         HCHALT_TIMEOUT);
 233         }
 234
 235         if (ret)
 236                 puts("EHCI failed to shut down host controller.\n");
 237
 238         return ret;
 239 }
 240
 241 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 242 {
 243         uint32_t delta, next;
 244         unsigned long addr = (unsigned long)buf;
 245         int idx;
 246
 247         if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
 248                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
 249
 250         flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
 251
 252         idx = 0;
 253         while (idx < QT_BUFFER_CNT) {
 254                 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
 255                 td->qt_buffer_hi[idx] = 0;
 256                 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
 257                 delta = next - addr;
 258                 if (delta >= sz)
 259                         break;
 260                 sz -= delta;
 261                 addr = next;
 262                 idx++;
 263         }
 264
 265         if (idx == QT_BUFFER_CNT) {
 266                 printf("out of buffer pointers (%zu bytes left)\n", sz);
 267                 return -1;
 268         }
 269
 270         return 0;
 271 }
 272
 273 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
 274 {
 275         #define QH_HIGH_SPEED   2
 276         #define QH_FULL_SPEED   0
 277         #define QH_LOW_SPEED    1
 278         if (speed == USB_SPEED_HIGH)
 279                 return QH_HIGH_SPEED;
 280         if (speed == USB_SPEED_LOW)
 281                 return QH_LOW_SPEED;
 282         return QH_FULL_SPEED;
 283 }
 284
 285 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
 286                                           struct QH *qh)
 287 {
 288         uint8_t portnr = 0;
 289         uint8_t hubaddr = 0;
 290
 291         if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
 292                 return;
 293
 294         usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
 295
 296         qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
 297                                      QH_ENDPT2_HUBADDR(hubaddr));
 298 }
 299
 300 static int ehci_enable_async(struct ehci_ctrl *ctrl)
 301 {
 302         u32 cmd;
 303         int ret;
 304
 305         /* Enable async. schedule. */
 306         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 307         if (cmd & CMD_ASE)
 308                 return 0;
 309
 310         cmd |= CMD_ASE;
 311         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 312
 313         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
 314                         100 * 1000);
 315         if (ret < 0)
 316                 printf("EHCI fail timeout STS_ASS set\n");
 317
 318         return ret;
 319 }
 320
 321 static int ehci_disable_async(struct ehci_ctrl *ctrl)
 322 {
 323         u32 cmd;
 324         int ret;
 325
 326         if (ctrl->async_locked)
 327                 return 0;
 328
 329         /* Disable async schedule. */
 330         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 331         if (!(cmd & CMD_ASE))
 332                 return 0;
 333
 334         cmd &= ~CMD_ASE;
 335         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 336
 337         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
 338                         100 * 1000);
 339         if (ret < 0)
 340                 printf("EHCI fail timeout STS_ASS reset\n");
 341
 342         return ret;
 343 }
 344
 345 static int ehci_iaa_cycle(struct ehci_ctrl *ctrl)
 346 {
 347         u32 cmd, status;
 348         int ret;
 349
 350         /* Enable Interrupt on Async Advance Doorbell. */
 351         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 352         cmd |= CMD_IAAD;
 353         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 354
 355         ret = handshake(&ctrl->hcor->or_usbsts, STS_IAA, STS_IAA,
 356                         10 * 1000); /* 10ms timeout */
 357         if (ret < 0)
 358                 printf("EHCI fail timeout STS_IAA set\n");
 359
 360         status = ehci_readl(&ctrl->hcor->or_usbsts);
 361         if (status & STS_IAA)
 362                 ehci_writel(&ctrl->hcor->or_usbsts, STS_IAA);
 363
 364         return ret;
 365 }
 366
 367 static int
 368 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 369                    int length, struct devrequest *req)
 370 {
 371         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
 372         struct qTD *qtd;
 373         int qtd_count = 0;
 374         int qtd_counter = 0;
 375         volatile struct qTD *vtd;
 376         unsigned long ts;
 377         uint32_t *tdp;
 378         uint32_t endpt, maxpacket, token, usbsts, qhtoken;
 379         uint32_t c, toggle;
 380         int timeout;
 381         int ret = 0;
 382         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 383
 384         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 385               buffer, length, req);
 386         if (req != NULL)
 387                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 388                       req->request, req->request,
 389                       req->requesttype, req->requesttype,
 390                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 391                       le16_to_cpu(req->index));
 392
 393 #define PKT_ALIGN       512
 394         /*
 395          * The USB transfer is split into qTD transfers. Eeach qTD transfer is
 396          * described by a transfer descriptor (the qTD). The qTDs form a linked
 397          * list with a queue head (QH).
 398          *
 399          * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
 400          * have its beginning in a qTD transfer and its end in the following
 401          * one, so the qTD transfer lengths have to be chosen accordingly.
 402          *
 403          * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
 404          * single pages. The first data buffer can start at any offset within a
 405          * page (not considering the cache-line alignment issues), while the
 406          * following buffers must be page-aligned. There is no alignment
 407          * constraint on the size of a qTD transfer.
 408          */
 409         if (req != NULL)
 410                 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
 411                 qtd_count += 1 + 1;
 412         if (length > 0 || req == NULL) {
 413                 /*
 414                  * Determine the qTD transfer size that will be used for the
 415                  * data payload (not considering the first qTD transfer, which
 416                  * may be longer or shorter, and the final one, which may be
 417                  * shorter).
 418                  *
 419                  * In order to keep each packet within a qTD transfer, the qTD
 420                  * transfer size is aligned to PKT_ALIGN, which is a multiple of
 421                  * wMaxPacketSize (except in some cases for interrupt transfers,
 422                  * see comment in submit_int_msg()).
 423                  *
 424                  * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
 425                  * QT_BUFFER_CNT full pages will be used.
 426                  */
 427                 int xfr_sz = QT_BUFFER_CNT;
 428                 /*
 429                  * However, if the input buffer is not aligned to PKT_ALIGN, the
 430                  * qTD transfer size will be one page shorter, and the first qTD
 431                  * data buffer of each transfer will be page-unaligned.
 432                  */
 433                 if ((unsigned long)buffer & (PKT_ALIGN - 1))
 434                         xfr_sz--;
 435                 /* Convert the qTD transfer size to bytes. */
 436                 xfr_sz *= EHCI_PAGE_SIZE;
 437                 /*
 438                  * Approximate by excess the number of qTDs that will be
 439                  * required for the data payload. The exact formula is way more
 440                  * complicated and saves at most 2 qTDs, i.e. a total of 128
 441                  * bytes.
 442                  */
 443                 qtd_count += 2 + length / xfr_sz;
 444         }
 445 /*
 446  * Threshold value based on the worst-case total size of the allocated qTDs for
 447  * a mass-storage transfer of 65535 blocks of 512 bytes.
 448  */
 449 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
 450 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
 451 #endif
 452         qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
 453         if (qtd == NULL) {
 454                 printf("unable to allocate TDs\n");
 455                 return -1;
 456         }
 457
 458         memset(qh, 0, sizeof(struct QH));
 459         memset(qtd, 0, qtd_count * sizeof(*qtd));
 460
 461         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 462
 463         /*
 464          * Setup QH (3.6 in ehci-r10.pdf)
 465          *
 466          *   qh_link ................. 03-00 H
 467          *   qh_endpt1 ............... 07-04 H
 468          *   qh_endpt2 ............... 0B-08 H
 469          * - qh_curtd
 470          *   qh_overlay.qt_next ...... 13-10 H
 471          * - qh_overlay.qt_altnext
 472          */
 473         qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 474         c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
 475         maxpacket = usb_maxpacket(dev, pipe);
 476         endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
 477                 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
 478                 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
 479                 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
 480                 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
 481
 482         /* Force FS for fsl HS quirk */
 483         if (!ctrl->has_fsl_erratum_a005275)
 484                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
 485         else
 486                 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
 487
 488         qh->qh_endpt1 = cpu_to_hc32(endpt);
 489         endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
 490         qh->qh_endpt2 = cpu_to_hc32(endpt);
 491         ehci_update_endpt2_dev_n_port(dev, qh);
 492         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 493         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 494
 495         tdp = &qh->qh_overlay.qt_next;
 496         if (req != NULL) {
 497                 /*
 498                  * Setup request qTD (3.5 in ehci-r10.pdf)
 499                  *
 500                  *   qt_next ................ 03-00 H
 501                  *   qt_altnext ............. 07-04 H
 502                  *   qt_token ............... 0B-08 H
 503                  *
 504                  *   [ buffer, buffer_hi ] loaded with "req".
 505                  */
 506                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 507                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 508                 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
 509                         QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 510                         QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
 511                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 512                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 513                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
 514                         printf("unable to construct SETUP TD\n");
 515                         goto fail;
 516                 }
 517                 /* Update previous qTD! */
 518                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 519                 tdp = &qtd[qtd_counter++].qt_next;
 520                 toggle = 1;
 521         }
 522
 523         if (length > 0 || req == NULL) {
 524                 uint8_t *buf_ptr = buffer;
 525                 int left_length = length;
 526
 527                 do {
 528                         /*
 529                          * Determine the size of this qTD transfer. By default,
 530                          * QT_BUFFER_CNT full pages can be used.
 531                          */
 532                         int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
 533                         /*
 534                          * However, if the input buffer is not page-aligned, the
 535                          * portion of the first page before the buffer start
 536                          * offset within that page is unusable.
 537                          */
 538                         xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
 539                         /*
 540                          * In order to keep each packet within a qTD transfer,
 541                          * align the qTD transfer size to PKT_ALIGN.
 542                          */
 543                         xfr_bytes &= ~(PKT_ALIGN - 1);
 544                         /*
 545                          * This transfer may be shorter than the available qTD
 546                          * transfer size that has just been computed.
 547                          */
 548                         xfr_bytes = min(xfr_bytes, left_length);
 549
 550                         /*
 551                          * Setup request qTD (3.5 in ehci-r10.pdf)
 552                          *
 553                          *   qt_next ................ 03-00 H
 554                          *   qt_altnext ............. 07-04 H
 555                          *   qt_token ............... 0B-08 H
 556                          *
 557                          *   [ buffer, buffer_hi ] loaded with "buffer".
 558                          */
 559                         qtd[qtd_counter].qt_next =
 560                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 561                         qtd[qtd_counter].qt_altnext =
 562                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 563                         token = QT_TOKEN_DT(toggle) |
 564                                 QT_TOKEN_TOTALBYTES(xfr_bytes) |
 565                                 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
 566                                 QT_TOKEN_CERR(3) |
 567                                 QT_TOKEN_PID(usb_pipein(pipe) ?
 568                                         QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
 569                                 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 570                         qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 571                         if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
 572                                                 xfr_bytes)) {
 573                                 printf("unable to construct DATA TD\n");
 574                                 goto fail;
 575                         }
 576                         /* Update previous qTD! */
 577                         *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 578                         tdp = &qtd[qtd_counter++].qt_next;
 579                         /*
 580                          * Data toggle has to be adjusted since the qTD transfer
 581                          * size is not always an even multiple of
 582                          * wMaxPacketSize.
 583                          */
 584                         if ((xfr_bytes / maxpacket) & 1)
 585                                 toggle ^= 1;
 586                         buf_ptr += xfr_bytes;
 587                         left_length -= xfr_bytes;
 588                 } while (left_length > 0);
 589         }
 590
 591         if (req != NULL) {
 592                 /*
 593                  * Setup request qTD (3.5 in ehci-r10.pdf)
 594                  *
 595                  *   qt_next ................ 03-00 H
 596                  *   qt_altnext ............. 07-04 H
 597                  *   qt_token ............... 0B-08 H
 598                  */
 599                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 600                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 601                 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
 602                         QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 603                         QT_TOKEN_PID(usb_pipein(pipe) ?
 604                                 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
 605                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 606                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 607                 /* Update previous qTD! */
 608                 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
 609                 tdp = &qtd[qtd_counter++].qt_next;
 610         }
 611
 612         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
 613
 614         /* Flush dcache */
 615         flush_dcache_range((unsigned long)&ctrl->qh_list,
 616                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 617         flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
 618         flush_dcache_range((unsigned long)qtd,
 619                            ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 620
 621         usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 622         ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 623
 624         ret = ehci_enable_async(ctrl);
 625         if (ret)
 626                 goto fail;
 627
 628         /* Wait for TDs to be processed. */
 629         ts = get_timer(0);
 630         vtd = &qtd[qtd_counter - 1];
 631         timeout = USB_TIMEOUT_MS(pipe);
 632         do {
 633                 /* Invalidate dcache */
 634                 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
 635                         ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 636                 invalidate_dcache_range((unsigned long)qh,
 637                         ALIGN_END_ADDR(struct QH, qh, 1));
 638                 invalidate_dcache_range((unsigned long)qtd,
 639                         ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 640
 641                 token = hc32_to_cpu(vtd->qt_token);
 642                 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
 643                         break;
 644                 WATCHDOG_RESET();
 645         } while (get_timer(ts) < timeout);
 646         qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
 647
 648         ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
 649         flush_dcache_range((unsigned long)&ctrl->qh_list,
 650                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 651
 652         /* Set IAAD, poll IAA */
 653         ret = ehci_iaa_cycle(ctrl);
 654         if (ret)
 655                 goto fail;
 656
 657         /*
 658          * Invalidate the memory area occupied by buffer
 659          * Don't try to fix the buffer alignment, if it isn't properly
 660          * aligned it's upper layer's fault so let invalidate_dcache_range()
 661          * vow about it. But we have to fix the length as it's actual
 662          * transfer length and can be unaligned. This is potentially
 663          * dangerous operation, it's responsibility of the calling
 664          * code to make sure enough space is reserved.
 665          */
 666         if (buffer != NULL && length > 0)
 667                 invalidate_dcache_range((unsigned long)buffer,
 668                         ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 669
 670         /* Check that the TD processing happened */
 671         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 672                 printf("EHCI timed out on TD - token=%#x\n", token);
 673
 674         ret = ehci_disable_async(ctrl);
 675         if (ret)
 676                 goto fail;
 677
 678         if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
 679                 debug("TOKEN=%#x\n", qhtoken);
 680                 switch (QT_TOKEN_GET_STATUS(qhtoken) &
 681                         ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 682                 case 0:
 683                         toggle = QT_TOKEN_GET_DT(qhtoken);
 684                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 685                                        usb_pipeout(pipe), toggle);
 686                         dev->status = 0;
 687                         break;
 688                 case QT_TOKEN_STATUS_HALTED:
 689                         dev->status = USB_ST_STALLED;
 690                         break;
 691                 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
 692                 case QT_TOKEN_STATUS_DATBUFERR:
 693                         dev->status = USB_ST_BUF_ERR;
 694                         break;
 695                 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
 696                 case QT_TOKEN_STATUS_BABBLEDET:
 697                         dev->status = USB_ST_BABBLE_DET;
 698                         break;
 699                 default:
 700                         dev->status = USB_ST_CRC_ERR;
 701                         if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
 702                                 dev->status |= USB_ST_STALLED;
 703                         break;
 704                 }
 705                 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
 706         } else {
 707                 dev->act_len = 0;
 708 #ifndef CONFIG_USB_EHCI_FARADAY
 709                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 710                       dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
 711                       ehci_readl(&ctrl->hcor->or_portsc[0]),
 712                       ehci_readl(&ctrl->hcor->or_portsc[1]));
 713 #endif
 714         }
 715
 716         free(qtd);
 717         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 718
 719 fail:
 720         free(qtd);
 721         return -1;
 722 }
 723
 724 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
 725                             void *buffer, int length, struct devrequest *req)
 726 {
 727         uint8_t tmpbuf[4];
 728         u16 typeReq;
 729         void *srcptr = NULL;
 730         int len, srclen;
 731         uint32_t reg;
 732         uint32_t *status_reg;
 733         int port = le16_to_cpu(req->index) & 0xff;
 734         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 735
 736         srclen = 0;
 737
 738         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 739               req->request, req->request,
 740               req->requesttype, req->requesttype,
 741               le16_to_cpu(req->value), le16_to_cpu(req->index));
 742
 743         typeReq = req->request | req->requesttype << 8;
 744
 745         switch (typeReq) {
 746         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 747         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 748         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 749                 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
 750                 if (!status_reg)
 751                         return -1;
 752                 break;
 753         default:
 754                 status_reg = NULL;
 755                 break;
 756         }
 757
 758         switch (typeReq) {
 759         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 760                 switch (le16_to_cpu(req->value) >> 8) {
 761                 case USB_DT_DEVICE:
 762                         debug("USB_DT_DEVICE request\n");
 763                         srcptr = &descriptor.device;
 764                         srclen = descriptor.device.bLength;
 765                         break;
 766                 case USB_DT_CONFIG:
 767                         debug("USB_DT_CONFIG config\n");
 768                         srcptr = &descriptor.config;
 769                         srclen = descriptor.config.bLength +
 770                                         descriptor.interface.bLength +
 771                                         descriptor.endpoint.bLength;
 772                         break;
 773                 case USB_DT_STRING:
 774                         debug("USB_DT_STRING config\n");
 775                         switch (le16_to_cpu(req->value) & 0xff) {
 776                         case 0: /* Language */
 777                                 srcptr = "\4\3\1\0";
 778                                 srclen = 4;
 779                                 break;
 780                         case 1: /* Vendor */
 781                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 782                                 srclen = 14;
 783                                 break;
 784                         case 2: /* Product */
 785                                 srcptr = "\52\3E\0H\0C\0I\0 "
 786                                          "\0H\0o\0s\0t\0 "
 787                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 788                                 srclen = 42;
 789                                 break;
 790                         default:
 791                                 debug("unknown value DT_STRING %x\n",
 792                                         le16_to_cpu(req->value));
 793                                 goto unknown;
 794                         }
 795                         break;
 796                 default:
 797                         debug("unknown value %x\n", le16_to_cpu(req->value));
 798                         goto unknown;
 799                 }
 800                 break;
 801         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 802                 switch (le16_to_cpu(req->value) >> 8) {
 803                 case USB_DT_HUB:
 804                         debug("USB_DT_HUB config\n");
 805                         srcptr = &descriptor.hub;
 806                         srclen = descriptor.hub.bLength;
 807                         break;
 808                 default:
 809                         debug("unknown value %x\n", le16_to_cpu(req->value));
 810                         goto unknown;
 811                 }
 812                 break;
 813         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 814                 debug("USB_REQ_SET_ADDRESS\n");
 815                 ctrl->rootdev = le16_to_cpu(req->value);
 816                 break;
 817         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 818                 debug("USB_REQ_SET_CONFIGURATION\n");
 819                 /* Nothing to do */
 820                 break;
 821         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 822                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 823                 tmpbuf[1] = 0;
 824                 srcptr = tmpbuf;
 825                 srclen = 2;
 826                 break;
 827         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 828                 memset(tmpbuf, 0, 4);
 829                 reg = ehci_readl(status_reg);
 830                 if (reg & EHCI_PS_CS)
 831                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 832                 if (reg & EHCI_PS_PE)
 833                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 834                 if (reg & EHCI_PS_SUSP)
 835                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 836                 if (reg & EHCI_PS_OCA)
 837                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 838                 if (reg & EHCI_PS_PR)
 839                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 840                 if (reg & EHCI_PS_PP)
 841                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 842
 843                 if (ehci_is_TDI()) {
 844                         switch (ctrl->ops.get_port_speed(ctrl, reg)) {
 845                         case PORTSC_PSPD_FS:
 846                                 break;
 847                         case PORTSC_PSPD_LS:
 848                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 849                                 break;
 850                         case PORTSC_PSPD_HS:
 851                         default:
 852                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 853                                 break;
 854                         }
 855                 } else {
 856                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 857                 }
 858
 859                 if (reg & EHCI_PS_CSC)
 860                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 861                 if (reg & EHCI_PS_PEC)
 862                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 863                 if (reg & EHCI_PS_OCC)
 864                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 865                 if (ctrl->portreset & (1 << port))
 866                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 867
 868                 srcptr = tmpbuf;
 869                 srclen = 4;
 870                 break;
 871         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 872                 reg = ehci_readl(status_reg);
 873                 reg &= ~EHCI_PS_CLEAR;
 874                 switch (le16_to_cpu(req->value)) {
 875                 case USB_PORT_FEAT_ENABLE:
 876                         reg |= EHCI_PS_PE;
 877                         ehci_writel(status_reg, reg);
 878                         break;
 879                 case USB_PORT_FEAT_POWER:
 880                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 881                                 reg |= EHCI_PS_PP;
 882                                 ehci_writel(status_reg, reg);
 883                         }
 884                         break;
 885                 case USB_PORT_FEAT_RESET:
 886                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 887                             !ehci_is_TDI() &&
 888                             EHCI_PS_IS_LOWSPEED(reg)) {
 889                                 /* Low speed device, give up ownership. */
 890                                 debug("port %d low speed --> companion\n",
 891                                       port - 1);
 892                                 reg |= EHCI_PS_PO;
 893                                 ehci_writel(status_reg, reg);
 894                                 return -ENXIO;
 895                         } else {
 896                                 int ret;
 897
 898                                 /* Disable chirp for HS erratum */
 899                                 if (ctrl->has_fsl_erratum_a005275)
 900                                         reg |= PORTSC_FSL_PFSC;
 901
 902                                 reg |= EHCI_PS_PR;
 903                                 reg &= ~EHCI_PS_PE;
 904                                 ehci_writel(status_reg, reg);
 905                                 /*
 906                                  * caller must wait, then call GetPortStatus
 907                                  * usb 2.0 specification say 50 ms resets on
 908                                  * root
 909                                  */
 910                                 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
 911
 912                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 913                                 /*
 914                                  * A host controller must terminate the reset
 915                                  * and stabilize the state of the port within
 916                                  * 2 milliseconds
 917                                  */
 918                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 919                                                 2 * 1000);
 920                                 if (!ret) {
 921                                         reg = ehci_readl(status_reg);
 922                                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
 923                                             == EHCI_PS_CS && !ehci_is_TDI()) {
 924                                                 debug("port %d full speed --> companion\n", port - 1);
 925                                                 reg &= ~EHCI_PS_CLEAR;
 926                                                 reg |= EHCI_PS_PO;
 927                                                 ehci_writel(status_reg, reg);
 928                                                 return -ENXIO;
 929                                         } else {
 930                                                 ctrl->portreset |= 1 << port;
 931                                         }
 932                                 } else {
 933                                         printf("port(%d) reset error\n",
 934                                                port - 1);
 935                                 }
 936                         }
 937                         break;
 938                 case USB_PORT_FEAT_TEST:
 939                         ehci_shutdown(ctrl);
 940                         reg &= ~(0xf << 16);
 941                         reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
 942                         ehci_writel(status_reg, reg);
 943                         break;
 944                 default:
 945                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 946                         goto unknown;
 947                 }
 948                 /* unblock posted writes */
 949                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 950                 break;
 951         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 952                 reg = ehci_readl(status_reg);
 953                 reg &= ~EHCI_PS_CLEAR;
 954                 switch (le16_to_cpu(req->value)) {
 955                 case USB_PORT_FEAT_ENABLE:
 956                         reg &= ~EHCI_PS_PE;
 957                         break;
 958                 case USB_PORT_FEAT_C_ENABLE:
 959                         reg |= EHCI_PS_PE;
 960                         break;
 961                 case USB_PORT_FEAT_POWER:
 962                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
 963                                 reg &= ~EHCI_PS_PP;
 964                         break;
 965                 case USB_PORT_FEAT_C_CONNECTION:
 966                         reg |= EHCI_PS_CSC;
 967                         break;
 968                 case USB_PORT_FEAT_OVER_CURRENT:
 969                         reg |= EHCI_PS_OCC;
 970                         break;
 971                 case USB_PORT_FEAT_C_RESET:
 972                         ctrl->portreset &= ~(1 << port);
 973                         break;
 974                 default:
 975                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 976                         goto unknown;
 977                 }
 978                 ehci_writel(status_reg, reg);
 979                 /* unblock posted write */
 980                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 981                 break;
 982         default:
 983                 debug("Unknown request\n");
 984                 goto unknown;
 985         }
 986
 987         mdelay(1);
 988         len = min3(srclen, (int)le16_to_cpu(req->length), length);
 989         if (srcptr != NULL && len > 0)
 990                 memcpy(buffer, srcptr, len);
 991         else
 992                 debug("Len is 0\n");
 993
 994         dev->act_len = len;
 995         dev->status = 0;
 996         return 0;
 997
 998 unknown:
 999         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
1000               req->requesttype, req->request, le16_to_cpu(req->value),
1001               le16_to_cpu(req->index), le16_to_cpu(req->length));
1002
1003         dev->act_len = 0;
1004         dev->status = USB_ST_STALLED;
1005         return -1;
1006 }
1007
1008 static const struct ehci_ops default_ehci_ops = {
1009         .set_usb_mode           = ehci_set_usbmode,
1010         .get_port_speed         = ehci_get_port_speed,
1011         .powerup_fixup          = ehci_powerup_fixup,
1012         .get_portsc_register    = ehci_get_portsc_register,
1013 };
1014
1015 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
1016 {
1017         if (!ops) {
1018                 ctrl->ops = default_ehci_ops;
1019         } else {
1020                 ctrl->ops = *ops;
1021                 if (!ctrl->ops.set_usb_mode)
1022                         ctrl->ops.set_usb_mode = ehci_set_usbmode;
1023                 if (!ctrl->ops.get_port_speed)
1024                         ctrl->ops.get_port_speed = ehci_get_port_speed;
1025                 if (!ctrl->ops.powerup_fixup)
1026                         ctrl->ops.powerup_fixup = ehci_powerup_fixup;
1027                 if (!ctrl->ops.get_portsc_register)
1028                         ctrl->ops.get_portsc_register =
1029                                         ehci_get_portsc_register;
1030         }
1031 }
1032
1033 #if !CONFIG_IS_ENABLED(DM_USB)
1034 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
1035 {
1036         struct ehci_ctrl *ctrl = &ehcic[index];
1037
1038         ctrl->priv = priv;
1039         ehci_setup_ops(ctrl, ops);
1040 }
1041
1042 void *ehci_get_controller_priv(int index)
1043 {
1044         return ehcic[index].priv;
1045 }
1046 #endif
1047
1048 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
1049 {
1050         struct QH *qh_list;
1051         struct QH *periodic;
1052         uint32_t reg;
1053         uint32_t cmd;
1054         int i;
1055
1056         /* Set the high address word (aka segment) for 64-bit controller */
1057         if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1058                 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
1059
1060         qh_list = &ctrl->qh_list;
1061
1062         /* Set head of reclaim list */
1063         memset(qh_list, 0, sizeof(*qh_list));
1064         qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
1065         qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1066                                                 QH_ENDPT1_EPS(USB_SPEED_HIGH));
1067         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1068         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1069         qh_list->qh_overlay.qt_token =
1070                         cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1071
1072         flush_dcache_range((unsigned long)qh_list,
1073                            ALIGN_END_ADDR(struct QH, qh_list, 1));
1074
1075         /* Set async. queue head pointer. */
1076         ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
1077
1078         /*
1079          * Set up periodic list
1080          * Step 1: Parent QH for all periodic transfers.
1081          */
1082         ctrl->periodic_schedules = 0;
1083         periodic = &ctrl->periodic_queue;
1084         memset(periodic, 0, sizeof(*periodic));
1085         periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1086         periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1087         periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1088
1089         flush_dcache_range((unsigned long)periodic,
1090                            ALIGN_END_ADDR(struct QH, periodic, 1));
1091
1092         /*
1093          * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1094          *         In particular, device specifications on polling frequency
1095          *         are disregarded. Keyboards seem to send NAK/NYet reliably
1096          *         when polled with an empty buffer.
1097          *
1098          *         Split Transactions will be spread across microframes using
1099          *         S-mask and C-mask.
1100          */
1101         if (ctrl->periodic_list == NULL)
1102                 ctrl->periodic_list = memalign(4096, 1024 * 4);
1103
1104         if (!ctrl->periodic_list)
1105                 return -ENOMEM;
1106         for (i = 0; i < 1024; i++) {
1107                 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1108                                                 | QH_LINK_TYPE_QH);
1109         }
1110
1111         flush_dcache_range((unsigned long)ctrl->periodic_list,
1112                            ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1113                                           1024));
1114
1115         /* Set periodic list base address */
1116         ehci_writel(&ctrl->hcor->or_periodiclistbase,
1117                 (unsigned long)ctrl->periodic_list);
1118
1119         reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1120         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1121         debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1122         /* Port Indicators */
1123         if (HCS_INDICATOR(reg))
1124                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1125                                 | 0x80, &descriptor.hub.wHubCharacteristics);
1126         /* Port Power Control */
1127         if (HCS_PPC(reg))
1128                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1129                                 | 0x01, &descriptor.hub.wHubCharacteristics);
1130
1131         /* Start the host controller. */
1132         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1133         /*
1134          * Philips, Intel, and maybe others need CMD_RUN before the
1135          * root hub will detect new devices (why?); NEC doesn't
1136          */
1137         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1138         cmd |= CMD_RUN;
1139         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1140
1141         if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1142                 /* take control over the ports */
1143                 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1144                 cmd |= FLAG_CF;
1145                 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1146         }
1147
1148         /* unblock posted write */
1149         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1150         mdelay(5);
1151         reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1152         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1153
1154         return 0;
1155 }
1156
1157 #if !CONFIG_IS_ENABLED(DM_USB)
1158 int usb_lowlevel_stop(int index)
1159 {
1160         ehci_shutdown(&ehcic[index]);
1161         return ehci_hcd_stop(index);
1162 }
1163
1164 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1165 {
1166         struct ehci_ctrl *ctrl = &ehcic[index];
1167         uint tweaks = 0;
1168         int rc;
1169
1170         /**
1171          * Set ops to default_ehci_ops, ehci_hcd_init should call
1172          * ehci_set_controller_priv to change any of these function pointers.
1173          */
1174         ctrl->ops = default_ehci_ops;
1175
1176         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1177         if (rc)
1178                 return rc;
1179         if (!ctrl->hccr || !ctrl->hcor)
1180                 return -1;
1181         if (init == USB_INIT_DEVICE)
1182                 goto done;
1183
1184         /* EHCI spec section 4.1 */
1185         if (ehci_reset(ctrl))
1186                 return -1;
1187
1188 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1189         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1190         if (rc)
1191                 return rc;
1192 #endif
1193 #ifdef CONFIG_USB_EHCI_FARADAY
1194         tweaks |= EHCI_TWEAK_NO_INIT_CF;
1195 #endif
1196         rc = ehci_common_init(ctrl, tweaks);
1197         if (rc)
1198                 return rc;
1199
1200         ctrl->rootdev = 0;
1201 done:
1202         *controller = &ehcic[index];
1203         return 0;
1204 }
1205 #endif
1206
1207 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1208                                  void *buffer, int length)
1209 {
1210
1211         if (usb_pipetype(pipe) != PIPE_BULK) {
1212                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1213                 return -1;
1214         }
1215         return ehci_submit_async(dev, pipe, buffer, length, NULL);
1216 }
1217
1218 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1219                                     void *buffer, int length,
1220                                     struct devrequest *setup)
1221 {
1222         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1223
1224         if (usb_pipetype(pipe) != PIPE_CONTROL) {
1225                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1226                 return -1;
1227         }
1228
1229         if (usb_pipedevice(pipe) == ctrl->rootdev) {
1230                 if (!ctrl->rootdev)
1231                         dev->speed = USB_SPEED_HIGH;
1232                 return ehci_submit_root(dev, pipe, buffer, length, setup);
1233         }
1234         return ehci_submit_async(dev, pipe, buffer, length, setup);
1235 }
1236
1237 struct int_queue {
1238         int elementsize;
1239         unsigned long pipe;
1240         struct QH *first;
1241         struct QH *current;
1242         struct QH *last;
1243         struct qTD *tds;
1244 };
1245
1246 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1247
1248 static int
1249 enable_periodic(struct ehci_ctrl *ctrl)
1250 {
1251         uint32_t cmd;
1252         struct ehci_hcor *hcor = ctrl->hcor;
1253         int ret;
1254
1255         cmd = ehci_readl(&hcor->or_usbcmd);
1256         cmd |= CMD_PSE;
1257         ehci_writel(&hcor->or_usbcmd, cmd);
1258
1259         ret = handshake((uint32_t *)&hcor->or_usbsts,
1260                         STS_PSS, STS_PSS, 100 * 1000);
1261         if (ret < 0) {
1262                 printf("EHCI failed: timeout when enabling periodic list\n");
1263                 return -ETIMEDOUT;
1264         }
1265         udelay(1000);
1266         return 0;
1267 }
1268
1269 static int
1270 disable_periodic(struct ehci_ctrl *ctrl)
1271 {
1272         uint32_t cmd;
1273         struct ehci_hcor *hcor = ctrl->hcor;
1274         int ret;
1275
1276         cmd = ehci_readl(&hcor->or_usbcmd);
1277         cmd &= ~CMD_PSE;
1278         ehci_writel(&hcor->or_usbcmd, cmd);
1279
1280         ret = handshake((uint32_t *)&hcor->or_usbsts,
1281                         STS_PSS, 0, 100 * 1000);
1282         if (ret < 0) {
1283                 printf("EHCI failed: timeout when disabling periodic list\n");
1284                 return -ETIMEDOUT;
1285         }
1286         return 0;
1287 }
1288
1289 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1290                         unsigned long pipe, int queuesize, int elementsize,
1291                         void *buffer, int interval)
1292 {
1293         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1294         struct int_queue *result = NULL;
1295         uint32_t i, toggle;
1296
1297         /*
1298          * Interrupt transfers requiring several transactions are not supported
1299          * because bInterval is ignored.
1300          *
1301          * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1302          * <= PKT_ALIGN if several qTDs are required, while the USB
1303          * specification does not constrain this for interrupt transfers. That
1304          * means that ehci_submit_async() would support interrupt transfers
1305          * requiring several transactions only as long as the transfer size does
1306          * not require more than a single qTD.
1307          */
1308         if (elementsize > usb_maxpacket(dev, pipe)) {
1309                 printf("%s: xfers requiring several transactions are not supported.\n",
1310                        __func__);
1311                 return NULL;
1312         }
1313
1314         debug("Enter create_int_queue\n");
1315         if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1316                 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1317                 return NULL;
1318         }
1319
1320         /* limit to 4 full pages worth of data -
1321          * we can safely fit them in a single TD,
1322          * no matter the alignment
1323          */
1324         if (elementsize >= 16384) {
1325                 debug("too large elements for interrupt transfers\n");
1326                 return NULL;
1327         }
1328
1329         result = malloc(sizeof(*result));
1330         if (!result) {
1331                 debug("ehci intr queue: out of memory\n");
1332                 goto fail1;
1333         }
1334         result->elementsize = elementsize;
1335         result->pipe = pipe;
1336         result->first = memalign(USB_DMA_MINALIGN,
1337                                  sizeof(struct QH) * queuesize);
1338         if (!result->first) {
1339                 debug("ehci intr queue: out of memory\n");
1340                 goto fail2;
1341         }
1342         result->current = result->first;
1343         result->last = result->first + queuesize - 1;
1344         result->tds = memalign(USB_DMA_MINALIGN,
1345                                sizeof(struct qTD) * queuesize);
1346         if (!result->tds) {
1347                 debug("ehci intr queue: out of memory\n");
1348                 goto fail3;
1349         }
1350         memset(result->first, 0, sizeof(struct QH) * queuesize);
1351         memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1352
1353         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1354
1355         for (i = 0; i < queuesize; i++) {
1356                 struct QH *qh = result->first + i;
1357                 struct qTD *td = result->tds + i;
1358                 void **buf = &qh->buffer;
1359
1360                 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1361                 if (i == queuesize - 1)
1362                         qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1363
1364                 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1365                 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1366                 qh->qh_endpt1 =
1367                         cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1368                         (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1369                         (1 << 14) |
1370                         QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1371                         (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1372                         (usb_pipedevice(pipe) << 0));
1373                 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1374                         (1 << 0)); /* S-mask: microframe 0 */
1375                 if (dev->speed == USB_SPEED_LOW ||
1376                                 dev->speed == USB_SPEED_FULL) {
1377                         /* C-mask: microframes 2-4 */
1378                         qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1379                 }
1380                 ehci_update_endpt2_dev_n_port(dev, qh);
1381
1382                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1383                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1384                 debug("communication direction is '%s'\n",
1385                       usb_pipein(pipe) ? "in" : "out");
1386                 td->qt_token = cpu_to_hc32(
1387                         QT_TOKEN_DT(toggle) |
1388                         (elementsize << 16) |
1389                         ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1390                         0x80); /* active */
1391                 td->qt_buffer[0] =
1392                     cpu_to_hc32((unsigned long)buffer + i * elementsize);
1393                 td->qt_buffer[1] =
1394                     cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1395                 td->qt_buffer[2] =
1396                     cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1397                 td->qt_buffer[3] =
1398                     cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1399                 td->qt_buffer[4] =
1400                     cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1401
1402                 *buf = buffer + i * elementsize;
1403                 toggle ^= 1;
1404         }
1405
1406         flush_dcache_range((unsigned long)buffer,
1407                            ALIGN_END_ADDR(char, buffer,
1408                                           queuesize * elementsize));
1409         flush_dcache_range((unsigned long)result->first,
1410                            ALIGN_END_ADDR(struct QH, result->first,
1411                                           queuesize));
1412         flush_dcache_range((unsigned long)result->tds,
1413                            ALIGN_END_ADDR(struct qTD, result->tds,
1414                                           queuesize));
1415
1416         if (ctrl->periodic_schedules > 0) {
1417                 if (disable_periodic(ctrl) < 0) {
1418                         debug("FATAL: periodic should never fail, but did");
1419                         goto fail3;
1420                 }
1421         }
1422
1423         /* hook up to periodic list */
1424         struct QH *list = &ctrl->periodic_queue;
1425         result->last->qh_link = list->qh_link;
1426         list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1427
1428         flush_dcache_range((unsigned long)result->last,
1429                            ALIGN_END_ADDR(struct QH, result->last, 1));
1430         flush_dcache_range((unsigned long)list,
1431                            ALIGN_END_ADDR(struct QH, list, 1));
1432
1433         if (enable_periodic(ctrl) < 0) {
1434                 debug("FATAL: periodic should never fail, but did");
1435                 goto fail3;
1436         }
1437         ctrl->periodic_schedules++;
1438
1439         debug("Exit create_int_queue\n");
1440         return result;
1441 fail3:
1442         free(result->tds);
1443 fail2:
1444         free(result->first);
1445         free(result);
1446 fail1:
1447         return NULL;
1448 }
1449
1450 static void *_ehci_poll_int_queue(struct usb_device *dev,
1451                                   struct int_queue *queue)
1452 {
1453         struct QH *cur = queue->current;
1454         struct qTD *cur_td;
1455         uint32_t token, toggle;
1456         unsigned long pipe = queue->pipe;
1457
1458         /* depleted queue */
1459         if (cur == NULL) {
1460                 debug("Exit poll_int_queue with completed queue\n");
1461                 return NULL;
1462         }
1463         /* still active */
1464         cur_td = &queue->tds[queue->current - queue->first];
1465         invalidate_dcache_range((unsigned long)cur_td,
1466                                 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1467         token = hc32_to_cpu(cur_td->qt_token);
1468         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1469                 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1470                 return NULL;
1471         }
1472
1473         toggle = QT_TOKEN_GET_DT(token);
1474         usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1475
1476         if (!(cur->qh_link & QH_LINK_TERMINATE))
1477                 queue->current++;
1478         else
1479                 queue->current = NULL;
1480
1481         invalidate_dcache_range((unsigned long)cur->buffer,
1482                                 ALIGN_END_ADDR(char, cur->buffer,
1483                                                queue->elementsize));
1484
1485         debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1486               token, cur, queue->first);
1487         return cur->buffer;
1488 }
1489
1490 /* Do not free buffers associated with QHs, they're owned by someone else */
1491 static int _ehci_destroy_int_queue(struct usb_device *dev,
1492                                    struct int_queue *queue)
1493 {
1494         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1495         int result = -1;
1496         unsigned long timeout;
1497
1498         if (disable_periodic(ctrl) < 0) {
1499                 debug("FATAL: periodic should never fail, but did");
1500                 goto out;
1501         }
1502         ctrl->periodic_schedules--;
1503
1504         struct QH *cur = &ctrl->periodic_queue;
1505         timeout = get_timer(0) + 500; /* abort after 500ms */
1506         while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1507                 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1508                 if (NEXT_QH(cur) == queue->first) {
1509                         debug("found candidate. removing from chain\n");
1510                         cur->qh_link = queue->last->qh_link;
1511                         flush_dcache_range((unsigned long)cur,
1512                                            ALIGN_END_ADDR(struct QH, cur, 1));
1513                         result = 0;
1514                         break;
1515                 }
1516                 cur = NEXT_QH(cur);
1517                 if (get_timer(0) > timeout) {
1518                         printf("Timeout destroying interrupt endpoint queue\n");
1519                         result = -1;
1520                         goto out;
1521                 }
1522         }
1523
1524         if (ctrl->periodic_schedules > 0) {
1525                 result = enable_periodic(ctrl);
1526                 if (result < 0)
1527                         debug("FATAL: periodic should never fail, but did");
1528         }
1529
1530 out:
1531         free(queue->tds);
1532         free(queue->first);
1533         free(queue);
1534
1535         return result;
1536 }
1537
1538 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1539                                 void *buffer, int length, int interval,
1540                                 bool nonblock)
1541 {
1542         void *backbuffer;
1543         struct int_queue *queue;
1544         unsigned long timeout;
1545         int result = 0, ret;
1546
1547         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1548               dev, pipe, buffer, length, interval);
1549
1550         queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1551         if (!queue)
1552                 return -1;
1553
1554         timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1555         while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1556                 if (get_timer(0) > timeout) {
1557                         printf("Timeout poll on interrupt endpoint\n");
1558                         result = -ETIMEDOUT;
1559                         break;
1560                 }
1561
1562         if (backbuffer != buffer) {
1563                 debug("got wrong buffer back (%p instead of %p)\n",
1564                       backbuffer, buffer);
1565                 return -EINVAL;
1566         }
1567
1568         ret = _ehci_destroy_int_queue(dev, queue);
1569         if (ret < 0)
1570                 return ret;
1571
1572         /* everything worked out fine */
1573         return result;
1574 }
1575
1576 static int _ehci_lock_async(struct ehci_ctrl *ctrl, int lock)
1577 {
1578         ctrl->async_locked = lock;
1579
1580         if (lock)
1581                 return 0;
1582
1583         return ehci_disable_async(ctrl);
1584 }
1585
1586 #if !CONFIG_IS_ENABLED(DM_USB)
1587 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1588                             void *buffer, int length)
1589 {
1590         return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1591 }
1592
1593 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1594                    int length, struct devrequest *setup)
1595 {
1596         return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1597 }
1598
1599 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1600                    void *buffer, int length, int interval, bool nonblock)
1601 {
1602         return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
1603                                     nonblock);
1604 }
1605
1606 struct int_queue *create_int_queue(struct usb_device *dev,
1607                 unsigned long pipe, int queuesize, int elementsize,
1608                 void *buffer, int interval)
1609 {
1610         return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1611                                       buffer, interval);
1612 }
1613
1614 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1615 {
1616         return _ehci_poll_int_queue(dev, queue);
1617 }
1618
1619 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1620 {
1621         return _ehci_destroy_int_queue(dev, queue);
1622 }
1623
1624 int usb_lock_async(struct usb_device *dev, int lock)
1625 {
1626         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1627
1628         return _ehci_lock_async(ctrl, lock);
1629 }
1630 #endif
1631
1632 #if CONFIG_IS_ENABLED(DM_USB)
1633 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1634                                    unsigned long pipe, void *buffer, int length,
1635                                    struct devrequest *setup)
1636 {
1637         debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1638               dev->name, udev, udev->dev->name, udev->portnr);
1639
1640         return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1641 }
1642
1643 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1644                                 unsigned long pipe, void *buffer, int length)
1645 {
1646         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1647         return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1648 }
1649
1650 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1651                                unsigned long pipe, void *buffer, int length,
1652                                int interval, bool nonblock)
1653 {
1654         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1655         return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
1656                                     nonblock);
1657 }
1658
1659 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1660                 struct usb_device *udev, unsigned long pipe, int queuesize,
1661                 int elementsize, void *buffer, int interval)
1662 {
1663         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1664         return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1665                                       buffer, interval);
1666 }
1667
1668 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1669                                  struct int_queue *queue)
1670 {
1671         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1672         return _ehci_poll_int_queue(udev, queue);
1673 }
1674
1675 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1676                                   struct int_queue *queue)
1677 {
1678         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1679         return _ehci_destroy_int_queue(udev, queue);
1680 }
1681
1682 static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1683 {
1684         /*
1685          * EHCD can handle any transfer length as long as there is enough
1686          * free heap space left, hence set the theoretical max number here.
1687          */
1688         *size = SIZE_MAX;
1689
1690         return 0;
1691 }
1692
1693 static int ehci_lock_async(struct udevice *dev, int lock)
1694 {
1695         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1696
1697         return _ehci_lock_async(ctrl, lock);
1698 }
1699
1700 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1701                   struct ehci_hcor *hcor, const struct ehci_ops *ops,
1702                   uint tweaks, enum usb_init_type init)
1703 {
1704         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1705         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1706         int ret = -1;
1707
1708         debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1709               dev->name, ctrl, hccr, hcor, init);
1710
1711         if (!ctrl || !hccr || !hcor)
1712                 goto err;
1713
1714         priv->desc_before_addr = true;
1715
1716         ehci_setup_ops(ctrl, ops);
1717         ctrl->hccr = hccr;
1718         ctrl->hcor = hcor;
1719         ctrl->priv = ctrl;
1720
1721         ctrl->init = init;
1722         if (ctrl->init == USB_INIT_DEVICE)
1723                 goto done;
1724
1725         ret = ehci_reset(ctrl);
1726         if (ret)
1727                 goto err;
1728
1729         if (ctrl->ops.init_after_reset) {
1730                 ret = ctrl->ops.init_after_reset(ctrl);
1731                 if (ret)
1732                         goto err;
1733         }
1734
1735         ret = ehci_common_init(ctrl, tweaks);
1736         if (ret)
1737                 goto err;
1738 done:
1739         return 0;
1740 err:
1741         free(ctrl);
1742         debug("%s: failed, ret=%d\n", __func__, ret);
1743         return ret;
1744 }
1745
1746 int ehci_deregister(struct udevice *dev)
1747 {
1748         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1749
1750         if (ctrl->init == USB_INIT_DEVICE)
1751                 return 0;
1752
1753         ehci_shutdown(ctrl);
1754
1755         return 0;
1756 }
1757
1758 struct dm_usb_ops ehci_usb_ops = {
1759         .control = ehci_submit_control_msg,
1760         .bulk = ehci_submit_bulk_msg,
1761         .interrupt = ehci_submit_int_msg,
1762         .create_int_queue = ehci_create_int_queue,
1763         .poll_int_queue = ehci_poll_int_queue,
1764         .destroy_int_queue = ehci_destroy_int_queue,
1765         .get_max_xfer_size  = ehci_get_max_xfer_size,
1766         .lock_async = ehci_lock_async,
1767 };
1768
1769 #endif
1770
1771 #ifdef CONFIG_PHY
1772 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1773 {
1774         int ret;
1775
1776         if (!phy)
1777                 return 0;
1778
1779         ret = generic_phy_get_by_index(dev, index, phy);
1780         if (ret) {
1781                 if (ret != -ENOENT) {
1782                         dev_err(dev, "failed to get usb phy\n");
1783                         return ret;
1784                 }
1785         } else {
1786                 ret = generic_phy_init(phy);
1787                 if (ret) {
1788                         dev_dbg(dev, "failed to init usb phy\n");
1789                         return ret;
1790                 }
1791
1792                 ret = generic_phy_power_on(phy);
1793                 if (ret) {
1794                         dev_dbg(dev, "failed to power on usb phy\n");
1795                         return generic_phy_exit(phy);
1796                 }
1797         }
1798
1799         return 0;
1800 }
1801
1802 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1803 {
1804         int ret = 0;
1805
1806         if (!phy)
1807                 return 0;
1808
1809         if (generic_phy_valid(phy)) {
1810                 ret = generic_phy_power_off(phy);
1811                 if (ret) {
1812                         dev_dbg(dev, "failed to power off usb phy\n");
1813                         return ret;
1814                 }
1815
1816                 ret = generic_phy_exit(phy);
1817                 if (ret) {
1818                         dev_dbg(dev, "failed to power off usb phy\n");
1819                         return ret;
1820                 }
1821         }
1822
1823         return 0;
1824 }
1825 #else
1826 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1827 {
1828         return 0;
1829 }
1830
1831 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1832 {
1833         return 0;
1834 }
1835 #endif