drivers/net/phy/broadcom.c

   1 /*
   2  * Broadcom PHY drivers
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  *
   6  * Copyright 2010-2011 Freescale Semiconductor, Inc.
   7  * author Andy Fleming
   8  */
   9 #include <config.h>
  10 #include <common.h>
  11 #include <phy.h>
  12
  13 /* Broadcom BCM54xx -- taken from linux sungem_phy */
  14 #define MIIM_BCM54xx_AUXCNTL                    0x18
  15 #define MIIM_BCM54xx_AUXCNTL_ENCODE(val) (((val & 0x7) << 12)|(val & 0x7))
  16 #define MIIM_BCM54xx_AUXSTATUS                  0x19
  17 #define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK    0x0700
  18 #define MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT   8
  19
  20 #define MIIM_BCM54XX_SHD                        0x1c
  21 #define MIIM_BCM54XX_SHD_WRITE                  0x8000
  22 #define MIIM_BCM54XX_SHD_VAL(x)                 ((x & 0x1f) << 10)
  23 #define MIIM_BCM54XX_SHD_DATA(x)                ((x & 0x3ff) << 0)
  24 #define MIIM_BCM54XX_SHD_WR_ENCODE(val, data)   \
  25         (MIIM_BCM54XX_SHD_WRITE | MIIM_BCM54XX_SHD_VAL(val) | \
  26          MIIM_BCM54XX_SHD_DATA(data))
  27
  28 #define MIIM_BCM54XX_EXP_DATA           0x15    /* Expansion register data */
  29 #define MIIM_BCM54XX_EXP_SEL            0x17    /* Expansion register select */
  30 #define MIIM_BCM54XX_EXP_SEL_SSD        0x0e00  /* Secondary SerDes select */
  31 #define MIIM_BCM54XX_EXP_SEL_ER         0x0f00  /* Expansion register select */
  32
  33 /* Broadcom BCM5461S */
  34 static int bcm5461_config(struct phy_device *phydev)
  35 {
  36         genphy_config_aneg(phydev);
  37
  38         phy_reset(phydev);
  39
  40         return 0;
  41 }
  42
  43 static int bcm54xx_parse_status(struct phy_device *phydev)
  44 {
  45         unsigned int mii_reg;
  46
  47         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXSTATUS);
  48
  49         switch ((mii_reg & MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK) >>
  50                         MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT) {
  51         case 1:
  52                 phydev->duplex = DUPLEX_HALF;
  53                 phydev->speed = SPEED_10;
  54                 break;
  55         case 2:
  56                 phydev->duplex = DUPLEX_FULL;
  57                 phydev->speed = SPEED_10;
  58                 break;
  59         case 3:
  60                 phydev->duplex = DUPLEX_HALF;
  61                 phydev->speed = SPEED_100;
  62                 break;
  63         case 5:
  64                 phydev->duplex = DUPLEX_FULL;
  65                 phydev->speed = SPEED_100;
  66                 break;
  67         case 6:
  68                 phydev->duplex = DUPLEX_HALF;
  69                 phydev->speed = SPEED_1000;
  70                 break;
  71         case 7:
  72                 phydev->duplex = DUPLEX_FULL;
  73                 phydev->speed = SPEED_1000;
  74                 break;
  75         default:
  76                 printf("Auto-neg error, defaulting to 10BT/HD\n");
  77                 phydev->duplex = DUPLEX_HALF;
  78                 phydev->speed = SPEED_10;
  79                 break;
  80         }
  81
  82         return 0;
  83 }
  84
  85 static int bcm54xx_startup(struct phy_device *phydev)
  86 {
  87         int ret;
  88
  89         /* Read the Status (2x to make sure link is right) */
  90         ret = genphy_update_link(phydev);
  91         if (ret)
  92                 return ret;
  93
  94         return bcm54xx_parse_status(phydev);
  95 }
  96
  97 /* Broadcom BCM5482S */
  98 /*
  99  * "Ethernet@Wirespeed" needs to be enabled to achieve link in certain
 100  * circumstances.  eg a gigabit TSEC connected to a gigabit switch with
 101  * a 4-wire ethernet cable.  Both ends advertise gigabit, but can't
 102  * link.  "Ethernet@Wirespeed" reduces advertised speed until link
 103  * can be achieved.
 104  */
 105 static u32 bcm5482_read_wirespeed(struct phy_device *phydev, u32 reg)
 106 {
 107         return (phy_read(phydev, MDIO_DEVAD_NONE, reg) & 0x8FFF) | 0x8010;
 108 }
 109
 110 static int bcm5482_config(struct phy_device *phydev)
 111 {
 112         unsigned int reg;
 113
 114         /* reset the PHY */
 115         reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
 116         reg |= BMCR_RESET;
 117         phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, reg);
 118
 119         /* Setup read from auxilary control shadow register 7 */
 120         phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL,
 121                         MIIM_BCM54xx_AUXCNTL_ENCODE(7));
 122         /* Read Misc Control register and or in Ethernet@Wirespeed */
 123         reg = bcm5482_read_wirespeed(phydev, MIIM_BCM54xx_AUXCNTL);
 124         phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, reg);
 125
 126         /* Initial config/enable of secondary SerDes interface */
 127         phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_SHD,
 128                         MIIM_BCM54XX_SHD_WR_ENCODE(0x14, 0xf));
 129         /* Write intial value to secondary SerDes Contol */
 130         phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL,
 131                         MIIM_BCM54XX_EXP_SEL_SSD | 0);
 132         phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA,
 133                         BMCR_ANRESTART);
 134         /* Enable copper/fiber auto-detect */
 135         phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_SHD,
 136                         MIIM_BCM54XX_SHD_WR_ENCODE(0x1e, 0x201));
 137
 138         genphy_config_aneg(phydev);
 139
 140         return 0;
 141 }
 142
 143 static int bcm_cygnus_startup(struct phy_device *phydev)
 144 {
 145         int ret;
 146
 147         /* Read the Status (2x to make sure link is right) */
 148         ret = genphy_update_link(phydev);
 149         if (ret)
 150                 return ret;
 151
 152         return genphy_parse_link(phydev);
 153 }
 154
 155 static int bcm_cygnus_config(struct phy_device *phydev)
 156 {
 157         genphy_config_aneg(phydev);
 158
 159         phy_reset(phydev);
 160
 161         return 0;
 162 }
 163
 164 /*
 165  * Find out if PHY is in copper or serdes mode by looking at Expansion Reg
 166  * 0x42 - "Operating Mode Status Register"
 167  */
 168 static int bcm5482_is_serdes(struct phy_device *phydev)
 169 {
 170         u16 val;
 171         int serdes = 0;
 172
 173         phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL,
 174                         MIIM_BCM54XX_EXP_SEL_ER | 0x42);
 175         val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA);
 176
 177         switch (val & 0x1f) {
 178         case 0x0d:      /* RGMII-to-100Base-FX */
 179         case 0x0e:      /* RGMII-to-SGMII */
 180         case 0x0f:      /* RGMII-to-SerDes */
 181         case 0x12:      /* SGMII-to-SerDes */
 182         case 0x13:      /* SGMII-to-100Base-FX */
 183         case 0x16:      /* SerDes-to-Serdes */
 184                 serdes = 1;
 185                 break;
 186         case 0x6:       /* RGMII-to-Copper */
 187         case 0x14:      /* SGMII-to-Copper */
 188         case 0x17:      /* SerDes-to-Copper */
 189                 break;
 190         default:
 191                 printf("ERROR, invalid PHY mode (0x%x\n)", val);
 192                 break;
 193         }
 194
 195         return serdes;
 196 }
 197
 198 /*
 199  * Determine SerDes link speed and duplex from Expansion reg 0x42 "Operating
 200  * Mode Status Register"
 201  */
 202 static u32 bcm5482_parse_serdes_sr(struct phy_device *phydev)
 203 {
 204         u16 val;
 205         int i = 0;
 206
 207         /* Wait 1s for link - Clause 37 autonegotiation happens very fast */
 208         while (1) {
 209                 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL,
 210                                 MIIM_BCM54XX_EXP_SEL_ER | 0x42);
 211                 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA);
 212
 213                 if (val & 0x8000)
 214                         break;
 215
 216                 if (i++ > 1000) {
 217                         phydev->link = 0;
 218                         return 1;
 219                 }
 220
 221                 udelay(1000);   /* 1 ms */
 222         }
 223
 224         phydev->link = 1;
 225         switch ((val >> 13) & 0x3) {
 226         case (0x00):
 227                 phydev->speed = 10;
 228                 break;
 229         case (0x01):
 230                 phydev->speed = 100;
 231                 break;
 232         case (0x02):
 233                 phydev->speed = 1000;
 234                 break;
 235         }
 236
 237         phydev->duplex = (val & 0x1000) == 0x1000;
 238
 239         return 0;
 240 }
 241
 242 /*
 243  * Figure out if BCM5482 is in serdes or copper mode and determine link
 244  * configuration accordingly
 245  */
 246 static int bcm5482_startup(struct phy_device *phydev)
 247 {
 248         int ret;
 249
 250         if (bcm5482_is_serdes(phydev)) {
 251                 bcm5482_parse_serdes_sr(phydev);
 252                 phydev->port = PORT_FIBRE;
 253                 return 0;
 254         }
 255
 256         /* Wait for auto-negotiation to complete or fail */
 257         ret = genphy_update_link(phydev);
 258         if (ret)
 259                 return ret;
 260
 261         /* Parse BCM54xx copper aux status register */
 262         return bcm54xx_parse_status(phydev);
 263 }
 264
 265 static struct phy_driver BCM5461S_driver = {
 266         .name = "Broadcom BCM5461S",
 267         .uid = 0x2060c0,
 268         .mask = 0xfffff0,
 269         .features = PHY_GBIT_FEATURES,
 270         .config = &bcm5461_config,
 271         .startup = &bcm54xx_startup,
 272         .shutdown = &genphy_shutdown,
 273 };
 274
 275 static struct phy_driver BCM5464S_driver = {
 276         .name = "Broadcom BCM5464S",
 277         .uid = 0x2060b0,
 278         .mask = 0xfffff0,
 279         .features = PHY_GBIT_FEATURES,
 280         .config = &bcm5461_config,
 281         .startup = &bcm54xx_startup,
 282         .shutdown = &genphy_shutdown,
 283 };
 284
 285 static struct phy_driver BCM5482S_driver = {
 286         .name = "Broadcom BCM5482S",
 287         .uid = 0x143bcb0,
 288         .mask = 0xffffff0,
 289         .features = PHY_GBIT_FEATURES,
 290         .config = &bcm5482_config,
 291         .startup = &bcm5482_startup,
 292         .shutdown = &genphy_shutdown,
 293 };
 294
 295 static struct phy_driver BCM_CYGNUS_driver = {
 296         .name = "Broadcom CYGNUS GPHY",
 297         .uid = 0xae025200,
 298         .mask = 0xfffff0,
 299         .features = PHY_GBIT_FEATURES,
 300         .config = &bcm_cygnus_config,
 301         .startup = &bcm_cygnus_startup,
 302         .shutdown = &genphy_shutdown,
 303 };
 304
 305 int phy_broadcom_init(void)
 306 {
 307         phy_register(&BCM5482S_driver);
 308         phy_register(&BCM5464S_driver);
 309         phy_register(&BCM5461S_driver);
 310         phy_register(&BCM_CYGNUS_driver);
 311
 312         return 0;
 313 }