drivers/nand_legacy/nand_legacy.c

   1 /*
   2  * (C) 2006 Denx
   3  * Driver for NAND support, Rick Bronson
   4  * borrowed heavily from:
   5  * (c) 1999 Machine Vision Holdings, Inc.
   6  * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
   7  *
   8  * Added 16-bit nand support
   9  * (C) 2004 Texas Instruments
  10  */
  11
  12 #include <common.h>
  13 #include <command.h>
  14 #include <malloc.h>
  15 #include <asm/io.h>
  16 #include <watchdog.h>
  17
  18 #ifdef CONFIG_SHOW_BOOT_PROGRESS
  19 # include <status_led.h>
  20 # define SHOW_BOOT_PROGRESS(arg)        show_boot_progress(arg)
  21 #else
  22 # define SHOW_BOOT_PROGRESS(arg)
  23 #endif
  24
  25 #if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
  26
  27 #include <linux/mtd/nand_legacy.h>
  28 #include <linux/mtd/nand_ids.h>
  29 #include <jffs2/jffs2.h>
  30
  31 #ifdef CONFIG_OMAP1510
  32 void archflashwp(void *archdata, int wp);
  33 #endif
  34
  35 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
  36
  37 #undef  PSYCHO_DEBUG
  38 #undef  NAND_DEBUG
  39
  40 /* ****************** WARNING *********************
  41  * When ALLOW_ERASE_BAD_DEBUG is non-zero the erase command will
  42  * erase (or at least attempt to erase) blocks that are marked
  43  * bad. This can be very handy if you are _sure_ that the block
  44  * is OK, say because you marked a good block bad to test bad
  45  * block handling and you are done testing, or if you have
  46  * accidentally marked blocks bad.
  47  *
  48  * Erasing factory marked bad blocks is a _bad_ idea. If the
  49  * erase succeeds there is no reliable way to find them again,
  50  * and attempting to program or erase bad blocks can affect
  51  * the data in _other_ (good) blocks.
  52  */
  53 #define  ALLOW_ERASE_BAD_DEBUG 0
  54
  55 #define CONFIG_MTD_NAND_ECC  /* enable ECC */
  56 #define CONFIG_MTD_NAND_ECC_JFFS2
  57
  58 /* bits for nand_legacy_rw() `cmd'; or together as needed */
  59 #define NANDRW_READ     0x01
  60 #define NANDRW_WRITE    0x00
  61 #define NANDRW_JFFS2    0x02
  62 #define NANDRW_JFFS2_SKIP       0x04
  63
  64
  65 /*
  66  * Exported variables etc.
  67  */
  68
  69 /* Definition of the out of band configuration structure */
  70 struct nand_oob_config {
  71         /* position of ECC bytes inside oob */
  72         int ecc_pos[6];
  73         /* position of  bad blk flag inside oob -1 = inactive */
  74         int badblock_pos;
  75         /* position of ECC valid flag inside oob -1 = inactive */
  76         int eccvalid_pos;
  77 } oob_config = { {0}, 0, 0};
  78
  79 struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE] = {{0}};
  80
  81 int curr_device = -1; /* Current NAND Device */
  82
  83
  84 /*
  85  * Exported functionss
  86  */
  87 int nand_legacy_erase(struct nand_chip* nand, size_t ofs,
  88                      size_t len, int clean);
  89 int nand_legacy_rw(struct nand_chip* nand, int cmd,
  90                   size_t start, size_t len,
  91                   size_t * retlen, u_char * buf);
  92 void nand_print(struct nand_chip *nand);
  93 void nand_print_bad(struct nand_chip *nand);
  94 int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
  95                  size_t * retlen, u_char * buf);
  96 int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
  97                  size_t * retlen, const u_char * buf);
  98
  99 /*
 100  * Internals
 101  */
 102 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait);
 103 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
 104                  size_t * retlen, u_char *buf, u_char *ecc_code);
 105 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
 106                            size_t * retlen, const u_char * buf,
 107                            u_char * ecc_code);
 108 #ifdef CONFIG_MTD_NAND_ECC
 109 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
 110 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
 111 #endif
 112
 113
 114 /*
 115  *
 116  * Function definitions
 117  *
 118  */
 119
 120 /* returns 0 if block containing pos is OK:
 121  *              valid erase block and
 122  *              not marked bad, or no bad mark position is specified
 123  * returns 1 if marked bad or otherwise invalid
 124  */
 125 static int check_block (struct nand_chip *nand, unsigned long pos)
 126 {
 127         size_t retlen;
 128         uint8_t oob_data;
 129         uint16_t oob_data16[6];
 130         int page0 = pos & (-nand->erasesize);
 131         int page1 = page0 + nand->oobblock;
 132         int badpos = oob_config.badblock_pos;
 133
 134         if (pos >= nand->totlen)
 135                 return 1;
 136
 137         if (badpos < 0)
 138                 return 0;       /* no way to check, assume OK */
 139
 140         if (nand->bus16) {
 141                 if (nand_read_oob(nand, (page0 + 0), 12, &retlen, (uint8_t *)oob_data16)
 142                     || (oob_data16[2] & 0xff00) != 0xff00)
 143                         return 1;
 144                 if (nand_read_oob(nand, (page1 + 0), 12, &retlen, (uint8_t *)oob_data16)
 145                     || (oob_data16[2] & 0xff00) != 0xff00)
 146                         return 1;
 147         } else {
 148                 /* Note - bad block marker can be on first or second page */
 149                 if (nand_read_oob(nand, page0 + badpos, 1, &retlen, (unsigned char *)&oob_data)
 150                     || oob_data != 0xff
 151                     || nand_read_oob (nand, page1 + badpos, 1, &retlen, (unsigned char *)&oob_data)
 152                     || oob_data != 0xff)
 153                         return 1;
 154         }
 155
 156         return 0;
 157 }
 158
 159 /* print bad blocks in NAND flash */
 160 void nand_print_bad(struct nand_chip* nand)
 161 {
 162         unsigned long pos;
 163
 164         for (pos = 0; pos < nand->totlen; pos += nand->erasesize) {
 165                 if (check_block(nand, pos))
 166                         printf(" 0x%8.8lx\n", pos);
 167         }
 168         puts("\n");
 169 }
 170
 171 /* cmd: 0: NANDRW_WRITE                 write, fail on bad block
 172  *      1: NANDRW_READ                  read, fail on bad block
 173  *      2: NANDRW_WRITE | NANDRW_JFFS2  write, skip bad blocks
 174  *      3: NANDRW_READ | NANDRW_JFFS2   read, data all 0xff for bad blocks
 175  *      7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
 176  */
 177 int nand_legacy_rw (struct nand_chip* nand, int cmd,
 178                    size_t start, size_t len,
 179                    size_t * retlen, u_char * buf)
 180 {
 181         int ret = 0, n, total = 0;
 182         char eccbuf[6];
 183         /* eblk (once set) is the start of the erase block containing the
 184          * data being processed.
 185          */
 186         unsigned long eblk = ~0;        /* force mismatch on first pass */
 187         unsigned long erasesize = nand->erasesize;
 188
 189         while (len) {
 190                 if ((start & (-erasesize)) != eblk) {
 191                         /* have crossed into new erase block, deal with
 192                          * it if it is sure marked bad.
 193                          */
 194                         eblk = start & (-erasesize); /* start of block */
 195                         if (check_block(nand, eblk)) {
 196                                 if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
 197                                         while (len > 0 &&
 198                                                start - eblk < erasesize) {
 199                                                 *(buf++) = 0xff;
 200                                                 ++start;
 201                                                 ++total;
 202                                                 --len;
 203                                         }
 204                                         continue;
 205                                 } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
 206                                         start += erasesize;
 207                                         continue;
 208                                 } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
 209                                         /* skip bad block */
 210                                         start += erasesize;
 211                                         continue;
 212                                 } else {
 213                                         ret = 1;
 214                                         break;
 215                                 }
 216                         }
 217                 }
 218                 /* The ECC will not be calculated correctly if
 219                    less than 512 is written or read */
 220                 /* Is request at least 512 bytes AND it starts on a proper boundry */
 221                 if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
 222                         printf("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\n");
 223
 224                 if (cmd & NANDRW_READ) {
 225                         ret = nand_read_ecc(nand, start,
 226                                            min(len, eblk + erasesize - start),
 227                                            (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
 228                 } else {
 229                         ret = nand_write_ecc(nand, start,
 230                                             min(len, eblk + erasesize - start),
 231                                             (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
 232                 }
 233
 234                 if (ret)
 235                         break;
 236
 237                 start  += n;
 238                 buf   += n;
 239                 total += n;
 240                 len   -= n;
 241         }
 242         if (retlen)
 243                 *retlen = total;
 244
 245         return ret;
 246 }
 247
 248 void nand_print(struct nand_chip *nand)
 249 {
 250         if (nand->numchips > 1) {
 251                 printf("%s at 0x%lx,\n"
 252                        "\t  %d chips %s, size %d MB, \n"
 253                        "\t  total size %ld MB, sector size %ld kB\n",
 254                        nand->name, nand->IO_ADDR, nand->numchips,
 255                        nand->chips_name, 1 << (nand->chipshift - 20),
 256                        nand->totlen >> 20, nand->erasesize >> 10);
 257         }
 258         else {
 259                 printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR);
 260                 print_size(nand->totlen, ", ");
 261                 print_size(nand->erasesize, " sector)\n");
 262         }
 263 }
 264
 265 /* ------------------------------------------------------------------------- */
 266
 267 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait)
 268 {
 269         /* This is inline, to optimise the common case, where it's ready instantly */
 270         int ret = 0;
 271
 272 #ifdef NAND_NO_RB       /* in config file, shorter delays currently wrap accesses */
 273         if(ale_wait)
 274                 NAND_WAIT_READY(nand);  /* do the worst case 25us wait */
 275         else
 276                 udelay(10);
 277 #else   /* has functional r/b signal */
 278         NAND_WAIT_READY(nand);
 279 #endif
 280         return ret;
 281 }
 282
 283 /* NanD_Command: Send a flash command to the flash chip */
 284
 285 static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
 286 {
 287         unsigned long nandptr = nand->IO_ADDR;
 288
 289         /* Assert the CLE (Command Latch Enable) line to the flash chip */
 290         NAND_CTL_SETCLE(nandptr);
 291
 292         /* Send the command */
 293         WRITE_NAND_COMMAND(command, nandptr);
 294
 295         /* Lower the CLE line */
 296         NAND_CTL_CLRCLE(nandptr);
 297
 298 #ifdef NAND_NO_RB
 299         if(command == NAND_CMD_RESET){
 300                 u_char ret_val;
 301                 NanD_Command(nand, NAND_CMD_STATUS);
 302                 do {
 303                         ret_val = READ_NAND(nandptr);/* wait till ready */
 304                 } while((ret_val & 0x40) != 0x40);
 305         }
 306 #endif
 307         return NanD_WaitReady(nand, 0);
 308 }
 309
 310 /* NanD_Address: Set the current address for the flash chip */
 311
 312 static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
 313 {
 314         unsigned long nandptr;
 315         int i;
 316
 317         nandptr = nand->IO_ADDR;
 318
 319         /* Assert the ALE (Address Latch Enable) line to the flash chip */
 320         NAND_CTL_SETALE(nandptr);
 321
 322         /* Send the address */
 323         /* Devices with 256-byte page are addressed as:
 324          * Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
 325          * there is no device on the market with page256
 326          * and more than 24 bits.
 327          * Devices with 512-byte page are addressed as:
 328          * Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
 329          * 25-31 is sent only if the chip support it.
 330          * bit 8 changes the read command to be sent
 331          * (NAND_CMD_READ0 or NAND_CMD_READ1).
 332          */
 333
 334         if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
 335                 WRITE_NAND_ADDRESS(ofs, nandptr);
 336
 337         ofs = ofs >> nand->page_shift;
 338
 339         if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) {
 340                 for (i = 0; i < nand->pageadrlen; i++, ofs = ofs >> 8) {
 341                         WRITE_NAND_ADDRESS(ofs, nandptr);
 342                 }
 343         }
 344
 345         /* Lower the ALE line */
 346         NAND_CTL_CLRALE(nandptr);
 347
 348         /* Wait for the chip to respond */
 349         return NanD_WaitReady(nand, 1);
 350 }
 351
 352 /* NanD_SelectChip: Select a given flash chip within the current floor */
 353
 354 static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
 355 {
 356         /* Wait for it to be ready */
 357         return NanD_WaitReady(nand, 0);
 358 }
 359
 360 /* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
 361
 362 static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
 363 {
 364         int mfr, id, i;
 365
 366         NAND_ENABLE_CE(nand);  /* set pin low */
 367         /* Reset the chip */
 368         if (NanD_Command(nand, NAND_CMD_RESET)) {
 369 #ifdef NAND_DEBUG
 370                 printf("NanD_Command (reset) for %d,%d returned true\n",
 371                        floor, chip);
 372 #endif
 373                 NAND_DISABLE_CE(nand);  /* set pin high */
 374                 return 0;
 375         }
 376
 377         /* Read the NAND chip ID: 1. Send ReadID command */
 378         if (NanD_Command(nand, NAND_CMD_READID)) {
 379 #ifdef NAND_DEBUG
 380                 printf("NanD_Command (ReadID) for %d,%d returned true\n",
 381                        floor, chip);
 382 #endif
 383                 NAND_DISABLE_CE(nand);  /* set pin high */
 384                 return 0;
 385         }
 386
 387         /* Read the NAND chip ID: 2. Send address byte zero */
 388         NanD_Address(nand, ADDR_COLUMN, 0);
 389
 390         /* Read the manufacturer and device id codes from the device */
 391
 392         mfr = READ_NAND(nand->IO_ADDR);
 393
 394         id = READ_NAND(nand->IO_ADDR);
 395
 396         NAND_DISABLE_CE(nand);  /* set pin high */
 397
 398 #ifdef NAND_DEBUG
 399         printf("NanD_Command (ReadID) got %x %x\n", mfr, id);
 400 #endif
 401         if (mfr == 0xff || mfr == 0) {
 402                 /* No response - return failure */
 403                 return 0;
 404         }
 405
 406         /* Check it's the same as the first chip we identified.
 407          * M-Systems say that any given nand_chip device should only
 408          * contain _one_ type of flash part, although that's not a
 409          * hardware restriction. */
 410         if (nand->mfr) {
 411                 if (nand->mfr == mfr && nand->id == id) {
 412                         return 1;       /* This is another the same the first */
 413                 } else {
 414                         printf("Flash chip at floor %d, chip %d is different:\n",
 415                                floor, chip);
 416                 }
 417         }
 418
 419         /* Print and store the manufacturer and ID codes. */
 420         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 421                 if (mfr == nand_flash_ids[i].manufacture_id &&
 422                     id == nand_flash_ids[i].model_id) {
 423 #ifdef NAND_DEBUG
 424                         printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
 425                                "Chip ID: 0x%2.2X (%s)\n", mfr, id,
 426                                nand_flash_ids[i].name);
 427 #endif
 428                         if (!nand->mfr) {
 429                                 nand->mfr = mfr;
 430                                 nand->id = id;
 431                                 nand->chipshift =
 432                                     nand_flash_ids[i].chipshift;
 433                                 nand->page256 = nand_flash_ids[i].page256;
 434                                 nand->eccsize = 256;
 435                                 if (nand->page256) {
 436                                         nand->oobblock = 256;
 437                                         nand->oobsize = 8;
 438                                         nand->page_shift = 8;
 439                                 } else {
 440                                         nand->oobblock = 512;
 441                                         nand->oobsize = 16;
 442                                         nand->page_shift = 9;
 443                                 }
 444                                 nand->pageadrlen = nand_flash_ids[i].pageadrlen;
 445                                 nand->erasesize  = nand_flash_ids[i].erasesize;
 446                                 nand->chips_name = nand_flash_ids[i].name;
 447                                 nand->bus16      = nand_flash_ids[i].bus16;
 448                                 return 1;
 449                         }
 450                         return 0;
 451                 }
 452         }
 453
 454
 455 #ifdef NAND_DEBUG
 456         /* We haven't fully identified the chip. Print as much as we know. */
 457         printf("Unknown flash chip found: %2.2X %2.2X\n",
 458                id, mfr);
 459 #endif
 460
 461         return 0;
 462 }
 463
 464 /* NanD_ScanChips: Find all NAND chips present in a nand_chip, and identify them */
 465
 466 static void NanD_ScanChips(struct nand_chip *nand)
 467 {
 468         int floor, chip;
 469         int numchips[NAND_MAX_FLOORS];
 470         int maxchips = NAND_MAX_CHIPS;
 471         int ret = 1;
 472
 473         nand->numchips = 0;
 474         nand->mfr = 0;
 475         nand->id = 0;
 476
 477
 478         /* For each floor, find the number of valid chips it contains */
 479         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 480                 ret = 1;
 481                 numchips[floor] = 0;
 482                 for (chip = 0; chip < maxchips && ret != 0; chip++) {
 483
 484                         ret = NanD_IdentChip(nand, floor, chip);
 485                         if (ret) {
 486                                 numchips[floor]++;
 487                                 nand->numchips++;
 488                         }
 489                 }
 490         }
 491
 492         /* If there are none at all that we recognise, bail */
 493         if (!nand->numchips) {
 494 #ifdef NAND_DEBUG
 495                 puts ("No NAND flash chips recognised.\n");
 496 #endif
 497                 return;
 498         }
 499
 500         /* Allocate an array to hold the information for each chip */
 501         nand->chips = malloc(sizeof(struct Nand) * nand->numchips);
 502         if (!nand->chips) {
 503                 puts ("No memory for allocating chip info structures\n");
 504                 return;
 505         }
 506
 507         ret = 0;
 508
 509         /* Fill out the chip array with {floor, chipno} for each
 510          * detected chip in the device. */
 511         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 512                 for (chip = 0; chip < numchips[floor]; chip++) {
 513                         nand->chips[ret].floor = floor;
 514                         nand->chips[ret].chip = chip;
 515                         nand->chips[ret].curadr = 0;
 516                         nand->chips[ret].curmode = 0x50;
 517                         ret++;
 518                 }
 519         }
 520
 521         /* Calculate and print the total size of the device */
 522         nand->totlen = nand->numchips * (1 << nand->chipshift);
 523
 524 #ifdef NAND_DEBUG
 525         printf("%d flash chips found. Total nand_chip size: %ld MB\n",
 526                nand->numchips, nand->totlen >> 20);
 527 #endif
 528 }
 529
 530 /* we need to be fast here, 1 us per read translates to 1 second per meg */
 531 static void NanD_ReadBuf (struct nand_chip *nand, u_char * data_buf, int cntr)
 532 {
 533         unsigned long nandptr = nand->IO_ADDR;
 534
 535         NanD_Command (nand, NAND_CMD_READ0);
 536
 537         if (nand->bus16) {
 538                 u16 val;
 539
 540                 while (cntr >= 16) {
 541                         val = READ_NAND (nandptr);
 542                         *data_buf++ = val & 0xff;
 543                         *data_buf++ = val >> 8;
 544                         val = READ_NAND (nandptr);
 545                         *data_buf++ = val & 0xff;
 546                         *data_buf++ = val >> 8;
 547                         val = READ_NAND (nandptr);
 548                         *data_buf++ = val & 0xff;
 549                         *data_buf++ = val >> 8;
 550                         val = READ_NAND (nandptr);
 551                         *data_buf++ = val & 0xff;
 552                         *data_buf++ = val >> 8;
 553                         val = READ_NAND (nandptr);
 554                         *data_buf++ = val & 0xff;
 555                         *data_buf++ = val >> 8;
 556                         val = READ_NAND (nandptr);
 557                         *data_buf++ = val & 0xff;
 558                         *data_buf++ = val >> 8;
 559                         val = READ_NAND (nandptr);
 560                         *data_buf++ = val & 0xff;
 561                         *data_buf++ = val >> 8;
 562                         val = READ_NAND (nandptr);
 563                         *data_buf++ = val & 0xff;
 564                         *data_buf++ = val >> 8;
 565                         cntr -= 16;
 566                 }
 567
 568                 while (cntr > 0) {
 569                         val = READ_NAND (nandptr);
 570                         *data_buf++ = val & 0xff;
 571                         *data_buf++ = val >> 8;
 572                         cntr -= 2;
 573                 }
 574         } else {
 575                 while (cntr >= 16) {
 576                         *data_buf++ = READ_NAND (nandptr);
 577                         *data_buf++ = READ_NAND (nandptr);
 578                         *data_buf++ = READ_NAND (nandptr);
 579                         *data_buf++ = READ_NAND (nandptr);
 580                         *data_buf++ = READ_NAND (nandptr);
 581                         *data_buf++ = READ_NAND (nandptr);
 582                         *data_buf++ = READ_NAND (nandptr);
 583                         *data_buf++ = READ_NAND (nandptr);
 584                         *data_buf++ = READ_NAND (nandptr);
 585                         *data_buf++ = READ_NAND (nandptr);
 586                         *data_buf++ = READ_NAND (nandptr);
 587                         *data_buf++ = READ_NAND (nandptr);
 588                         *data_buf++ = READ_NAND (nandptr);
 589                         *data_buf++ = READ_NAND (nandptr);
 590                         *data_buf++ = READ_NAND (nandptr);
 591                         *data_buf++ = READ_NAND (nandptr);
 592                         cntr -= 16;
 593                 }
 594
 595                 while (cntr > 0) {
 596                         *data_buf++ = READ_NAND (nandptr);
 597                         cntr--;
 598                 }
 599         }
 600 }
 601
 602 /*
 603  * NAND read with ECC
 604  */
 605 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
 606                  size_t * retlen, u_char *buf, u_char *ecc_code)
 607 {
 608         int col, page;
 609         int ecc_status = 0;
 610 #ifdef CONFIG_MTD_NAND_ECC
 611         int j;
 612         int ecc_failed = 0;
 613         u_char *data_poi;
 614         u_char ecc_calc[6];
 615 #endif
 616
 617         /* Do not allow reads past end of device */
 618         if ((start + len) > nand->totlen) {
 619                 printf ("%s: Attempt read beyond end of device %x %x %x\n",
 620                         __FUNCTION__, (uint) start, (uint) len, (uint) nand->totlen);
 621                 *retlen = 0;
 622                 return -1;
 623         }
 624
 625         /* First we calculate the starting page */
 626         /*page = shr(start, nand->page_shift);*/
 627         page = start >> nand->page_shift;
 628
 629         /* Get raw starting column */
 630         col = start & (nand->oobblock - 1);
 631
 632         /* Initialize return value */
 633         *retlen = 0;
 634
 635         /* Select the NAND device */
 636         NAND_ENABLE_CE(nand);  /* set pin low */
 637
 638         /* Loop until all data read */
 639         while (*retlen < len) {
 640
 641 #ifdef CONFIG_MTD_NAND_ECC
 642                 /* Do we have this page in cache ? */
 643                 if (nand->cache_page == page)
 644                         goto readdata;
 645                 /* Send the read command */
 646                 NanD_Command(nand, NAND_CMD_READ0);
 647                 if (nand->bus16) {
 648                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 649                                      (page << nand->page_shift) + (col >> 1));
 650                 } else {
 651                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 652                                      (page << nand->page_shift) + col);
 653                 }
 654
 655                 /* Read in a page + oob data */
 656                 NanD_ReadBuf(nand, nand->data_buf, nand->oobblock + nand->oobsize);
 657
 658                 /* copy data into cache, for read out of cache and if ecc fails */
 659                 if (nand->data_cache) {
 660                         memcpy (nand->data_cache, nand->data_buf,
 661                                 nand->oobblock + nand->oobsize);
 662                 }
 663
 664                 /* Pick the ECC bytes out of the oob data */
 665                 for (j = 0; j < 6; j++) {
 666                         ecc_code[j] = nand->data_buf[(nand->oobblock + oob_config.ecc_pos[j])];
 667                 }
 668
 669                 /* Calculate the ECC and verify it */
 670                 /* If block was not written with ECC, skip ECC */
 671                 if (oob_config.eccvalid_pos != -1 &&
 672                     (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0x0f) != 0x0f) {
 673
 674                         nand_calculate_ecc (&nand->data_buf[0], &ecc_calc[0]);
 675                         switch (nand_correct_data (&nand->data_buf[0], &ecc_code[0], &ecc_calc[0])) {
 676                         case -1:
 677                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 678                                 ecc_failed++;
 679                                 break;
 680                         case 1:
 681                         case 2: /* transfer ECC corrected data to cache */
 682                                 if (nand->data_cache)
 683                                         memcpy (nand->data_cache, nand->data_buf, 256);
 684                                 break;
 685                         }
 686                 }
 687
 688                 if (oob_config.eccvalid_pos != -1 &&
 689                     nand->oobblock == 512 && (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0xf0) != 0xf0) {
 690
 691                         nand_calculate_ecc (&nand->data_buf[256], &ecc_calc[3]);
 692                         switch (nand_correct_data (&nand->data_buf[256], &ecc_code[3], &ecc_calc[3])) {
 693                         case -1:
 694                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 695                                 ecc_failed++;
 696                                 break;
 697                         case 1:
 698                         case 2: /* transfer ECC corrected data to cache */
 699                                 if (nand->data_cache)
 700                                         memcpy (&nand->data_cache[256], &nand->data_buf[256], 256);
 701                                 break;
 702                         }
 703                 }
 704 readdata:
 705                 /* Read the data from ECC data buffer into return buffer */
 706                 data_poi = (nand->data_cache) ? nand->data_cache : nand->data_buf;
 707                 data_poi += col;
 708                 if ((*retlen + (nand->oobblock - col)) >= len) {
 709                         memcpy (buf + *retlen, data_poi, len - *retlen);
 710                         *retlen = len;
 711                 } else {
 712                         memcpy (buf + *retlen, data_poi,  nand->oobblock - col);
 713                         *retlen += nand->oobblock - col;
 714                 }
 715                 /* Set cache page address, invalidate, if ecc_failed */
 716                 nand->cache_page = (nand->data_cache && !ecc_failed) ? page : -1;
 717
 718                 ecc_status += ecc_failed;
 719                 ecc_failed = 0;
 720
 721 #else
 722                 /* Send the read command */
 723                 NanD_Command(nand, NAND_CMD_READ0);
 724                 if (nand->bus16) {
 725                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 726                                      (page << nand->page_shift) + (col >> 1));
 727                 } else {
 728                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 729                                      (page << nand->page_shift) + col);
 730                 }
 731
 732                 /* Read the data directly into the return buffer */
 733                 if ((*retlen + (nand->oobblock - col)) >= len) {
 734                         NanD_ReadBuf(nand, buf + *retlen, len - *retlen);
 735                         *retlen = len;
 736                         /* We're done */
 737                         continue;
 738                 } else {
 739                         NanD_ReadBuf(nand, buf + *retlen, nand->oobblock - col);
 740                         *retlen += nand->oobblock - col;
 741                         }
 742 #endif
 743                 /* For subsequent reads align to page boundary. */
 744                 col = 0;
 745                 /* Increment page address */
 746                 page++;
 747         }
 748
 749         /* De-select the NAND device */
 750         NAND_DISABLE_CE(nand);  /* set pin high */
 751
 752         /*
 753          * Return success, if no ECC failures, else -EIO
 754          * fs driver will take care of that, because
 755          * retlen == desired len and result == -EIO
 756          */
 757         return ecc_status ? -1 : 0;
 758 }
 759
 760 /*
 761  *      Nand_page_program function is used for write and writev !
 762  */
 763 static int nand_write_page (struct nand_chip *nand,
 764                             int page, int col, int last, u_char * ecc_code)
 765 {
 766
 767         int i;
 768         unsigned long nandptr = nand->IO_ADDR;
 769
 770 #ifdef CONFIG_MTD_NAND_ECC
 771 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 772         int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
 773 #endif
 774 #endif
 775         /* pad oob area */
 776         for (i = nand->oobblock; i < nand->oobblock + nand->oobsize; i++)
 777                 nand->data_buf[i] = 0xff;
 778
 779 #ifdef CONFIG_MTD_NAND_ECC
 780         /* Zero out the ECC array */
 781         for (i = 0; i < 6; i++)
 782                 ecc_code[i] = 0x00;
 783
 784         /* Read back previous written data, if col > 0 */
 785         if (col) {
 786                 NanD_Command (nand, NAND_CMD_READ0);
 787                 if (nand->bus16) {
 788                         NanD_Address (nand, ADDR_COLUMN_PAGE,
 789                                       (page << nand->page_shift) + (col >> 1));
 790                 } else {
 791                         NanD_Address (nand, ADDR_COLUMN_PAGE,
 792                                       (page << nand->page_shift) + col);
 793                 }
 794
 795                 if (nand->bus16) {
 796                         u16 val;
 797
 798                         for (i = 0; i < col; i += 2) {
 799                                 val = READ_NAND (nandptr);
 800                                 nand->data_buf[i] = val & 0xff;
 801                                 nand->data_buf[i + 1] = val >> 8;
 802                         }
 803                 } else {
 804                         for (i = 0; i < col; i++)
 805                                 nand->data_buf[i] = READ_NAND (nandptr);
 806                 }
 807         }
 808
 809         /* Calculate and write the ECC if we have enough data */
 810         if ((col < nand->eccsize) && (last >= nand->eccsize)) {
 811                 nand_calculate_ecc (&nand->data_buf[0], &(ecc_code[0]));
 812                 for (i = 0; i < 3; i++) {
 813                         nand->data_buf[(nand->oobblock +
 814                                         oob_config.ecc_pos[i])] = ecc_code[i];
 815                 }
 816                 if (oob_config.eccvalid_pos != -1) {
 817                         nand->data_buf[nand->oobblock +
 818                                        oob_config.eccvalid_pos] = 0xf0;
 819                 }
 820         }
 821
 822         /* Calculate and write the second ECC if we have enough data */
 823         if ((nand->oobblock == 512) && (last == nand->oobblock)) {
 824                 nand_calculate_ecc (&nand->data_buf[256], &(ecc_code[3]));
 825                 for (i = 3; i < 6; i++) {
 826                         nand->data_buf[(nand->oobblock +
 827                                         oob_config.ecc_pos[i])] = ecc_code[i];
 828                 }
 829                 if (oob_config.eccvalid_pos != -1) {
 830                         nand->data_buf[nand->oobblock +
 831                                        oob_config.eccvalid_pos] &= 0x0f;
 832                 }
 833         }
 834 #endif
 835         /* Prepad for partial page programming !!! */
 836         for (i = 0; i < col; i++)
 837                 nand->data_buf[i] = 0xff;
 838
 839         /* Postpad for partial page programming !!! oob is already padded */
 840         for (i = last; i < nand->oobblock; i++)
 841                 nand->data_buf[i] = 0xff;
 842
 843         /* Send command to begin auto page programming */
 844         NanD_Command (nand, NAND_CMD_READ0);
 845         NanD_Command (nand, NAND_CMD_SEQIN);
 846         if (nand->bus16) {
 847                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 848                               (page << nand->page_shift) + (col >> 1));
 849         } else {
 850                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 851                               (page << nand->page_shift) + col);
 852         }
 853
 854         /* Write out complete page of data */
 855         if (nand->bus16) {
 856                 for (i = 0; i < (nand->oobblock + nand->oobsize); i += 2) {
 857                         WRITE_NAND (nand->data_buf[i] +
 858                                     (nand->data_buf[i + 1] << 8),
 859                                     nand->IO_ADDR);
 860                 }
 861         } else {
 862                 for (i = 0; i < (nand->oobblock + nand->oobsize); i++)
 863                         WRITE_NAND (nand->data_buf[i], nand->IO_ADDR);
 864         }
 865
 866         /* Send command to actually program the data */
 867         NanD_Command (nand, NAND_CMD_PAGEPROG);
 868         NanD_Command (nand, NAND_CMD_STATUS);
 869 #ifdef NAND_NO_RB
 870         {
 871                 u_char ret_val;
 872
 873                 do {
 874                         ret_val = READ_NAND (nandptr);  /* wait till ready */
 875                 } while ((ret_val & 0x40) != 0x40);
 876         }
 877 #endif
 878         /* See if device thinks it succeeded */
 879         if (READ_NAND (nand->IO_ADDR) & 0x01) {
 880                 printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__,
 881                         page);
 882                 return -1;
 883         }
 884 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 885         /*
 886          * The NAND device assumes that it is always writing to
 887          * a cleanly erased page. Hence, it performs its internal
 888          * write verification only on bits that transitioned from
 889          * 1 to 0. The device does NOT verify the whole page on a
 890          * byte by byte basis. It is possible that the page was
 891          * not completely erased or the page is becoming unusable
 892          * due to wear. The read with ECC would catch the error
 893          * later when the ECC page check fails, but we would rather
 894          * catch it early in the page write stage. Better to write
 895          * no data than invalid data.
 896          */
 897
 898         /* Send command to read back the page */
 899         if (col < nand->eccsize)
 900                 NanD_Command (nand, NAND_CMD_READ0);
 901         else
 902                 NanD_Command (nand, NAND_CMD_READ1);
 903         if (nand->bus16) {
 904                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 905                               (page << nand->page_shift) + (col >> 1));
 906         } else {
 907                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 908                               (page << nand->page_shift) + col);
 909         }
 910
 911         /* Loop through and verify the data */
 912         if (nand->bus16) {
 913                 for (i = col; i < last; i = +2) {
 914                         if ((nand->data_buf[i] +
 915                              (nand->data_buf[i + 1] << 8)) != READ_NAND (nand->IO_ADDR)) {
 916                                 printf ("%s: Failed write verify, page 0x%08x ",
 917                                         __FUNCTION__, page);
 918                                 return -1;
 919                         }
 920                 }
 921         } else {
 922                 for (i = col; i < last; i++) {
 923                         if (nand->data_buf[i] != READ_NAND (nand->IO_ADDR)) {
 924                                 printf ("%s: Failed write verify, page 0x%08x ",
 925                                         __FUNCTION__, page);
 926                                 return -1;
 927                         }
 928                 }
 929         }
 930
 931 #ifdef CONFIG_MTD_NAND_ECC
 932         /*
 933          * We also want to check that the ECC bytes wrote
 934          * correctly for the same reasons stated above.
 935          */
 936         NanD_Command (nand, NAND_CMD_READOOB);
 937         if (nand->bus16) {
 938                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 939                               (page << nand->page_shift) + (col >> 1));
 940         } else {
 941                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 942                               (page << nand->page_shift) + col);
 943         }
 944         if (nand->bus16) {
 945                 for (i = 0; i < nand->oobsize; i += 2) {
 946                         u16 val;
 947
 948                         val = READ_NAND (nand->IO_ADDR);
 949                         nand->data_buf[i] = val & 0xff;
 950                         nand->data_buf[i + 1] = val >> 8;
 951                 }
 952         } else {
 953                 for (i = 0; i < nand->oobsize; i++) {
 954                         nand->data_buf[i] = READ_NAND (nand->IO_ADDR);
 955                 }
 956         }
 957         for (i = 0; i < ecc_bytes; i++) {
 958                 if ((nand->data_buf[(oob_config.ecc_pos[i])] != ecc_code[i]) && ecc_code[i]) {
 959                         printf ("%s: Failed ECC write "
 960                                 "verify, page 0x%08x, "
 961                                 "%6i bytes were succesful\n",
 962                                 __FUNCTION__, page, i);
 963                         return -1;
 964                 }
 965         }
 966 #endif  /* CONFIG_MTD_NAND_ECC */
 967 #endif  /* CONFIG_MTD_NAND_VERIFY_WRITE */
 968         return 0;
 969 }
 970
 971 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
 972                            size_t * retlen, const u_char * buf, u_char * ecc_code)
 973 {
 974         int i, page, col, cnt, ret = 0;
 975
 976         /* Do not allow write past end of device */
 977         if ((to + len) > nand->totlen) {
 978                 printf ("%s: Attempt to write past end of page\n", __FUNCTION__);
 979                 return -1;
 980         }
 981
 982         /* Shift to get page */
 983         page = ((int) to) >> nand->page_shift;
 984
 985         /* Get the starting column */
 986         col = to & (nand->oobblock - 1);
 987
 988         /* Initialize return length value */
 989         *retlen = 0;
 990
 991         /* Select the NAND device */
 992 #ifdef CONFIG_OMAP1510
 993         archflashwp(0,0);
 994 #endif
 995 #ifdef CFG_NAND_WP
 996         NAND_WP_OFF();
 997 #endif
 998
 999         NAND_ENABLE_CE(nand);  /* set pin low */
1000
1001         /* Check the WP bit */
1002         NanD_Command(nand, NAND_CMD_STATUS);
1003         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1004                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
1005                 ret = -1;
1006                 goto out;
1007         }
1008
1009         /* Loop until all data is written */
1010         while (*retlen < len) {
1011                 /* Invalidate cache, if we write to this page */
1012                 if (nand->cache_page == page)
1013                         nand->cache_page = -1;
1014
1015                 /* Write data into buffer */
1016                 if ((col + len) >= nand->oobblock) {
1017                         for (i = col, cnt = 0; i < nand->oobblock; i++, cnt++) {
1018                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1019                         }
1020                 } else {
1021                         for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++) {
1022                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1023                         }
1024                 }
1025                 /* We use the same function for write and writev !) */
1026                 ret = nand_write_page (nand, page, col, i, ecc_code);
1027                 if (ret)
1028                         goto out;
1029
1030                 /* Next data start at page boundary */
1031                 col = 0;
1032
1033                 /* Update written bytes count */
1034                 *retlen += cnt;
1035
1036                 /* Increment page address */
1037                 page++;
1038         }
1039
1040         /* Return happy */
1041         *retlen = len;
1042
1043 out:
1044         /* De-select the NAND device */
1045         NAND_DISABLE_CE(nand);  /* set pin high */
1046 #ifdef CONFIG_OMAP1510
1047         archflashwp(0,1);
1048 #endif
1049 #ifdef CFG_NAND_WP
1050         NAND_WP_ON();
1051 #endif
1052
1053         return ret;
1054 }
1055
1056 /* read from the 16 bytes of oob data that correspond to a 512 byte
1057  * page or 2 256-byte pages.
1058  */
1059 int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
1060                          size_t * retlen, u_char * buf)
1061 {
1062         int len256 = 0;
1063         struct Nand *mychip;
1064         int ret = 0;
1065
1066         mychip = &nand->chips[ofs >> nand->chipshift];
1067
1068         /* update address for 2M x 8bit devices. OOB starts on the second */
1069         /* page to maintain compatibility with nand_read_ecc. */
1070         if (nand->page256) {
1071                 if (!(ofs & 0x8))
1072                         ofs += 0x100;
1073                 else
1074                         ofs -= 0x8;
1075         }
1076
1077         NAND_ENABLE_CE(nand);  /* set pin low */
1078         NanD_Command(nand, NAND_CMD_READOOB);
1079         if (nand->bus16) {
1080                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1081                              ((ofs >> nand->page_shift) << nand->page_shift) +
1082                                 ((ofs & (nand->oobblock - 1)) >> 1));
1083         } else {
1084                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1085         }
1086
1087         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1088         /* Note: datasheet says it should automaticaly wrap to the */
1089         /*       next OOB block, but it didn't work here. mf.      */
1090         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1091                 len256 = (ofs | 0x7) + 1 - ofs;
1092                 NanD_ReadBuf(nand, buf, len256);
1093
1094                 NanD_Command(nand, NAND_CMD_READOOB);
1095                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1096         }
1097
1098         NanD_ReadBuf(nand, &buf[len256], len - len256);
1099
1100         *retlen = len;
1101         /* Reading the full OOB data drops us off of the end of the page,
1102          * causing the flash device to go into busy mode, so we need
1103          * to wait until ready 11.4.1 and Toshiba TC58256FT nands */
1104
1105         ret = NanD_WaitReady(nand, 1);
1106         NAND_DISABLE_CE(nand);  /* set pin high */
1107
1108         return ret;
1109
1110 }
1111
1112 /* write to the 16 bytes of oob data that correspond to a 512 byte
1113  * page or 2 256-byte pages.
1114  */
1115 int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
1116                   size_t * retlen, const u_char * buf)
1117 {
1118         int len256 = 0;
1119         int i;
1120         unsigned long nandptr = nand->IO_ADDR;
1121
1122 #ifdef PSYCHO_DEBUG
1123         printf("nand_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
1124                (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
1125                buf[8], buf[9], buf[14],buf[15]);
1126 #endif
1127
1128         NAND_ENABLE_CE(nand);  /* set pin low to enable chip */
1129
1130         /* Reset the chip */
1131         NanD_Command(nand, NAND_CMD_RESET);
1132
1133         /* issue the Read2 command to set the pointer to the Spare Data Area. */
1134         NanD_Command(nand, NAND_CMD_READOOB);
1135         if (nand->bus16) {
1136                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1137                              ((ofs >> nand->page_shift) << nand->page_shift) +
1138                                 ((ofs & (nand->oobblock - 1)) >> 1));
1139         } else {
1140                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1141         }
1142
1143         /* update address for 2M x 8bit devices. OOB starts on the second */
1144         /* page to maintain compatibility with nand_read_ecc. */
1145         if (nand->page256) {
1146                 if (!(ofs & 0x8))
1147                         ofs += 0x100;
1148                 else
1149                         ofs -= 0x8;
1150         }
1151
1152         /* issue the Serial Data In command to initial the Page Program process */
1153         NanD_Command(nand, NAND_CMD_SEQIN);
1154         if (nand->bus16) {
1155                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1156                              ((ofs >> nand->page_shift) << nand->page_shift) +
1157                                 ((ofs & (nand->oobblock - 1)) >> 1));
1158         } else {
1159                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1160         }
1161
1162         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1163         /* Note: datasheet says it should automaticaly wrap to the */
1164         /*       next OOB block, but it didn't work here. mf.      */
1165         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1166                 len256 = (ofs | 0x7) + 1 - ofs;
1167                 for (i = 0; i < len256; i++)
1168                         WRITE_NAND(buf[i], nandptr);
1169
1170                 NanD_Command(nand, NAND_CMD_PAGEPROG);
1171                 NanD_Command(nand, NAND_CMD_STATUS);
1172 #ifdef NAND_NO_RB
1173                 { u_char ret_val;
1174                         do {
1175                                 ret_val = READ_NAND(nandptr); /* wait till ready */
1176                         } while ((ret_val & 0x40) != 0x40);
1177                 }
1178 #endif
1179                 if (READ_NAND(nandptr) & 1) {
1180                         puts ("Error programming oob data\n");
1181                         /* There was an error */
1182                         NAND_DISABLE_CE(nand);  /* set pin high */
1183                         *retlen = 0;
1184                         return -1;
1185                 }
1186                 NanD_Command(nand, NAND_CMD_SEQIN);
1187                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1188         }
1189
1190         if (nand->bus16) {
1191                 for (i = len256; i < len; i += 2) {
1192                         WRITE_NAND(buf[i] + (buf[i+1] << 8), nandptr);
1193                 }
1194         } else {
1195                 for (i = len256; i < len; i++)
1196                         WRITE_NAND(buf[i], nandptr);
1197         }
1198
1199         NanD_Command(nand, NAND_CMD_PAGEPROG);
1200         NanD_Command(nand, NAND_CMD_STATUS);
1201 #ifdef NAND_NO_RB
1202         {       u_char ret_val;
1203                 do {
1204                         ret_val = READ_NAND(nandptr); /* wait till ready */
1205                 } while ((ret_val & 0x40) != 0x40);
1206         }
1207 #endif
1208         if (READ_NAND(nandptr) & 1) {
1209                 puts ("Error programming oob data\n");
1210                 /* There was an error */
1211                 NAND_DISABLE_CE(nand);  /* set pin high */
1212                 *retlen = 0;
1213                 return -1;
1214         }
1215
1216         NAND_DISABLE_CE(nand);  /* set pin high */
1217         *retlen = len;
1218         return 0;
1219
1220 }
1221
1222 int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
1223 {
1224         /* This is defined as a structure so it will work on any system
1225          * using native endian jffs2 (the default).
1226          */
1227         static struct jffs2_unknown_node clean_marker = {
1228                 JFFS2_MAGIC_BITMASK,
1229                 JFFS2_NODETYPE_CLEANMARKER,
1230                 8               /* 8 bytes in this node */
1231         };
1232         unsigned long nandptr;
1233         struct Nand *mychip;
1234         int ret = 0;
1235
1236         if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) {
1237                 printf ("Offset and size must be sector aligned, erasesize = %d\n",
1238                         (int) nand->erasesize);
1239                 return -1;
1240         }
1241
1242         nandptr = nand->IO_ADDR;
1243
1244         /* Select the NAND device */
1245 #ifdef CONFIG_OMAP1510
1246         archflashwp(0,0);
1247 #endif
1248 #ifdef CFG_NAND_WP
1249         NAND_WP_OFF();
1250 #endif
1251     NAND_ENABLE_CE(nand);  /* set pin low */
1252
1253         /* Check the WP bit */
1254         NanD_Command(nand, NAND_CMD_STATUS);
1255         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1256                 printf ("nand_write_ecc: Device is write protected!!!\n");
1257                 ret = -1;
1258                 goto out;
1259         }
1260
1261         /* Check the WP bit */
1262         NanD_Command(nand, NAND_CMD_STATUS);
1263         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1264                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
1265                 ret = -1;
1266                 goto out;
1267         }
1268
1269         /* FIXME: Do nand in the background. Use timers or schedule_task() */
1270         while(len) {
1271                 /*mychip = &nand->chips[shr(ofs, nand->chipshift)];*/
1272                 mychip = &nand->chips[ofs >> nand->chipshift];
1273
1274                 /* always check for bad block first, genuine bad blocks
1275                  * should _never_  be erased.
1276                  */
1277                 if (ALLOW_ERASE_BAD_DEBUG || !check_block(nand, ofs)) {
1278                         /* Select the NAND device */
1279                         NAND_ENABLE_CE(nand);  /* set pin low */
1280
1281                         NanD_Command(nand, NAND_CMD_ERASE1);
1282                         NanD_Address(nand, ADDR_PAGE, ofs);
1283                         NanD_Command(nand, NAND_CMD_ERASE2);
1284
1285                         NanD_Command(nand, NAND_CMD_STATUS);
1286
1287 #ifdef NAND_NO_RB
1288                         {       u_char ret_val;
1289                                 do {
1290                                         ret_val = READ_NAND(nandptr); /* wait till ready */
1291                                 } while ((ret_val & 0x40) != 0x40);
1292                         }
1293 #endif
1294                         if (READ_NAND(nandptr) & 1) {
1295                                 printf ("%s: Error erasing at 0x%lx\n",
1296                                         __FUNCTION__, (long)ofs);
1297                                 /* There was an error */
1298                                 ret = -1;
1299                                 goto out;
1300                         }
1301                         if (clean) {
1302                                 int n;  /* return value not used */
1303                                 int p, l;
1304
1305                                 /* clean marker position and size depend
1306                                  * on the page size, since 256 byte pages
1307                                  * only have 8 bytes of oob data
1308                                  */
1309                                 if (nand->page256) {
1310                                         p = NAND_JFFS2_OOB8_FSDAPOS;
1311                                         l = NAND_JFFS2_OOB8_FSDALEN;
1312                                 } else {
1313                                         p = NAND_JFFS2_OOB16_FSDAPOS;
1314                                         l = NAND_JFFS2_OOB16_FSDALEN;
1315                                 }
1316
1317                                 ret = nand_write_oob(nand, ofs + p, l, (size_t *)&n,
1318                                                      (u_char *)&clean_marker);
1319                                 /* quit here if write failed */
1320                                 if (ret)
1321                                         goto out;
1322                         }
1323                 }
1324                 ofs += nand->erasesize;
1325                 len -= nand->erasesize;
1326         }
1327
1328 out:
1329         /* De-select the NAND device */
1330         NAND_DISABLE_CE(nand);  /* set pin high */
1331 #ifdef CONFIG_OMAP1510
1332         archflashwp(0,1);
1333 #endif
1334 #ifdef CFG_NAND_WP
1335         NAND_WP_ON();
1336 #endif
1337
1338         return ret;
1339 }
1340
1341
1342 static inline int nandcheck(unsigned long potential, unsigned long physadr)
1343 {
1344         return 0;
1345 }
1346
1347 unsigned long nand_probe(unsigned long physadr)
1348 {
1349         struct nand_chip *nand = NULL;
1350         int i = 0, ChipID = 1;
1351
1352 #ifdef CONFIG_MTD_NAND_ECC_JFFS2
1353         oob_config.ecc_pos[0] = NAND_JFFS2_OOB_ECCPOS0;
1354         oob_config.ecc_pos[1] = NAND_JFFS2_OOB_ECCPOS1;
1355         oob_config.ecc_pos[2] = NAND_JFFS2_OOB_ECCPOS2;
1356         oob_config.ecc_pos[3] = NAND_JFFS2_OOB_ECCPOS3;
1357         oob_config.ecc_pos[4] = NAND_JFFS2_OOB_ECCPOS4;
1358         oob_config.ecc_pos[5] = NAND_JFFS2_OOB_ECCPOS5;
1359         oob_config.eccvalid_pos = 4;
1360 #else
1361         oob_config.ecc_pos[0] = NAND_NOOB_ECCPOS0;
1362         oob_config.ecc_pos[1] = NAND_NOOB_ECCPOS1;
1363         oob_config.ecc_pos[2] = NAND_NOOB_ECCPOS2;
1364         oob_config.ecc_pos[3] = NAND_NOOB_ECCPOS3;
1365         oob_config.ecc_pos[4] = NAND_NOOB_ECCPOS4;
1366         oob_config.ecc_pos[5] = NAND_NOOB_ECCPOS5;
1367         oob_config.eccvalid_pos = NAND_NOOB_ECCVPOS;
1368 #endif
1369         oob_config.badblock_pos = 5;
1370
1371         for (i=0; i<CFG_MAX_NAND_DEVICE; i++) {
1372                 if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
1373                         nand = &nand_dev_desc[i];
1374                         break;
1375                 }
1376         }
1377         if (!nand)
1378                 return (0);
1379
1380         memset((char *)nand, 0, sizeof(struct nand_chip));
1381
1382         nand->IO_ADDR = physadr;
1383         nand->cache_page = -1;  /* init the cache page */
1384         NanD_ScanChips(nand);
1385
1386         if (nand->totlen == 0) {
1387                 /* no chips found, clean up and quit */
1388                 memset((char *)nand, 0, sizeof(struct nand_chip));
1389                 nand->ChipID = NAND_ChipID_UNKNOWN;
1390                 return (0);
1391         }
1392
1393         nand->ChipID = ChipID;
1394         if (curr_device == -1)
1395                 curr_device = i;
1396
1397         nand->data_buf = malloc (nand->oobblock + nand->oobsize);
1398         if (!nand->data_buf) {
1399                 puts ("Cannot allocate memory for data structures.\n");
1400                 return (0);
1401         }
1402
1403         return (nand->totlen);
1404 }
1405
1406 #ifdef CONFIG_MTD_NAND_ECC
1407 /*
1408  * Pre-calculated 256-way 1 byte column parity
1409  */
1410 static const u_char nand_ecc_precalc_table[] = {
1411         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1412         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
1413         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1414         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1415         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1416         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1417         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1418         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1419         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1420         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1421         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1422         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1423         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1424         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1425         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1426         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1427         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1428         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1429         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1430         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1431         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1432         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1433         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1434         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1435         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1436         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1437         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1438         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1439         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1440         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1441         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1442         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
1443 };
1444
1445
1446 /*
1447  * Creates non-inverted ECC code from line parity
1448  */
1449 static void nand_trans_result(u_char reg2, u_char reg3,
1450         u_char *ecc_code)
1451 {
1452         u_char a, b, i, tmp1, tmp2;
1453
1454         /* Initialize variables */
1455         a = b = 0x80;
1456         tmp1 = tmp2 = 0;
1457
1458         /* Calculate first ECC byte */
1459         for (i = 0; i < 4; i++) {
1460                 if (reg3 & a)           /* LP15,13,11,9 --> ecc_code[0] */
1461                         tmp1 |= b;
1462                 b >>= 1;
1463                 if (reg2 & a)           /* LP14,12,10,8 --> ecc_code[0] */
1464                         tmp1 |= b;
1465                 b >>= 1;
1466                 a >>= 1;
1467         }
1468
1469         /* Calculate second ECC byte */
1470         b = 0x80;
1471         for (i = 0; i < 4; i++) {
1472                 if (reg3 & a)           /* LP7,5,3,1 --> ecc_code[1] */
1473                         tmp2 |= b;
1474                 b >>= 1;
1475                 if (reg2 & a)           /* LP6,4,2,0 --> ecc_code[1] */
1476                         tmp2 |= b;
1477                 b >>= 1;
1478                 a >>= 1;
1479         }
1480
1481         /* Store two of the ECC bytes */
1482         ecc_code[0] = tmp1;
1483         ecc_code[1] = tmp2;
1484 }
1485
1486 /*
1487  * Calculate 3 byte ECC code for 256 byte block
1488  */
1489 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code)
1490 {
1491         u_char idx, reg1, reg3;
1492         int j;
1493
1494         /* Initialize variables */
1495         reg1 = reg3 = 0;
1496         ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
1497
1498         /* Build up column parity */
1499         for(j = 0; j < 256; j++) {
1500
1501                 /* Get CP0 - CP5 from table */
1502                 idx = nand_ecc_precalc_table[dat[j]];
1503                 reg1 ^= idx;
1504
1505                 /* All bit XOR = 1 ? */
1506                 if (idx & 0x40) {
1507                         reg3 ^= (u_char) j;
1508                 }
1509         }
1510
1511         /* Create non-inverted ECC code from line parity */
1512         nand_trans_result((reg1 & 0x40) ? ~reg3 : reg3, reg3, ecc_code);
1513
1514         /* Calculate final ECC code */
1515         ecc_code[0] = ~ecc_code[0];
1516         ecc_code[1] = ~ecc_code[1];
1517         ecc_code[2] = ((~reg1) << 2) | 0x03;
1518 }
1519
1520 /*
1521  * Detect and correct a 1 bit error for 256 byte block
1522  */
1523 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
1524 {
1525         u_char a, b, c, d1, d2, d3, add, bit, i;
1526
1527         /* Do error detection */
1528         d1 = calc_ecc[0] ^ read_ecc[0];
1529         d2 = calc_ecc[1] ^ read_ecc[1];
1530         d3 = calc_ecc[2] ^ read_ecc[2];
1531
1532         if ((d1 | d2 | d3) == 0) {
1533                 /* No errors */
1534                 return 0;
1535         } else {
1536                 a = (d1 ^ (d1 >> 1)) & 0x55;
1537                 b = (d2 ^ (d2 >> 1)) & 0x55;
1538                 c = (d3 ^ (d3 >> 1)) & 0x54;
1539
1540                 /* Found and will correct single bit error in the data */
1541                 if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
1542                         c = 0x80;
1543                         add = 0;
1544                         a = 0x80;
1545                         for (i=0; i<4; i++) {
1546                                 if (d1 & c)
1547                                         add |= a;
1548                                 c >>= 2;
1549                                 a >>= 1;
1550                         }
1551                         c = 0x80;
1552                         for (i=0; i<4; i++) {
1553                                 if (d2 & c)
1554                                         add |= a;
1555                                 c >>= 2;
1556                                 a >>= 1;
1557                         }
1558                         bit = 0;
1559                         b = 0x04;
1560                         c = 0x80;
1561                         for (i=0; i<3; i++) {
1562                                 if (d3 & c)
1563                                         bit |= b;
1564                                 c >>= 2;
1565                                 b >>= 1;
1566                         }
1567                         b = 0x01;
1568                         a = dat[add];
1569                         a ^= (b << bit);
1570                         dat[add] = a;
1571                         return 1;
1572                 }
1573                 else {
1574                         i = 0;
1575                         while (d1) {
1576                                 if (d1 & 0x01)
1577                                         ++i;
1578                                 d1 >>= 1;
1579                         }
1580                         while (d2) {
1581                                 if (d2 & 0x01)
1582                                         ++i;
1583                                 d2 >>= 1;
1584                         }
1585                         while (d3) {
1586                                 if (d3 & 0x01)
1587                                         ++i;
1588                                 d3 >>= 1;
1589                         }
1590                         if (i == 1) {
1591                                 /* ECC Code Error Correction */
1592                                 read_ecc[0] = calc_ecc[0];
1593                                 read_ecc[1] = calc_ecc[1];
1594                                 read_ecc[2] = calc_ecc[2];
1595                                 return 2;
1596                         }
1597                         else {
1598                                 /* Uncorrectable Error */
1599                                 return -1;
1600                         }
1601                 }
1602         }
1603
1604         /* Should never happen */
1605         return -1;
1606 }
1607
1608 #endif
1609
1610 #ifdef CONFIG_JFFS2_NAND
1611 int read_jffs2_nand(size_t start, size_t len,
1612                 size_t * retlen, u_char * buf, int nanddev)
1613 {
1614         return nand_legacy_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2,
1615                         start, len, retlen, buf);
1616 }
1617 #endif /* CONFIG_JFFS2_NAND */
1618
1619 #endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */